| 单片降压型DC-DC转换器的控制电路设计 |
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| 引用本文： | 程亮,赵子龙.单片降压型DC-DC转换器的控制电路设计[J].电子器件,2020(1):205-209. |
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| 作者姓名： | 程亮 赵子龙 |
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| 作者单位： | 山西经济管理干部学院;重庆大学土木工程学院;山地城镇建设与新技术教育部重点实验室（重庆大学） |
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| 基金项目： | 中国(重庆)新加坡博士后国际培训交流项目([2017]78和[2017]154)。 |
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| 摘 要： | 基于峰值电流检测脉宽调制技术原理,设计了一种新颖的应用于单片降压型DC-DC转换器的控制电路。针对峰值电流采样和PWM比较器电路技术,提出了一种新颖的电路结构。其中,PWM比较器和逻辑及驱动电路由升压电路驱动,节省了一个电平转换电路,降低了电路功耗;PWM比较器直接对功率管和镜像管电流采样,无需使用运算放大器,简化了电路结构。采用华虹宏力BCD350GE工艺进行设计,流片测试表明,电路可实现3V到36 V宽幅输入,500 mA满载输出。在输入24 V电压,输出3.3 V电压时,纹波为2.3 mV。
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| 关 键 词： | 降压型 脉宽调制 电流采样 比较器 |
Design of Control Circuit for a Monolithic Buck DC-DC Converter |
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| CHENG Liang,ZHAO Zilong.Design of Control Circuit for a Monolithic Buck DC-DC Converter[J].Journal of Electron Devices,2020(1):205-209. |
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| Authors: | CHENG Liang ZHAO Zilong |
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| Affiliation: | (Shanxi Institute of Economic Management,Taiyuan 030024,China;School of Civil Engineering,Chongqing University,Chongqing 400045,China;Key Laboratory of New Technology for Construction of Cities in Mountain Area(Chongqing University),Ministry of Education,Chongqing 400045,China) |
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| Abstract: | Based on the principle of peak current detection pulse width modulation technology,a novel control circuit for monolithic buck DC-DC converter is designed.A novel circuit structure is proposed for peak current sampling and PWM comparator.Among them,PWM comparator and logic and drive circuit are driven by boost circuit,which saves a level conversion circuit and reduces circuit power consumption;the PWM comparator directly samples the current of power tube and mirror tube without using operational amplifier,which simplifies the circuit structure.Designed by HuaHong BCD350GE process,the chip tape-out test shows that the circuit can achieve wide input from 3 V to 36 V and 500 mA full load output.When the input voltage is 24 V,the ripple is 2.3 mV at the output voltage of 3.3 V. |
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| Keywords: | buck pulse width modulation current sampling comparator |
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