混合烧结高散热导电胶的封装应用及性能

为满足中大尺寸背面裸硅芯片的封装应用及其高散热需求,开发了一种新型混合烧结高散热导电胶,该新型导电胶以有机二元酸表面活化的银粉颗粒、丙烯酸树脂和其他有机添加剂为原料混合制备而成.采用新型导电胶将6 mm×6 mm裸硅芯片粘接到方形扁平无引脚封装键合(QFNWB)产品上,并进行了导电胶黏度测量、X射线无损检测、导电胶和芯片粘接的破坏性推力测试、导热系数测试和可靠性试验.研究结果表明,该导电胶触变指数为7.2,烘烤后无明显气孔产生,6 mm×6 mm裸硅芯片粘接的破坏性推力为343 N,导热系数高达15 W/(m·K).与常规导电胶相比,其导热性能优异,且解决了烧结银导电胶无法应用于中大尺寸背面裸硅芯片的问题,满足产品的高散热和高可靠性要求.     

芯片贴装用银浆料的热物理与力学性能

针对集成电路半导体芯片贴装,替代金-硅共熔焊或导电胶类粘结剂,研制了一种由银粉、玻璃粉和有机载体组成的低温烧结型银基浆料,其烧结温度峰值为430℃。研究了浆料的成分配比、工艺及其芯片贴装烧结工艺对浆料烧结体的微观组织、αL、λ、芯片组装的剪切力和热循环对芯片剪切力的影响规律。结果表明,当ζ(银粉:玻璃粉)=7:3,ζ(固体混合粉末:有机载体)=8:2时,芯片贴装后的综合性能最佳,冷热循环500次后其剪切力仅下降15%。     

高频波导组件复杂连接面导电胶粘接工艺

高频波导组件对构成波导腔的上、下壳体复杂连接面的电连接质量要求极其苛刻，尤其是在Ka频段及以上，常规的工艺方法难以满足高频波导产品的装配要求。分析了高频波导组件特点及装配工艺性，提出了一种涂覆针头内径选择及涂覆路径设计方法，解决了复杂连接面导电胶涂覆不均匀和漫溢的问题。基于导电胶涂覆量的量化控制及工艺参数优化，实现了高频波导功分盖板与壳体复杂连接面的高质量电连接，满足了组件对损耗、驻波指标的高要求。经历200次温循试验，仍满足波导组件的工艺指标及电指标要求，验证了工艺方法的可靠性。     

采用热压焊工艺实现金凸点芯片的倒装焊接

金凸点芯片的倒装焊接是一种先进的封装技术.叙述了钉头金凸点硅芯片在高密度薄膜陶瓷基板上的热压倒装焊接工艺方法,通过设定焊接参数达到所期望的最大剪切力,分析研究互连焊点的电性能和焊接缺陷,实现了热压倒装焊工艺的优化.同时,还简要介绍了芯片钉头金凸点的制作工艺.     

表面组装技术在厚膜电路中的应用

在厚膜集成电源误差放大电路设计中,采用标准的片式元器件,运用表面组装工艺,使产品制作中工艺方便灵活,成品率大大提高,以片式电阻的贴装弥补了多次印刷工艺带来的成品率下降的缺点。同时介绍贴装技术中再流焊工艺的使用经验,总结了再流焊对电路设计的要求及其优点,说明了表面组装技术用于厚膜电路是一种切实可行的方法。     

LTCC半切割基板制作技术研究

LTCC应用中，有些用户要求提供不切透的大尺寸联片LTCC基板，以方便后步自动贴装、自动粘片加工。本文选取为某用户加工的蓝牙基板为例，介绍了LTCC半切割基板制作技术，并从LTCC半切和激光半切的角度阐述了两种半切加工方法和工艺优化过程，对两种工艺试验结果进行了分析比较。     

TV用压电陶瓷滤波器的片式化

以一种TV用压电陶瓷滤波器的片式化过程为重点,介绍了压电元件片式化的思路及工艺。利用压电陶瓷的厚度能陷切变振动原理,采用新的结构与工艺,对原TV用压电陶瓷滤波器进行片式化。制作出的片式压电陶瓷滤波器达到国外同类产品水平,可批量生产。片式压电陶瓷滤波器满足了TV生产厂家对该类产品的需求。生产中,压电振子切割开槽、点导电胶组装、涂覆弹性胶和环氧密封是工艺控制的重点。     

表面贴装技术手工操作工艺

依据表面贴装技术(SMT)工业生产流程、SMT设备原理、表面贴装工程品质要求,提出了简便易行的表面贴装技术手工操作工艺方案,用SMT焊接技术来分析其工艺流程及工艺参数.介绍了表面贴装技术的工艺原理、工艺过程、手工操作方法及其特点,提供了表面贴装技术手工操作设备的配置、设计制作及使用方法,对印刷焊膏、表面贴装器件(SMD)贴装、回流焊接温度控制等关键工序提出了相应的品质要求和注意点,并对常见的焊接缺陷作了简单分析,解决了印制焊膏、贴装元器件、焊接、清洗、检测、返修等SMT焊接技术.     

电子组装件焊膏的网版（模版）印刷

在表面贴装装配领域,网版是实现精确和可重复性涂敷焊膏、密封剂、贴装胶、导电胶等的关键所在。由于焊膏、密封剂、贴装胶、导电胶等透过网版穿孔印刷,形成固定位置的焊膏和胶点,然后经过焊接或固化,将元件牢固固定或粘接在基底上。     

表面贴装低通滤波器模块的制作

利用表面贴装技术和表面贴装元件设计制作的低通滤波器模块，频响为ＤＣ～０．２Ｈｚ，Ｑｐ值高达１０００。本文叙述了按用户技术要求而进行的线路、工艺原理设计和几项工艺试验、电性能测试。     

微波芯片元件的导电胶粘接工艺与应用

导电胶常用于微波组件的组装过程,其粘接强度、导电、导热和韧性等性能指标严重影响其应用范围.分析了导电胶的国内外情况和主要性能参数,总结了混合微电路对导电胶应用的指标要求.通过微波芯片元件粘接工艺过程,分析了导电胶的固化工艺与粘接强度和玻璃化转变温度的关系、胶层厚度与热阻的关系、胶点位置和大小与粘片位置控制等方面的影响关系.测试结果显示,经导电胶粘接的芯片元件的电性能和粘接强度等指标均满足设计和使用要求,产品具有较好的可靠性和一致性.     

各向异性导电胶粘结工艺技术研究

分析了影响各向异性导电胶粘结可靠性的各因素,通过正交实验优化工艺参数,并在150℃高温贮存以及-65℃～150℃温度循环后对导电胶的剪切强度和接触电阻进行了可靠性实验。结果表明:影响ACA可靠性的主要因素导电粒子体积比例为15%,粘结温度200℃,时间10s,粘结压力为39.2N时,导电胶的剪切强度为286.2N,凸点的接触电阻为35mΩ。在可靠性试验后,导电胶的剪切强度满足GJB548B-2005的要求,接触电阻变化率小于5%。     

Highly Conductive,Flexible, Polyurethane‐Based Adhesives for Flexible and Printed Electronics

Flexible interconnects are one of the key elements in realizing next‐generation flexible electronics. While wire bonding interconnection materials are being deployed and discussed widely, adhesives to support flip‐chip and surface‐mount interconnections are less commonly used and reported. A polyurethane (PU)‐based electrically conductive adhesive (ECA) is developed to meet all the requirements of flexible interconnects, including an ultralow bulk resistivity of ≈1.0 × 10^?5 Ω cm that is maintained during bending, rolling, and compressing, good adhesion to various flexible substrates, and facile processing. The PU‐ECA enables various interconnection techniques in flexible and printed electronics: it can serve as a die‐attach material for flip‐chip, as vertical interconnect access (VIA)‐filling and polymer bump materials for 3D integration, and as a conductive paste for wearable radio‐frequency devices.     

高芯片键合质量与高生产率的新型银浆体系的研究

高键合强度与高生产率的银浆体系是芯片实现小型化、轻薄化的基础,本文研发了一种高芯片键合强度的新型银浆体系(银浆B),通过五元素三水平(53)正交实验,探讨了银浆量、点胶高度、芯片键合力、银浆固化时间、固化温度等五因素对芯片键合强度及结构的影响;以及基于实验设计(DOE)和响应曲面分析(RSM)等统计方法,分析了芯片键合的过程,优化了芯片键合过程的固化时间、固化温度和银浆量等参数。采用银浆B体系以及优化的制程参数,使得芯片键合强度制程能力指数(Cpk)从0.56提高到2.8。     

Die-attachment solutions for SiC power devices

Silicon carbide has become a very attractive material for high temperature and high power electronics applications due to its physical properties, which are different than those of conventional Si semiconductors. However, the reliability of SiC devices is limited by assembly processes comprising die attachment and interconnections technology as well as the stability of ohmic contacts at high temperatures.The investigations of die to substrate connection methods which can fulfill high temperature and high power requirements are the main focuses of the paper. This work focuses on die attach technologies: solder bonding by means of gold-germanium alloys, adhesive bonding with the use of organic and inorganic conductive compositions, as well as die bonding with the use of low temperature sintering with silver nanoparticles. The applied bonding technologies are described and obtained results are presented. Of the methods tested, the best solutions for high temperature application are two die attach technologies: silver glass die attach and die bonding with the use of low temperature sintered Ag nanopowders.     

各向异性导电胶倒装封装电子标签的可靠性

各向异性导电胶(ACA)广泛用于RFID电子标签芯片封装,具有芯片对位方便、热压温度低和工艺时间短的优点.但ACA互连本质上是机械接触,其互连可靠性强烈依赖于粘接界面性质、胶水粘接力及环境稳定性.本文试验表明,168 h高温高湿和D20 mm心轴弯曲对芯片粘接点的电接触性能有所影响;铜模组良品率显著高于铝天线Inlay.     

Chip on paper technology utilizing anisotropically conductive adhesive for smart label applications

Smart labels are a new generation of low cost transponders consisting of a transponder chip and a flexible type of antenna. Applying a flip chip assembly technology yields a new generation of low cost radio frequency identification (RFID) system that is a paper-thin smart label. Anisotropically conductive adhesive (ACA) is utilized to attach a flip chip onto a paper substrate to form the BiStatix RFID tag. Unlike bar codes, which are passive tags, smart labels can dynamically transmit and receive information to help identify, track and route packages remotely. The concept of flipping or inverting a silicon chip to be mounted on a paper substrate offers distinct advantages and enables achieving the cost and performance goals of this new product technology.Significant process development and reliability assessment was required to develop this smart label application. This paper discusses the process development and reliability assessment that was completed to achieve a low cost flip chip on paper assembly process. The various characteristics of ACA made it an enabling technology for this smart label application. A bare (unbumped) flip chip––without a dielectric layer and conductive polymer bumps––was aligned and placed on the paper substrate with compressive force. A thin layer of anisotropically conductive adhesive was used to attach the IC chip to the conductive ink antenna on the paper substrate. The conductive adhesive underfills and cures in only seconds. Advantages of this environmentally preferred process include the elimination of additional curing processes and reduced equipment requirements as well as the reduction of total IC packaging thickness.     

倒装焊接在压力敏感芯片封装工艺中的研究

胶粘引丝无法实现硅压力敏感芯片的小型化封装,无引线封装可以解决该问题。倒装焊接具有高密度、无引线和可靠的优点,通过对传统倒装焊接工艺进行适当的更改,倒装焊接可应用于压力敏感芯片的小型化封装。采用静电封接工艺在普通硅压力敏感芯片上制作保护支撑硅基片,在硅压力敏感芯片的焊盘上制作金凸点,调整倒装焊接的工艺顺序和工艺参数,实现了绝压型硅压力敏感芯片的无引线封装,为压力传感器小型化开辟了一条新路。试验结果表明该封装方式可靠性高,寿命长,具有耐恶劣环境的特点。     

Role of bonding time and temperature on the physical properties of coupled anisotropic conductive-nonconductive adhesive film for flip chip on glass technology

Using thermosetting epoxy based conductive adhesive films for the flip chip interconnect possess a great deal of attractions to the electronics manufacturing industries due to the ever increasing demands for miniaturized electronic products. Adhesive manufacturers have taken many attempts over the last decade to produce a number of types of adhesives and the coupled anisotropic conductive-nonconductive adhesive film is one of them. The successful formation of the flip chip interconnection using this particular type of adhesive depends on, among factors, how the physical properties of the adhesive changes during the bonding process. Experimental measurements of the temperature in the adhesive have revealed that the temperature becomes very close to the required maximum bonding temperature within the first 1 s of the bonding time. The higher the bonding temperature the faster the ramp up of temperature is. A dynamic mechanical analysis (DMA) has been carried out to investigate the nature of the changes of the physical properties of the coupled anisotropic conductive-nonconductive adhesive film for a range of bonding parameters. Adhesive samples that are pre-cured at 170, 190 and 210 °C for 3, 5 and 10 s have been analyzed using a DMA instrument. The results have revealed that the glass transition temperature of this type of adhesive increases with the increase in the bonding time for the bonding temperatures that have been used in this work. For the curing time of 3 and 5 s, the maximum glass transition temperature increases with the increase in the bonding temperature, but for the curing time of 10 s the maximum glass transition temperature has been observed in the sample which is cured at 190 °C. Based on these results it has been concluded that the optimal bonding temperature and time for this kind of adhesive are 190 °C and 10 s, respectively.     

Plasma cleaning of the flex substrate for flip-chip bonding with anisotropic conductive adhesive film

Advanced integrated circuit packaging processes require good bondability and reliability between various mating surfaces. A key factor affecting this requirement is surface cleanliness. Plasma cleaning is the most suitable process for optimum surface cleanliness. An investigation of O₂, Ar, and O₂/SF₆ plasma cleaning was carried out on a flexible substrate to study the adhesion of anisotropic conductive adhesive film for flip chip bonding. Surface roughness was found to increase substantially after the plasma treatment. Adhesion strength was evaluated by 90° peeling tests both for untreated and plasma-treated flex. A higher adhesion strength of anisotropic conductive film (ACF) bond was observed after plasma cleaning. The surface morphology of plasma treated and untreated flex substrate before bonding, as well as the fracture surfaces after the peel test for both cases, was characterized by secondary electron image techniques of scanning electron microscopy (SEM). Based on the detailed SEM findings, extensive comparisons were made between the plasma treated and the untreated samples. Mechanical interlocking is found to be responsible for higher peel strength of the plasma treated flex bonding. It was also proposed to select the right flexible substrate for highly reliable, ACF bonded flip chip on flex substrate.