FAILURE ANALYSIS ON BIPOLAR INTEGRATED CIRCUITS ATTRIBUTES DAMAGE TO ELECTROSTATIC DISCHARGE

Investigation into the failures of input modules at functional testing after assembly revealed unique damage to the emitters of the bipolar custom integrated circuit used as a receiver. Using a form of reverse engineering revealed that the damage could only be produced by a high energy pulse of short duration. Simulating the input circuit using discrete devices confirmed that similar circuit structures with the same applied stresses gave identical results. It was found that an energy level of 275 μJ gave a similar type of damage to that observed from the assembly failures. The mechanism of failure had to explain why this unique damage was produced at random on any one of four input transistors together with the occasional failure (around one in ten) which did not show this type of damage. This type of failure was traced to short circuits breaking down the insulation oxide to supply lines underlying the input track. Because the damage to the emitters of the input transistors could only be produced by pulsing the discharge from input to input, it was concluded that the damage could be electrostatic in nature. When electrostatic protection precautions were introduced at the delivery of the circuit modules and the earlier assembly stages of the equipment, these failures were totally eliminated.     

新型8管一位全加器电路设计

通过对已有全加器电路的研究与分析,提出了仅需8个晶体管的新型全加器单元.新电路包括2个3管同或门模块和1个选择器模块.在台积电(TSMC)0.18μm互补氧化物半导体(CMOS)工艺器件参数下经电路模拟程序(HSPICE)进行性能测试,与现有典型的全加器相比,新电路在晶体管数目、功耗和功耗延迟积有较大的优势.     

Logic circuits based on individual semiconducting and metallic carbon-nanotube devices

Nanoscale transistors employing an individual semiconducting carbon nanotube as the channel hold great potential for logic circuits with large integration densities that can be manufactured on glass or plastic substrates. Carbon nanotubes are usually produced as a mixture of semiconducting and metallic nanotubes. Since only semiconducting nanotubes yield transistors, the metallic nanotubes are typically not utilized. However, integrated circuits often require not only transistors, but also resistive load devices. Here we show that many of the metallic carbon nanotubes that are deposited on the substrate along with the semiconducting nanotubes can be conveniently utilized as load resistors with favorable characteristics for the design of integrated circuits. We also demonstrate the fabrication of arrays of transistors and resistors, each based on an individual semiconducting or metallic carbon nanotube, and their integration on glass substrates into logic circuits with switching frequencies of up to 500 kHz using a custom-designed metal interconnect layer.     

Inkjet-Printed Metal Oxide/PEDOT:PSS-Based Diodes and Rectifiers for Wireless Power Transfer

Printed electronic circuits are beginning to attract commercial success in different areas of applications that include low-cost wearables, biosensors, biomedical tags, packaging, e-textiles, etc. However, the major part of the research in this domain has always been focused on developing high-performance thin-film transistors (TFTs), while the other essential circuit elements, that are required, for example, for low-loss conversion of the input power, have rarely been reported. In this regard, inkjet-printed amorphous oxide-based diodes on glass, and flexible polyimide substrates with rectification ratio >10⁴ and operation frequency up to 25 and 15 MHz, respectively, are demonstrated. Next, using the printed diodes’ full-wave and double half-wave rectifiers are fabricated to convert input AC signals to DC supply. In addition, wireless power transfer (WPT) is demonstrated, where the input AC signal is wirelessly transmitted from a distance of 3 cm, at 125 kHz. The demonstrated WPT technology can be suitable for invasive implantable devices and standalone systems in multiple mediums. Finally, bending fatigue tests are carried out with the printed diodes on flexible substrates, down to a bending radius of 2.5 mm to demonstrate tensile strain tolerance up to 2.5%.     

Highly Scalable and Robust Mesa-Island-Structure Metal-Oxide Thin-Film Transistors and Integrated Circuits Enabled by Stress-Diffusive Manipulation

The increasing interest in flexible and wearable electronics has demanded a dramatic improvement of mechanical robustness in electronic devices along with high-resolution implemented architectures. In this study, a site-specific stress-diffusive manipulation is demonstrated to fulfill highly robust and ultraflexible amorphous indium–gallium–zinc oxide (a-IGZO) thin-film transistors (TFTs) and integrated circuits. The photochemically activated combustion sol–gel a-IGZO TFTs on a mesa-structured polyimide show an average saturation mobility of 6.06 cm² V⁻¹ s⁻¹ and a threshold voltage of −0.99 V with less than 9% variation, followed by 10 000 bending cycles with a radius of 125 μm. More importantly, the site-specific monolithic formation of mesa pillar-structured devices can provide fully integrated logic circuits such as seven-stage ring-oscillators, meeting the industrially needed device density and scalability. To exploit the underlying stress-diffusive mechanism, a physical model is provided by using a variety of chemical, structural, and electrical characterizations along with multidomain finite-element analysis simulation. The physical models reveal that a highly scalable and robust device can be achieved via the site-specific mesa architecture, by enabling generation of multineutral layers and fine-tuning the accumulated stresses on specific element of devices with their diffusion out into the boundary of the mesa regions.     

Scalable fabrication of self-aligned graphene transistors and circuits on glass

Graphene transistors are of considerable interest for radio frequency (rf) applications. High-frequency graphene transistors with the intrinsic cutoff frequency up to 300 GHz have been demonstrated. However, the graphene transistors reported to date only exhibit a limited extrinsic cutoff frequency up to about 10 GHz, and functional graphene circuits demonstrated so far can merely operate in the tens of megahertz regime, far from the potential the graphene transistors could offer. Here we report a scalable approach to fabricate self-aligned graphene transistors with the extrinsic cutoff frequency exceeding 50 GHz and graphene circuits that can operate in the 1-10 GHz regime. The devices are fabricated on a glass substrate through a self-aligned process by using chemical vapor deposition (CVD) grown graphene and a dielectrophoretic assembled nanowire gate array. The self-aligned process allows the achievement of unprecedented performance in CVD graphene transistors with a highest transconductance of 0.36 mS/μm. The use of an insulating substrate minimizes the parasitic capacitance and has therefore enabled graphene transistors with a record-high extrinsic cutoff frequency (> 50 GHz) achieved to date. The excellent extrinsic cutoff frequency readily allows configuring the graphene transistors into frequency doubling or mixing circuits functioning in the 1-10 GHz regime, a significant advancement over previous reports (～20 MHz). The studies open a pathway to scalable fabrication of high-speed graphene transistors and functional circuits and represent a significant step forward to graphene based radio frequency devices.     

Photochemical Molecular Tailoring for Efficient Diffusion and Reorganization of Organic Nanocrystals for Ultra‐Flexible Organic Semiconductor Arrays

Solution‐processed organic single crystals with high carrier mobility have been actively investigated for diverse applications such as displays, sensors, and next generation electronics on a flexible platform. However, the lack of precise alignment and growth control of organic single crystals impedes the widespread adoption of organic materials in an industrial perspective. Here, a photochemical modification approach is reported tailoring the solubility and molecular diffusivity of polymeric sacrificial layer and sequential batch‐type vapor annealing to implement high‐performance (average saturation mobility: 8.01 cm² V^?1 s^?1) organic single‐crystal thin film transistors with large channel width including multiple aligned single crystals. Additionally, the mechanical properties of the organic single crystals are systematically investigated with extreme strain conditions such as bending radius of 150 μm.     

高性能异或门电路的设计

在分析已发表的典型异或门电路的基础上,提出一种新型高性能的异或门电路,其电路核心部分仅3个晶体管,包括一个改进型互补CMOS反相器和一个NMOS传输门.在TSMC0.18μm CMOS工艺下经HSPICE模拟.结果表明,与已有的异或门电路相比,新设计在速度和功耗延迟积上具有较大的优势.     

Wafer‐Scale Patterning of Reduced Graphene Oxide Electrodes by Transfer‐and‐Reverse Stamping for High Performance OFETs

A wafer‐scale patterning method for solution‐processed graphene electrodes, named the transfer‐and‐reverse stamping method, is universally applicable for fabricating source/drain electrodes of n‐ and p‐type organic field‐effect transistors with excellent performance. The patterning method begins with transferring a highly uniform reduced graphene oxide thin film, which is pre‐prepared on a glass substrate, onto hydrophobic silanized (rigid/flexible) substrates. Patterns of the as‐prepared reduced graphene oxide films are then formed by modulating the surface energy of the films and selectively delaminating the films using an oxygen‐plasma‐treated elastomeric stamp with patterns. Reduced graphene oxide patterns with various sizes and shapes can be readily formed onto an entire wafer. Also, they can serve as the source/drain electrodes for benchmark n‐ and p‐type organic field‐effect transistors with enhanced performance, compared to those using conventional metal electrodes. These results demonstrate the general utility of this technique. Furthermore, this simple, inexpensive, and scalable electrode‐patterning‐technique leads to assembling organic complementary circuits onto a flexible substrate successfully.     

Flexible molecular-scale electronic devices

Flexible materials and devices could be exploited in light-emitting diodes, electronic circuits, memory devices, sensors, displays, solar cells and bioelectronic devices. Nanoscale elements such as thin films, nanowires, nanotubes and nanoparticles can also be incorporated into the active films of mechanically flexible devices. Large-area devices containing extremely thin films of molecular materials represent the ultimate scaling of flexible devices based on organic materials, but the influence of bending and twisting on the electrical and mechanical stability of such devices has never been examined. Here, we report the fabrication and characterization of two-terminal electronic devices based on self-assembled monolayers of alkyl or aromatic thiol molecules on flexible substrates. We find that the charge transport characteristics of the devices remain stable under severe bending conditions (radius?≤?1?mm) and a large number of repetitive bending cycles (≥1,000). The devices also remain reliable in various bending configurations, including twisted and helical structures.     

Rational design of amorphous indium zinc oxide/carbon nanotube hybrid film for unique performance transistors

Here we report unique performance transistors based on sol-gel processed indium zinc oxide/single-walled carbon nanotube (SWNT) composite thin films. In the composite, SWNTs provide fast tracks for carrier transport to significantly improve the apparent field effect mobility. Specifically, the composite thin film transistors with SWNT weight concentrations in the range of 0-2 wt % have been investigated with the field effect mobility reaching as high as 140 cm(2)/V·s at 1 wt % SWNTs while maintaining a high on/off ratio ～10(7). Furthermore, the introduction SWNTs into the composite thin film render excellent mechanical flexibility for flexible electronics. The dynamic loading test presents evidently superior mechanical stability with only 17% variation at a bending radius as small as 700 μm, and the repeated bending test shows only 8% normalized resistance variation after 300 cycles of folding and unfolding, demonstrating enormous improvement over the basic amorphous indium zinc oxide thin film. The results provide an important advance toward high-performance flexible electronics applications.     

Analog-digital and digital-analog converters using single-electron and MOS transistors

This paper proposes two kinds of novel single-electron analog-digital conversion (ADC) and digital-analog conversion (DAC) circuits that consist of single-electron transistors (SETs) and metal-oxide-semiconductor (MOS) transistors. The SET/MOS hybrid ADC and DAC circuits possess the merits of the SET circuit and the MOS circuit. We obtain the SPICE macro-modeling code of the SET transistor by studying and fitting the characteristics of the SET with SPICE simulation and Monte Carlo simulation methods. The SPICE macro-modeling code is used for the simulation of the SET/MOS hybrid ADC and DAC circuits. We simulate the performances of the SET/MOS hybrid 3-b ADC and 2-b DAC circuits by using the H-SPICE simulator. The simulation results demonstrate that the hybrid circuits can perform analog-digital and digital-analog data conversion well at room temperature. The hybrid ADC and DAC circuits have advantages as follows: 1) compared with conventional circuits, the architectures of the circuits are simpler; 2) compared with single electron transistor circuits, the circuits have much larger load capability; 3) the power dissipation of the circuits are lower than /spl omega/W; 4) the data conversion rate of the circuits can exceed 100 MHz; and 5) the resolution of the ADC and DAC circuits can be increased by the pipeline architectures.     

Flexible high-performance carbon nanotube integrated circuits

Carbon nanotube thin-film transistors are expected to enable the fabrication of high-performance, flexible and transparent devices using relatively simple techniques. However, as-grown nanotube networks usually contain both metallic and semiconducting nanotubes, which leads to a trade-off between charge-carrier mobility (which increases with greater metallic tube content) and on/off ratio (which decreases). Many approaches to separating metallic nanotubes from semiconducting nanotubes have been investigated, but most lead to contamination and shortening of the nanotubes, thus reducing performance. Here, we report the fabrication of high-performance thin-film transistors and integrated circuits on flexible and transparent substrates using floating-catalyst chemical vapour deposition followed by a simple gas-phase filtration and transfer process. The resulting nanotube network has a well-controlled density and a unique morphology, consisting of long (~10 μm) nanotubes connected by low-resistance Y-shaped junctions. The transistors simultaneously demonstrate a mobility of 35 cm(2) V(-1) s(-1) and an on/off ratio of 6 × 10(6). We also demonstrate flexible integrated circuits, including a 21-stage ring oscillator and master-slave delay flip-flops that are capable of sequential logic. Our fabrication procedure should prove to be scalable, for example, by using high-throughput printing techniques.     

Ultrahigh-Q nanocavities written with a nanoprobe

High-Q nanocavities have been extensively studied recently because they are considered key elements in low-power photonic devices and integrated circuits. Here we demonstrate that ultrahigh-Q (>10(6)) nanocavities can be created by employing scanning probe lithography on a prepatterned line defect in a silicon photonic crystal. This is the first realization of ultrahigh-Q nanocavities by the postprocess modification of photonic crystals. With this method, we can form an ultrahigh-Q nanocavity with controllable cavity parameters at an arbitrary position along a line defect. Furthermore, the fabricated nanocavity achieves ultralow power all-optical bistable operation owing to its large cavity enhancement effect. This demonstration indicates the possibility of realizing photonic integrated circuits on demand, where various circuit patterns are written with a nanoprobe on a universal photonic crystal substrate.     

Linear increases in carbon nanotube density through multiple transfer technique

We present a technique to increase carbon nanotube (CNT) density beyond the as-grown CNT density. We perform multiple transfers, whereby we transfer CNTs from several growth wafers onto the same target surface, thereby linearly increasing CNT density on the target substrate. This process, called transfer of nanotubes through multiple sacrificial layers, is highly scalable, and we demonstrate linear CNT density scaling up to 5 transfers. We also demonstrate that this linear CNT density increase results in an ideal linear increase in drain-source currents of carbon nanotube field effect transistors (CNFETs). Experimental results demonstrate that CNT density can be improved from 2 to 8 CNTs/μm, accompanied by an increase in drain-source CNFET current from 4.3 to 17.4 μA/μm.     

Extremely bendable, high-performance integrated circuits using semiconducting carbon nanotube networks for digital, analog, and radio-frequency applications

Solution-processed thin-films of semiconducting carbon nanotubes as the channel material for flexible electronics simultaneously offers high performance, low cost, and ambient stability, which significantly outruns the organic semiconductor materials. In this work, we report the use of semiconductor-enriched carbon nanotubes for high-performance integrated circuits on mechanically flexible substrates for digital, analog and radio frequency applications. The as-obtained thin-film transistors (TFTs) exhibit highly uniform device performance with on-current and transconductance up to 15 μA/μm and 4 μS/μm. By performing capacitance-voltage measurements, the gate capacitance of the nanotube TFT is precisely extracted and the corresponding peak effective device mobility is evaluated to be around 50 cm(2)V(-1)s(-1). Using such devices, digital logic gates including inverters, NAND, and NOR gates with superior bending stability have been demonstrated. Moreover, radio frequency measurements show that cutoff frequency of 170 MHz can be achieved in devices with a relatively long channel length of 4 μm, which is sufficient for certain wireless communication applications. This proof-of-concept demonstration indicates that our platform can serve as a foundation for scalable, low-cost, high-performance flexible electronics.     

Effect of top-down nanomachining on electrical conduction properties of TiO2 nanostructure-based chemical sensors

The present research was motivated by the growing interest of the scientific community towards the understanding of basic gas-surface interaction mechanisms in 1D nanostructured metal oxide semiconductors, whose significantly enhanced chemical detection sensitivity is known. In this work, impedance spectroscopy (IS) was used to evaluate how a top-down patterning of the sensitive layer can modulate the electrical properties of a gas sensor based on a fully integrated nanometric array of TiO(2) polycrystalline strips. The aim of the study was supported by comparative experimental activity carried out on different thin film gas sensors based on identical TiO(2) polycrystalline sensitive thin films. The impedance responses of the investigated devices under dry air (as the reference environment) and ethanol vapors (as the target gas) were fitted by a complex nonlinear least-squares method using LEVM software, in order to find an appropriate equivalent circuit describing the main conduction processes involved in the gas/semiconductor interactions. Two different equivalent circuit models were identified as completely representative of the TiO(2) thin film and the TiO(2) nanostructure-based gas sensors, respectively. All the circuit parameters were quantified and the related standard deviations were evaluated. The simulated results well approximated the experimental data as indicated by the small mean errors of the fits (in the range of 10(-4)) and the small standard deviations of the circuit parameters. In addition to the substrate capacitance, three different contributions to the overall conduction mechanism were identified for both equivalent circuits: bulk conductivity, intergrain contact and semiconductor-electrode contact, electrically represented by an ideal resistor R(g), a parallel R(gb)C(gb) block and a parallel R(c)-CPE(c) combination, respectively. In terms of equivalent circuit modeling, the sensitive layer patterning introduced an additional parameter in parallel connection with the whole circuit block. Such a circuit element (an ideal inductor, L) has an average value of about 125 μH and exhibits no direct dependence on the analyte gas concentration. Its presence could be due to complex mutual inductance effects occurring both between all the adjacent nanostrips (10 μm spaced) and between the nanostrips and the n-type-doped silicon substrate underneath the thermal oxide (wire/plate effect), where a two order of magnitude higher magnetic permeability of silicon can give L values comparable with those estimated by the fitting procedure. Slightly modified experimental models confirmed that the theoretical background, regulating thin film devices based on metal oxide semiconductors, is also valid for nanopatterned devices.     

The effect of temperature instability on the threshold sensitivity of photodetectors based on A<Superscript>III</Superscript>–B<Superscript>V</Superscript> photodiodes

The dependence of the sensitivity of photodetectors based on A^III–B^V photodiodes on accidental variations of the temperature of its elements is analyzed. It is shown that the temperature drift of the bias level in input circuits of op-amps strongly contributes to the resulting photodetector noise up to frequencies on the order of 1 MHz. To reach the limiting sensitivities of the sensors, it is necessary to stabilize the temperature of not only the photodiode chip, but also the integrated circuit of the first amplifier stage. For most of applications, the required stabilization accuracy does not exceed ±0.1°C. As a result of the analysis, prototype high-sensitivity medium-wavelength (2–5 μm) sensors were developed that operate without forced cooling and have a detection threshold of tens of nanowatts at a detection bandwidth of 0–1 MHz.     

Precision temperature measurement using CMOS substrate pnp transistors

This paper analyzes the nonidealities of temperature sensors based on substrate pnp transistors and shows how their influence can be minimized. It focuses on temperature measurement using the difference between the base-emitter voltages of a transistor operated at two current densities. This difference is proportional to absolute temperature (PTAT). The effects of series resistance, current-gain variation, high-level injection, and the Early effect on the accuracy of this PTAT voltage are discussed. The results of measurements made on substrate pnp transistors in a standard 0.5-/spl mu/m CMOS process are presented to illustrate the effects of these nonidealities. It is shown that the modeling of the PTAT voltage can be improved by taking the temperature dependency of the effective emission coefficient into account using the reverse Early effect. With this refinement, the temperature can be extracted from the measurement data with an absolute accuracy of /spl plusmn/0.1/spl deg/C in the range of -50 to 130/spl deg/C.     

Flexible active-matrix displays and shift registers based on solution-processed organic transistors

At present, flexible displays are an important focus of research. Further development of large, flexible displays requires a cost-effective manufacturing process for the active-matrix backplane, which contains one transistor per pixel. One way to further reduce costs is to integrate (part of) the display drive circuitry, such as row shift registers, directly on the display substrate. Here, we demonstrate flexible active-matrix monochrome electrophoretic displays based on solution-processed organic transistors on 25-microm-thick polyimide substrates. The displays can be bent to a radius of 1 cm without significant loss in performance. Using the same process flow we prepared row shift registers. With 1,888 transistors, these are the largest organic integrated circuits reported to date. More importantly, the operating frequency of 5 kHz is sufficiently high to allow integration with the display operating at video speed. This work therefore represents a major step towards 'system-on-plastic'.