On /spl Zopf//sub 4/-linear Preparata-like and Kerdock-like codes

We say that a binary code of length n is additive if it is isomorphic to a subgroup of /spl Zopf//sub 2//sup /spl alpha// /spl times/ /spl Zopf//sub 4//sup /spl beta//, where the quaternary coordinates are transformed to binary by means of the usual Gray map and hence /spl alpha/ + 2/spl beta/ = n. In this paper, we prove that any additive extended Preparata (1968) -like code always verifies /spl alpha/ = 0, i.e., it is always a /spl Zopf//sub 4/-linear code. Moreover, we compute the rank and the dimension of the kernel of such Preparata-like codes and also the rank and the kernel of the /spl Zopf//sub 4/-dual of these codes, i.e., the /spl Zopf//sub 4/-linear Kerdock-like codes.     

Cyclic codes over GR(4/sup m/) which are also cyclic over /spl Zopf//sub 4/

Let GR(4/sup m/) be the Galois ring of characteristic 4 and cardinality 4/sup m/, and /spl alpha/_={/spl alpha//sub 0/,/spl alpha//sub 1/,...,/spl alpha//sub m-1/} be a basis of GR(4/sup m/) over /spl Zopf//sub 4/ when we regard GR(4/sup m/) as a free /spl Zopf//sub 4/-module of rank m. Define the map d/sub /spl alpha/_/ from GR(4/sup m/)[z]/(z/sup n/-1) into /spl Zopf//sub 4/[z]/(z/sup mn/-1) by d/spl alpha/_(a(z))=/spl Sigma//sub i=0//sup m-1//spl Sigma//sub j=0//sup n-1/a/sub ij/z/sup mj+i/ where a(z)=/spl Sigma//sub j=0//sup n-1/a/sub j/z/sup j/ and a/sub j/=/spl Sigma//sub i=0//sup m-1/a/sub ij//spl alpha//sub i/, a/sub ij//spl isin//spl Zopf//sub 4/. Then, for any linear code C of length n over GR(4/sup m/), its image d/sub /spl alpha/_/(C) is a /spl Zopf//sub 4/-linear code of length mn. In this article, for n and m being odd integers, it is determined all pairs (/spl alpha/_,C) such that d/sub /spl alpha/_/(C) is /spl Zopf//sub 4/-cyclic, where /spl alpha/_ is a basis of GR(4/sup m/) over /spl Zopf//sub 4/, and C is a cyclic code of length n over GR(4/sup m/).     

Generalized MacWilliams identities for /spl Zopf//sub 4/-linear codes

In this correspondence, the generalized MacWilliams identities between the support weight distributions of a /spl Zopf//sub 4/-linear code of type 4/sup k/ and that of its dual are established.     

On the generators of /spl Zopf//sub 4/ cyclic codes of length 2/sup e/

Results are presented on the generators of ideals in the ring /spl Zopf//sub 4/[x]/(x/sup n/-1). In particular, each ideal (cyclic code) has a unique distinguished set of generators that characterizes any cyclic code. Some results about dual codes are also included.     

Maximum minimal distance partitioning of the /spl Zopf//sup 2/ lattice

We study the problem of dividing the /spl Zopf//sup 2/ lattice into partitions so that minimal intra-partition distance between the points is maximized. We show that this problem is analogous to the problem of sphere packing. An upper bound on the achievable intra-partition distances for a given number of partitions follows naturally from this observation, since the optimal sphere packing in two dimensions is achieved by the hexagonal lattice. Specific instances of this problem, when the number of partitions is 2/sup m/, were treated in trellis-coded modulation (TCM) code design by Ungerboeck (1982) and others. It is seen that methods previously used for set partitioning in TCM code design are asymptotically suboptimal as the number of partitions increases. We propose an algorithm for solving the /spl Zopf//sup 2/ lattice partitioning problem for an arbitrary number of partitions.     

Lee metric decoding of alternant codes over /spl Zopf//sub q/

A multi-stage Lee metric list decoding approach for alternant codes over /spl Zopf/(p/sup l/ )where p is prime and l/spl ges/2 is proposed. It is demonstrated that the error-correcting capability of such a decoding scheme increasingly surpasses that of a single-stage decoding approach as the length of the code and l increases.     

Generalization of the /spl Sigma//sub 0/-rank criteria for space-time codes

Recently, Liu et al., developed the /spl Sigma//sub 0/-rank criteria for space-time codes. It provides a sufficient condition on codeword and generator matrices defined over finite rings /spl Zopf//sub 2k/(j) to ensure full spatial diversity with 2/sup 2k/-QAM modulation. Here, we generalize the /spl Sigma//sub 0/-rank criteria and derive a sufficient condition on the generator matrices defined over finite rings /spl Zopf//sub 2l/(j) to ensure full spatial diversity with 2/sup 2k/-QAM modulation for any positive integer l/spl les/k. We also show that generator matrices defined over GF(2) satisfying the BPSK stacking construction constraint of Mammons and El Gamal achieve full spatial diversity when used with 2/sup 2k/-QAM modulation.     

InGaAs-InP mesa DHBTs with simultaneously high f/sub /spl tau// and f/sub max/ and low C/sub cb//I/sub c/ ratio

We report an InP-InGaAs-InP double heterojunction bipolar transistor (DHBT), fabricated using a conventional triple mesa structure, exhibiting a 370-GHz f/sub /spl tau// and 459-GHz f/sub max/, which is to our knowledge the highest f/sub /spl tau// reported for a mesa InP DHBT-as well as the highest simultaneous f/sub /spl tau// and f/sub max/ for any mesa HBT. The collector semiconductor was undercut to reduce the base-collector capacitance, producing a C/sub cb//I/sub c/ ratio of 0.28 ps/V at V/sub cb/=0.5 V. The V/sub BR,CEO/ is 5.6 V and the devices fail thermally only at >18 mW//spl mu/m/sup 2/, allowing dc bias from J/sub e/=4.8 mA//spl mu/m/sup 2/ at V/sub ce/=3.9 V to J/sub e/=12.5 mA//spl mu/m/sup 2/ at V/sub ce/=1.5 V. The device employs a 30 nm carbon-doped InGaAs base with graded base doping, and an InGaAs-InAlAs superlattice grade in the base-collector junction that contributes to a total depleted collector thickness of 150 nm.     

InGaAs/InP DHBTs with 120-nm collector having simultaneously high f/sub /spl tau//, f/sub max//spl ges/450 GHz

InP/In/sub 0.53/Ga/sub 0.47/As/InP double heterojunction bipolar transistors (DHBT) have been designed for increased bandwidth digital and analog circuits, and fabricated using a conventional mesa structure. These devices exhibit a maximum 450 GHz f/sub /spl tau// and 490 GHz f/sub max/, which is the highest simultaneous f/sub /spl tau// and f/sub max/ for any HBT. The devices have been scaled vertically for reduced electron collector transit time and aggressively scaled laterally to minimize the base-collector capacitance associated with thinner collectors. The dc current gain /spl beta/ is /spl ap/ 40 and V/sub BR,CEO/=3.9 V. The devices operate up to 25 mW//spl mu/m/sup 2/ dissipation (failing at J/sub e/=10 mA//spl mu/m/sup 2/, V/sub ce/=2.5 V, /spl Delta/T/sub failure/=301 K) and there is no evidence of current blocking up to J/sub e//spl ges/12 mA//spl mu/m/sup 2/ at V/sub ce/=2.0 V from the base-collector grade. The devices reported here employ a 30-nm highly doped InGaAs base, and a 120-nm collector containing an InGaAs/InAlAs superlattice grade at the base-collector junction.     

On the filtering problem for stationary random /spl Zopf//sup 2/-fields

It is shown that whenever a stationary random field (Z/sub n,m/)/sub n,m/spl isin/z/ is given by a Borel function f:/spl Ropf//sup z/ /spl times/ /spl Ropf//sup z/ /spl rarr/ /spl Ropf/ of two stationary processes (X/sub n/)/sub n/spl isin/z/ and (Y/sub m/)/sub m/spl isin/z/ i.e., then (Z/sub n, m/) = (f((X/sub n+k/)/sub k/spl epsi/z/, (Y/sub m + /spl lscr// )/sub /spl lscr/ /spl epsi/z/)) under a mild first coordinate univalence assumption on f, the process (X/sub n/)/sub n/spl isin/z/ is measurable with respect to (Z/sub n,m/)/sub n,m/spl epsi/z/ whenever the process (Y/sub m/)/sub m/spl isin/z/ is ergodic. The notion of universal filtering property of an ergodic stationary process is introduced, and then using ergodic theory methods it is shown that an ergodic stationary process has this property if and only if the centralizer of the dynamical system canonically associated with the process does not contain a nontrivial compact subgroup.     

4H-SiC power bipolar junction transistor with a very low specific ON-resistance of 2.9 m/spl Omega//spl middot/cm/sup 2/

This letter reports a newly achieved best result on the specific ON-resistance (R/sub SP/spl I.bar/ON/) of power 4H-SiC bipolar junction transistors (BJTs). A 4H-SiC BJT based on a 12-/spl mu/m drift layer shows a record-low specific-ON resistance of only 2.9 m/spl Omega//spl middot/cm/sup 2/, with an open-base collector-to-emitter blocking voltage (V/sub ceo/) of 757 V, and a current gain of 18.8. The active area of this 4H-SiC BJT is 0.61 mm/sup 2/, and it has a fully interdigitated design. This high-performance 4H-SiC BJT conducts up to 5.24 A at a forward voltage drop of V/sub CE/=2.5 V, corresponding to a low R/sub SP-ON/ of 2.9 m/spl Omega//spl middot/cm/sup 2/ up to J/sub c/=859 A/cm/sup 2/. This is the lowest specific ON-resistance ever reported for high-power 4H-SiC BJTs.     

10-kV, 123-m/spl Omega//spl middot/cm/sup 2/ 4H-SiC power DMOSFETs

10-kV, 123-m/spl Omega//spl middot/cm/sup 2/ power DMOSFETs in 4H-SiC are demonstrated. A 42% reduction in R/sub on,sp/, compared to a previously reported value, was achieved by using an 8 /spl times/ 10/sup 14/ cm/sup -3/ doped, 85-/spl mu/m-thick drift epilayer. An effective channel mobility of 22 cm/sup 2//Vs was measured from a test MOSFET. A specific on-resistance of 123 m/spl Omega//spl middot/cm/sup 2/ were measured with a gate bias of 18 V, which corresponds to an E/sub ox/ of 3 MV/cm. A leakage current of 197 /spl mu/A was measured at a drain bias of 10 kV from a 4H-SiC DMOSFET with an active area of 4.24 /spl times/ 10/sup -3/ cm/sup 2/. A switching time of 100 ns was measured in 4.6-kV, 1.3-A switching measurements. This shows that the 4H-SiC power DMOSFETS are ideal for high-voltage, high-speed switching applications.     

Low-frequency noise in submicrometer MOSFETs with HfO/sub 2/, HfO/sub 2//Al/sub 2/O/sub 3/ and HfAlO/sub x/ gate stacks

Low-frequency noise measurements were performed on p- and n-channel MOSFETs with HfO/sub 2/, HfAlO/sub x/ and HfO/sub 2//Al/sub 2/O/sub 3/ as the gate dielectric materials. The gate length varied from 0.135 to 0.36 /spl mu/m with 10.02 /spl mu/m gate width. The equivalent oxide thicknesses were: HfO/sub 2/ 23 /spl Aring/, HfAlO/sub x/ 28.5 /spl Aring/ and HfO/sub 2//Al/sub 2/O/sub 3/ 33 /spl Aring/. In addition to the core structures with only about 10 /spl Aring/ of oxide between the high-/spl kappa/ dielectric and silicon substrate, there were "double-gate oxide" structures where an interfacial oxide layer of 40 /spl Aring/ was grown between the high-/spl kappa/ dielectric and Si. DC analysis showed low gate leakage currents in the order of 10/sup -12/A(2-5/spl times/10/sup -5/ A/cm/sup 2/) for the devices and, in general, yielded higher threshold voltages and lower mobility values when compared to the corresponding SiO/sub 2/ devices. The unified number-mobility fluctuation model was used to account for the observed 1/f noise and to extract the oxide trap density, which ranged from 1.8/spl times/10/sup 17/ cm/sup -3/eV/sup -1/ to 1.3/spl times/10/sup 19/ cm/sup -3/eV/sup -1/, somewhat higher compared to conventional SiO/sub 2/ MOSFETs with the similar device dimensions. There was no evidence of single electron switching events or random telegraph signals. The aim of this paper is to present a general discussion on low-frequency noise characteristics of the three different high-/spl kappa//gate stacks, relative comparison among them and to the Si--SiO/sub 2/ system.     

Demonstration of 1789 V, 6.68 m/spl Omega/ /spl middot/ cm/sup 2/ 4H-SiC merged-PiN-Schottky diodes

The design, fabrication and characterisation of a high performance 4H-SiC diode of 1789 V-6.6 A with a low differential specific-on resistance (R/sub SP/spl I.bar/ON/) of 6.68 m/spl Omega/ /spl middot/ cm/sup 2/, based on a 10.3 /spl mu/m 4H-SiC blocking layer doped to 6.6/spl times/10/sup 15/ cm/sup -3/, is reported. The corresponding figure-of-merit of V/sub B//sup 2//R/sub SP/spl I.bar/ON/ for this diode is 479 MW/cm/sup 2/, which substantially surpasses previous records for all other MPS diodes.     

Limitation of DC currents by YBa/sub 2/Cu/sub 3/O/sub 7-/spl delta//-Au superconducting films

The limitation of dc fault currents is one of the issues for the development of dc networks or links. This paper shows for the first time the high potential of YBa/sub 2/Cu/sub 3/O/sub 7-/spl delta//-Au bilayers for the design of dc current limiters. Such devices are based on the transition into the normal state of the superconducting YBa/sub 2/Cu/sub 3/O/sub 7-/spl delta// films above a current I/sup */>I/sub c/, where I/sub c/ is the critical current at the onset of dissipation. The study of the transition under current pulses shows that a thermally driven transition into the normal state can occur after a delay t/sub trans/. This duration is defined by the amplitude of the current pulse. For I/sup *//spl ap/3I/sub c/, this delay is less than 10 /spl mu/s. The abrupt transition into the normal state allows an efficient current limitation. A recovery of the superconducting state can also occur under current. This property can be extremely interesting for autonomous operation of a current limiter in an electrical network in case of transient over-currents coming from the starting of high-power devices.     

A 4.15 kV 9.07-m/spl Omega//spl middot/cm/sup 2/ 4H-SiC Schottky-barrier diode using Mo contact annealed at high temperature

In this letter, we report the fabrication of high-voltage and low-loss 4H-SiC Schottky-barrier diodes (SBDs) with a performance close to the theoretical limit using a Mo contact annealed at high-temperature. High-temperature annealing for the Mo contact was found to be effective in controlling the Schottky-barrier height at 1.2-1.3 eV without degradation of n-factor and reverse characteristics. We successfully obtained a 1-mm/sup 2/ Mo-4H-SiC SBD with a breakdown voltage (V/sub b/) of 4.15 kV and a specific on resistance (R/sub on/) of 9.07 m/spl Omega//spl middot/cm/sup 2/, achieving a best V/sub b//sup 2//R/sub on/ value of 1898 MW/cm/sup 2/. We also obtained a 9-mm/sup 2/ Mo-4H-SiC SBD with V/sub b/ of 4.40 kV and R/sub on/ of 12.20 m/spl Omega//spl middot/cm/sup 2/.     

Low-frequency noise in submicrometer MOSFETs with HfO/sub 2/, HfO/sub 2//Al/sub 2/O/sub 3/ and HfAlO/sub x/ gate stacks

Low-frequency noise measurements were performed on p- and n-channel MOSFETs with HfO/sub 2/, HfAlO/sub x/ and HfO/sub 2//Al/sub 2/O/sub 3/ as the gate dielectric materials. The gate length varied from 0.135 to 0.36 /spl mu/m with 10.02 /spl mu/m gate width. The equivalent oxide thicknesses were: HfO/sub 2/ 23 /spl Aring/, HfAlO/sub x/ 28.5 /spl Aring/ and HfO/sub 2//Al/sub 2/O/sub 3/ 33 /spl Aring/. In addition to the core structures with only about 10 /spl Aring/ of oxide between the high-K dielectric and silicon substrate, there were "double-gate oxide" structures where an interfacial oxide layer of 40 /spl Aring/ was grown between the high-K dielectric and Si. DC analysis showed low gate leakage currents in the order of 10/sup -12/ A(2-5 /spl times/ 10/sup -5/ A/cm/sup 2/) for the devices and, in general, yielded higher threshold voltages and lower mobility values when compared to the corresponding SiO/sub 2/ devices. The unified number-mobility fluctuation model was used to account for the observed 1/f noise and to extract the oxide trap density, which ranged from 1.8 /spl times/ 10/sup 17/ cm/sup -3/ eV/sup -1/ to 1, 3 /spl times/ 10/sup 19/ cm/sup -3/ eV/sup -1/ somewhat higher compared to conventional SiO/sub 2/ MOSFETs with the similar device dimensions. There was no evidence of single electron switching events or random telegraph signals. The aim of this paper is to present a general discussion on low-frequency noise characteristics of the three different high-K/gate stacks, relative comparison among them and to the Si-SiO/sub 2/ system.     

Characterization of accumulation layer capacitance for extracting data on high-/spl kappa/ gate dielectrics

A new parameter extraction technique has been outlined for high-/spl kappa/ gate dielectrics that directly yields values of the dielectric capacitance C/sub di/, the accumulation layer surface potential quotient, /spl beta//sub acc/, the flat-band voltage, the surface potential /spl phi//sub s/, the dielectric voltage, the channel doping density and the interface charge density at flat-band. The parallel capacitance, C/sub p/(=C/sub sc/+C/sub it/), was found to be an exponential function of /spl phi//sub s/ in the strong accumulation regime, for seven different high-/spl kappa/ gate dielectrics. The slope of the experimental lnC/sub p/(/spl phi//sub s/) plot, i.e., |/spl beta//sub acc/|, was found to depend strongly on the physical properties of the high-/spl kappa/ dielectric, i.e., was inversely proportional to [(/spl phi//sub b/m/sup *//m)/sup 1/2/K/C/sub di/], where /spl phi//sub b/ is the band offset, and m/sup */ is the effective tunneling mass. Extraction of /spl beta//sub acc/ represented an experimental carrier confinement index for the accumulation layer and an experimental gate-dielectric direct-tunneling current index. /spl beta//sub acc/ may also be an effective tool for monitoring the effects of post-deposition annealing/processing.     

Efficient amplification using the /sup 4/F/sub 3/2//spl rarr//sup 4/I/sub 9/2/ transition in Nd-doped silica fiber

Amplification characteristics of the three-level /sup 4/F/sub 3/2//spl rarr//sup 4/I/sub 9/2/ transition in Nd-doped silica glass fiber are investigated under strong signal saturation and high pump power (150 mW). Aluminum codoped Nd-silica fibers exhibit strong superfluorescent behavior in the four-level /sup 4/F/sub 3/2//spl rarr//sup 4/I/sub 11/2/ transition which limits the optical conversion efficiency into the three-level transition. Ge-doped silica fibers do not exhibit this limitation and can efficiently amplify in the three-level transition with current laser-diode pump technology.     

A novel strained Si/sub 0.7/Ge/sub 0.3/ surface-channel pMOSFET with an ALD TiN/Al/sub 2/O/sub 3//HfAlO/sub x//Al/sub 2/O/sub 3/ gate stack

Proof-of-concept pMOSFETs with a strained-Si/sub 0.7/Ge/sub 0.3/ surface-channel deposited by selective epitaxy and a TiN/Al/sub 2/O/sub 3//HfAlO/sub x//Al/sub 2/O/sub 3/ gate stack grown by atomic layer chemical vapor deposition (ALD) techniques were fabricated. The Si/sub 0.7/Ge/sub 0.3/ pMOSFETs exhibited more than 30% higher current drive and peak transconductance than reference Si pMOSFETs with the same gate stack. The effective mobility for the Si reference coincided with the universal hole mobility curve for Si. The presence of a relatively low density of interface states, determined as 3.3 /spl times/ 10/sup 11/ cm/sup -2/ eV/sup -1/, yielded a subthreshold slope of 75 mV/dec. for the Si reference. For the Si/sub 0.7/Ge/sub 0.3/ pMOSFETs, these values were 1.6 /spl times/ 10/sup 12/ cm/sup -2/ eV/sup -1/ and 110 mV/dec., respectively.