A low-noise high-precision operational amplifier

A low-noise high-precision operational amplifier has recently been fabricated in monolithic form with dielectric isolation. The amplifier exhibits a V/SUB OS/ of 10 /spl mu/V, V/SUB OS/T/SUB c/ of 0.3 /spl mu/V//spl deg/C, voltage gain of 140 dB with a 600 /spl Omega/ load, and an input noise voltage of 9 nV//spl radic/Hz. The settling time to within 0.01 percent of final value is 15 /spl mu/s for a 10 V pulse.     

A quad CMOS single-supply op amp with rail-to-rail output swing

The realization of a commercially viable, general-purpose quad CMOS amplifier is presented, along with discussions of the tradeoffs involved in such a design. The amplifier features an output swing that extends to either supply rail, together with an input common-mode range that includes ground. The device is especially well suited for single-supply operation and is fully specified for operation from 5 to 15 V over a temperature range of -55 to +125/spl deg/C. In the areas of input offset voltage, offset voltage drift, input noise voltage, voltage gain, and load driving capability, this implementation offers performance that equals or exceeds that of popular general-purpose quads or bipolar of Bi-FET construction. On a 5-V supply the typical V/SUB os/ is 1 Mv, V/SUB os/ drift is 1.3 /spl mu/V//spl deg/C, 1-kHz noise is 36 nV//spl radic/Hz, and gain is one million into a 600-/spl Omega/ load. This device achieves its performance through circuit design and layout techniques as opposed to special analog CMOS processing, thus lending itself to use on system chips built with digital CMOS technology.     

Bipolar high-gain limiting amplifier IC for optical-fiber receivers operating up to 4 Gbit/s

A monolithic integrated high-gain limiting amplifier for future optical-fiber receivers is described. It is characterized by the following features: high insertion-voltage gain (maximum 54 dB); high input dynamic range (about 52 dB) at constant output-voltage swing (400 mV/SUB p-p/); high operating speed (up to at least 4 Gb/s); low power dissipation (350 mW at 50-/spl Omega/ load); standard supply voltage (5 V); 50-/spl Omega/ output buffer; one-chip solution; and small fabrication costs by use of a 2-/spl mu/m standard bipolar technology without needing polysilicon self-aligning processes. The good values of operating speed and power consumption, which the authors believe has until now not nearly been achieved by other comparable bipolar amplifier ICs, are a result of careful circuit design and optimization. The amplifier was extended to a high-sensitivity (amplitude and time) decision circuit operating at up to 4.0 Gb/s by adding a high-speed master-slave D-flip-flop IC fabricated with the same technology.     

A high precision monolithic super-beta operational amplifier

A single-chip (67/spl times/90 mil) integrated-circuit operational amplifier using thin-film resistors and super-gain transistors has been designed to achieve dc follower accuracies of 0.001 percent with 100-k/spl Omega/ source resistance. The circuit achieves gains of 140 dB using thermally balanced layout designs for both input and output stages, nulled drifts of 0.3 /spl mu/V//spl deg/C, and offset currents well under 1 nA. All other dc specifications including power-supply variation error (PSRR), common-mode gain error (CMRR), etc., are in the 1-10 ppm error range; and a procedure is given by which long-term drifts of less than 10 /spl mu/V/month can be assured. AC performance is comparable to general-purpose integrated-circuit operational amplifiers, i.e., f/SUB t/=300 kHz and slew rate of 1.2 V//spl mu/s at gain of ten. The circuit is externally compensated for unity gain with a single 390-pF capacitor and is fully input and output protected.     

Temperature stabilized transistor amplifiers

A design procedure is evolved based on emitter-base voltage V/SUB EB/ and collector-base voltage V/SUB CB/ as stability parameters with the aim of achieving a gain stabilized transistor amplifier against temperature variations. Silicon transistors have been operated with a fairly stabilized gain in the temperature range from -15/spl deg/ to 270/spl deg/C. The voltage and power gains of this amplifier are found to be reasonably stable against unit to unit replacements. The circuits designed according to this approach are particularly suited for operation of long duration at elevated temperatures. The role of the leakage currents in affecting the operation of a several hour duration at elevated temperatures is investigated experimentally and it is found that the low I/SUB CB0/ units are better suited for such an operation. Further experimentations include the study of the gain stability characteristics of the amplifiers using Darlington pairs, CE-CE tandem connections, two stage RC-coupled amplifier, and the different amplifier.     

Optical receiver IC for CD/DVD/blue-laser application

In this paper, an optoelectronic receiver IC for CD, DVD, and Blue-Laser optical data storage applications is presented. The IC was developed in a 0.5-/spl mu/m BiCMOS technology with integrated PIN photodiodes. It includes a new architecture of high-speed and low-noise variable gain transimpedance amplifiers witch current preamplifier input. The amplifier transimpedance gain is programmable over a gain range of 130 /spl Omega/ to 270 k/spl Omega/ by a serial interface. The amplifier small-signal bandwidth is 260 MHz for the highest gain, which gives a gain-bandwidth product of 70 THz/spl Omega/ and a sensitivity improvement by a factor of 2 compared to published OEICs. The amplifiers support a special write/clip mode which realizes a nonlinear gain reduction for high input signals. The output voltage buffers are 130-/spl Omega/ impedance matched for optimized data transmission over a flex cable. The impedance is generated by active-impedance synthesis to increase the output dynamic range.     

A highly linear CMOS buffer amplifier

A CMOS buffer amplifier which achieves significant improvements in linearity and drive capability over previously reported high-swing amplifiers is described. The buffer operates from a 5-V supply, is capable of rail-to-rail operation at both the input and output, an exhibits a remarkably high linearity of 0.05% THD while driving 3 V/SUB p-p/ into 100 /spl Omega/ at 20 kHz.     

Low-power InP/GaAsSb/InP DHBT cascode transimpedance amplifier with GBP/P/sub dc/ of 7.2 GHz/mW

A low-power high gain-bandwidth monolithic cascode transimpedance amplifier using novel InP/GaAsSb/InP DHBT technology was investigated. The amplifier exhibited state-of-the-art performance of 17.3 dB gain, 12 GHz bandwidth, 55 dB/spl Omega/ transimpedance, and a corresponding gain-bandwidth of 6.7 THz/spl Omega/ while consuming only 12.2 mW DC power. It also achieved good gain-bandwidth-product per DC power figure-of-merit (GBP/P/sub dc/) of 7.2 GHz/mW     

High-gain differential CMOS transimpedance amplifier with on-chip buried double junction photodiode

An integrated fully differential CMOS transimpedance amplifier (TIA) with buried double junction photodiode input is described. The TIA features a variable high transimpedance gain (250 k/spl Omega/ to 2.5 M/spl Omega/), large DC photocurrent rejection capability (>55 dB) and low input referred noise density at 100 kHz (2pA//spl radic/Hz).     

An efficient CMOS buffer for driving large capacitive loads

A CMOS class AB high-drive buffer suitable for driving large capacitive and moderate resistive loads is presented. The buffer, designed using 3-/spl mu/m technology, occupies only 100 mils/SUP 2/ of area and dissipates 1.5 mW of DC power from a /spl plusmn/2.5-V supply, yet it is capable of driving a 5000-pF capacitor at over 100-kHz clocking frequency. The buffer achieves good slew rate and fast settling by entering into a high-drive state during slewing and returning to a low-power wide-band state during the settling period. Unconditional stability is attained when C/SUB L//spl ges/100 pF and R/SUB L//spl ges/10 k/spl Omega/. Total harmonic distortion is below 0.5% for over 70% of the full supply range.     

Inductor simulation using a single unity gain amplifier

A circuit consisting of a single unity gain amplifier, two resistors (R/SUB 1/,R/SUB 2/), and a capacitor (C) is presented for realization of a grounded inductor for integrated circuits. The circuit behaves as an inductor with inductance L=CR/SUB 1/R/SUB 2/ and maximum Q/SUB 0/=(R/SUB 1//R/SUB 2/)/SUP 1/2//2. Experimental results agree closely with the theoretical calculations.     

An InGaAs-InP HBT differential transimpedance amplifier with 47-GHz bandwidth

Return-to-zero differential phase-shift keying applications require a differential amplifier with high bandwidth, high gain, low noise, and good input impedance match. In this paper, we describe an InGaAs-InP heterostructure bipolar transistor differential transimpedance amplifier with high bandwidth of 47 GHz and high gain of 56 dB-/spl Omega/. The input-referred current noise is less than 35 pA//spl radic/Hz over the measurement range up to 40 GHz.     

A low-voltage micropower JFET/bipolar operational amplifier

A single cell supply (operable down to 1.2 V) micropower operational amplifier using compatible low pinchoff voltage JFET's (V/SUB p/=0.4 V) in conjunction with standard bipolar technology has been developed. The subvolt pinchoff JFET's have proved useful in the common-mode feedback-assisted biasing of a simple p-n-p input stage to permit single supply operation, the design of a low-voltage high-performance current mirror and a differential to single-ended converter. The amplifier exhibits excellent ac performance (unity gain slew rate=0.25 V//spl mu/s, unity gain bandwidth=850 kHz) with low power dissipation (245 /spl mu/W).     

A Unilateral Parametric Amplifier

A theoretical investigation of a unilateral parametric amplifier using two varactor diodes indicates an improvement of unilateral stability over already existing types. A circuit is suggested which uses lower sideband idler energy for achieving forward gain and upper side-band energy to obtain substantial reverse loss. The phases of the applied signals and of the pump at the two varactors have to be 90/spl deg/ out of phase to achieve unilateral operation. Numerical evaluation of the theoretical results for a signal frequency at 4.0 GHz and a pump frequency at 12.0 GHz, assuming a diode junction capacitance of C/sub j/ = 0.4 pF and a bulk resistance of R/sub s/ = 2/spl Omega/ was done for several pump power levels. For 14 dB maximum forward gain, the 3 dB bandwidth of the gain versus frequency characteristic of the unilateral amplifier is about 18 percent smaller than that of the reflection type amplifier. The maximum reverse loss for these conditions is 7.3 dB. For lower forward gain the backward loss increases relatively until for very low gain values (about 1 dB) the amplifier is unconditionally stable, i.e., the backward loss is larger than the forward gain. The theoretical noise figure is about 1.95 dB at signal center frequency for 14 dB forward gain and, for /spl plusmn/80 MHz from the center frequency, only 0.1 dB higher than for the reflection type amplifier.     

6-k/spl Omega/ 43-Gb/s differential transimpedance-limiting amplifier with auto-zero feedback and high dynamic range

A high-gain, 43-Gb/s InP HBT transimpedance-limiting amplifier (TIALA) with 100-/spl mu/A/sub pp/ sensitivity and 6 mA/sub pp/ input overload current is presented. The circuit also operates as a limiting amplifier with 40-dB differential gain, better than 15-dB input return loss, and a record-breaking sensitivity of 8 mV/sub pp/ at 43 Gb/s. It features a differential TIA stage with inductive noise suppression in the feedback network and consumes less than 450mW from a single 3.3-V supply. The TIALA has 6-k/spl Omega/ (76dB/spl Omega/) differential transimpedance gain and 35-GHz bandwidth and comprises the transimpedance and limiting gain functions, an auto-zero dc feedback circuit, signal level monitor, and slicing level adjust functions. Other important features include 45-dB isolation and 800-mV/sub pp/ differential output.     

Substrate coupling in a high-gain 30-Gb/s SiGe amplifier-modeling, suppression, and measurement

For demonstrating substrate coupling in high-gain broadband amplifiers, a limiting differential transimpedance amplifier has been developed and fabricated in a SiGe bipolar technology. It operates up to 30 Gb/s and stands out for a maximum (nonlinear) transimpedance in the limiting mode of 25 k/spl Omega/, resulting in a gain /spl times/ speed product as high as 750 k/spl Omega//spl middot/Gb/s. This record value could be achieved by applying several techniques for suppression of noise coupling simultaneously. The effectiveness of each technique was verified experimentally by measuring the output eye diagrams of different mounted amplifier versions. The high accuracy potential of the substrate modeling tools applied for optimizing the amplifier design has been demonstrated separately by measurements on special (mounted) test structures up to 40 GHz. These investigations also showed the strong degradation of shielding measures by bond inductances with increasing frequency.     

An amplifier with bipolar transistors and extremely high input impedance

A differential amplifier with unity gain, less than 10 to 50 mV offset, and a dc input resistance of 900 M/spl Omega/ was examined using complementary bipolar transistors.     

Amplifier techniques for combining low noise, precision, and high-speed performance

A monolithic operational amplifier is presented which optimizes voltage noise both in the audio frequency band, and in the low frequency instrumentation range. In addition, the design demonstrates that the requirements for low noise do not necessitate compromising the specifications in other respects. Techniques are set forth for combining low noise with high-speed and precision performance for the first time in a monolithic amplifier. Achieved results are: 3 nV//spl radic/Hz white noise, 80 nV/SUB p-p/ noise from 0.1 to 10 Hz, 17 V//spl mu/s slew rate, 63 MHz gain-bandwidth product, 10 /spl mu/V offset voltage, 0.2 /spl mu/V//spl deg/C drift with temperature, 0.2 /spl mu/V/month drift with time, and a voltage gain of two million.     

A dual-path bandwidth extension amplifier topology with dual-loop parallel compensation

A dual-path amplifier topology with dual-loop parallel compensation technique is proposed for low-power three-stage amplifiers. By using two parallel high-speed paths for high-frequency signal propagation, there is no passive capacitive feedback network loaded at the amplifier output. Both the bandwidth and slew rate are thus significantly improved. Implemented in a 0.6-/spl mu/m CMOS process, the proposed three-stage amplifier has over 100-dB gain, 7-MHz gain-bandwidth product, and 3.3-V//spl mu/s average slew rate while only dissipating 330 /spl mu/W at 1.5 V, when driving a 25-k/spl Omega///120-pF load. The proposed amplifier achieves at least two times improvement in bandwidth-to-power and slew-rate-to-power efficiencies than all other reported multistage amplifiers using different compensation topologies.     

A 3.6-MHz cutoff frequency CMOS elliptic low-pass switched-capacitor ladder filter for video communication

The high frequency (HF) behavior of the switched-capacitor (SC) LDI ladder filter is studied. This study shows that using low sampling frequency with respect to the cutoff frequency reduces the HF error due to the reduction in amplifier gain. Design techniques are also given for the HF SC filters, such as double-sampling scheme, a low sampling frequency with an exact synthesis algorithm, as well as a fast-settling folded-cascode amplifier. These techniques are applied to an experimental fifth-order elliptic SC filter fabricated in a 2-/spl mu/m CMOS technology. The experimental results show that a 3.6-MHz cutoff frequency is attained. All the capacitors are scaled down in order to reduce the setting time of the amplifiers. The active area of the filter is 0.9 mm/SUP 2/. The F/SUB sampling//F/SUB cutoff/ is only 5. The circuit operates from /spl plusmn/5 V and typically dissipates 80 mW when sampled at 18 MHz.