Design issues in a CDMA cellular system with heterogeneous traffictypes

In this paper, the performance of a code-division multiple-access (CDMA) cellular system with various traffic types is examined. Traffic integration and resource management are two major issues in the design of the next generation of wireless networks with integrated services. To provide design guidelines for traffic integration, the impact of the line rate (actual transmission bit rate in the radio channel) selection on the system capacity is examined. Since in a CDMA system the signal from one specific user is spread over the entire available bandwidth, the actual bandwidth resource occupied by a user depends on the amount of the transmission power of the user. In this paper, we also address how to assign suitable power levels to the different traffic types. A method for optimizing the power assignment for multiple traffic types is developed     

信息系统集成过程中存在的风险问题研究

随着计算机技术、网络技术以及通信技术的飞速发展,我国现代化企业的信息化水平得到了快速的提升。其中办公自动化、管理信息系统等多种信息系统对其企业以及其政府部门的工作都起到了前所未有的推动作用。在企业的发展当中,随着规模的不断扩大,也需要对企业内部的信息系统作出有效的共享,不断地加强企业内部的各部门之间的信息交流。在文章当中首先对信息系统集成进行了概述;其次对信息系统在集成当中存在的问题作出了分析;最后在实际应用的基础上提出了改善的措施。     

Reliability issues for flip-chip packages

In this article, we review the reliability issues for plastic flip-chip packages, which have become an enabling technology for future packaging development. The evolution of area-array interconnects with high I/O counts and power dissipation has made thermal deformation an important reliability concern for flip-chip packages. Significant advances have been made in understanding the thermo-mechanical behavior of flip-chip packages based on recent studies using moiré interferometry. Results from moiré studies are reviewed by focusing on the role of the underfill to show how it reduces the shear strains of the solder balls but shifts the reliability concern to delamination of the underfill interfaces. The development of the high-resolution moiré interferometry based on the phase-shift technique provided a powerful method for quantitative analysis of thermal deformation and strain distribution for high-density flip-chip packages. This method has been applied to study plastic flip-chip packages and the results and impacts on delamination at the die/underfill interface and in the underfill region above the plated through-hole via are discussed. Here a related reliability problem of die cracking during packaging assembly and test is also discussed. Finally, we discuss briefly two emerging reliability issues for advanced flip-chip packages, one on the packaging effect on Cu/low k interconnect reliability and the other on electromigration of solder balls in flip-chip packages.     

Reliability issues of flash memory cells

Reliability issues for flash electrically erasable programmable read-only memories are reviewed. The reliability of both the source-erase type (ETOX) flash memory and the NAND structure EEPROM are discussed. Disturbs during programming, write/erase endurance, charge loss of both devices are reviewed, and the reliability of the tunnel oxide and the interpoly dielectric are described. It is shown that bipolarity F-N programming/erase, which is used in the NAND EEPROM, improves the charge to breakdown and decreases the stress-induced leakage current     

Spectrum harvesting for heterogeneous wireless networks integration

Massive capacity demand is a major impetus behind the advances, in various ways, of today and near future wireless communication networks. To face this challenge, more wireless spectrum is needed, efficient usage of this spectrum is necessary, and adequate architectures are required. In this paper, we present a conceptual solution based on a cognitive-radio-inspired cellular network, for integrating idle spectrum resources of different wireless networks into a single mobile heterogeneous wireless network. We describe the conceptual architecture of this integrating network, referred to as Integrating cognitive-radio-inspired cellular network (I-CRICNet), and present a cooperative spectrum-harvesting scheme that keeps the former supplied with spectrum resources. In the latter scheme, we make extensive use of cross-correlated sequences (CSSs), for events signaling purposes. This choice is motived by the particularly interesting characteristics of the CSSs, namely, duration shortness, robustness to bad radio conditions, detection rather than decoding, and low probability of collision. As an illustration, we propose a reporting and detection scheme, in the context of OFDMA systems, and provide performance results from simulations to validate our proposal.

     

基于KETTLE的高校多源异构数据集成研究及实践

解决数字化校园建设中的多源异构数据集成问题.利用开源ETL工具KETⅡE,对学生考试信息与上网信息的抽取、转换和加载.ETL模型自动生成了以上网行为事实表为中心表,以学生信息、上网信息、时间3个维度表的数据仓库.利用KETTLE能够快速实现高校多源异构数据集成,形成高质量的分析型数据,为决策支持服务.     

面向数字化校园的异构数据集成技术研究

分析了数字化校园建设过程中异构数据集成的重要性,详细介绍了异构数据库系统的特征和异构数据集成的几种方法,研究XML在异构数据集成方面的应用。在此基础上,设计出基于XML的异构数据集成模型,来解决数字化校园建设中的"信息孤岛"问题。     

面向数字化校园的异构数据集成技术研究

分析了数字化校园建设过程中异构数据集成的重要性,详细介绍了异构数据库系统的特征和异构数据集成的几种方法,研究XML在异构数据集成方面的应用.在此基础上,设计出基于XML的异构数据集成模型,来解决数字化校园建设中的"信息孤岛"问题.     

Reliability issues for nano-scale CMOS dielectrics

Continuous scaling, necessary for enhanced performance and cost reduction, has pushed existing CMOS materials much closer to their intrinsic reliability limits, forcing reliability engineers to get a better understanding of circuit failure. This requires that designers will have to be very careful with phenomena such as high current densities or voltage overshoots. In addition to the reliability issues, new materials as metal gates and high-k gate dielectrics have been integrated. These new materials require that we gain understanding of the reliability physics related to these new materials (such as Vt instability, gate oxide breakdown) and that we develop high confidence-level design rules.     

Reliability issues of low-cost overmolded flip-chip packages

A significant need exists for the determination of critical stress characteristics within the low-cost overmolded flip-chip (OM-FC) packages. A systematic stress analysis is reported to investigate the OM-FC package for the optimal design of package geometries, materials combinations during the attachment, and thermal testing processes. A parametric study is conducted seeking the best package performance during the identified most stringent process which causes the largest stress within the low-cost substrate. High-stress location is predicted by finite-element analysis, and it was found that mold compound (MC) curing is the most stringent process for the reliability of substrate; higher underfill fillet, thicker die, larger die size without causing edge effect, solder mask defined structure resulted in smaller stresses in substrate. MC with lower coefficient of thermal expansion is a preferable and compliant substance that is good for using as molding and underfill material     

基于XML的异构数据库集成的研究

主要介绍了异构数据库中数据集成的原理以及主要的集成技术，对基于XML的异构数据库集成方法进行了研究，分析了XML与关系数据库之间的映射，并给出相应解决方案。     

基于XML的异构数据库集成中间件的研究

为了有效地利用信息资源,实现数据共享,提出了一个基于XML的异构数据库集成中间件的解决方案.着重阐述了该中间件的设计思路和各个模块的功能和实现过程.通过实现关系数据到XML数据的转化、集成,该中间件屏蔽了各个异构数据源的平台、系统环境、内部数据结构等方面的异构性,为用户提供了一个统一和透明的访问接口.     

异构系统数据集成技术在DMS中的应用

配电管理(Distribution Management)是指应用计算机、通信和自动控制技术等对配电网设备、用户电气设备进行监控及管理。如何实现信息的共享,异构系统的数据集成,是目前配电管理系统的一个难点。在分析现有的数据库数据转换方式的基础上,提出了对配电管理系统进行系统集成的设计方案,尤其是对数据集成的实现方法作了阐述。     

Reliability issues in Pb-free solder joint miniaturization

As solder joints become increasingly miniaturized to meet the severe demands of future electronic packaging, it is vitally important to consider whether the solder joint size and geometry could become reliability issues and thereby affect implementation of the Pb-free solders. In this study, three bumping techniques, i.e., solder dipping, stencil printing followed by solder reflow, and electroplating of solders with subsequent reflow, were used to investigate the interfacial interactions of molten Sn-3.5Ag, Sn-3.8Ag-0.7Cu, and pure Sn solders on a copper pad at 240°C. The resultant interfacial microstructures, coming from a variety of Cu pads, with sizes ranging from 1 mm to 25 μm, and representing different solder bump geometries, have been investigated. In addition, a two-dimensional thermodynamic/kinetic model has been developed to assist the understanding of the kinetics of interdiffusion and the formation of interfacial intermetallic compounds. Experimental results and theoretical predictions both suggest that the solder bump size and geometry can influence the as-soldered microstructure; therefore, this factor should be taken into consideration for the design of future reliable ultrafine Pb-free solder joints.     

Reliability evaluation of Si-dies due to assembly issues

Silicon based semiconductor devices are stressed during fabrication, handling and packaging with significant thermal and mechanical loadings. In worst cases, these induced loadings can cause initial chip damage leading to electrical failure or fracture of the Si-die during further process steps or application. In order to evaluate the risk of pre-damage during assembly, a case study of potential failure modes taking pick-and-place processes into account was performed. Therefore, pre-damaged samples using a misaligned pick-and-place setup were generated. Afterwards, methods of microstructural crack analyses and mechanical strength testing were applied to evaluate the damage impact of the generated needle imprint. In addition, finite element analyses in combination with fracture mechanical approaches were combined to evaluate the failure probability of Si-dies during the following assembly or thermal cycling steps. As a result of this study, critical process steps during chip assembly can be identified and critical tolerance limits of the process can be evaluated to achieve an acceptable reliability level. Consequently, the risk of failure caused by handling or assembly issues can be estimated and appropriate steps for quality assurance procedures can be defined.     

基于协作者的异构数据集成模型研究

为了保护企业既有投资,低成本实现异构数据源数据的有效集成,现对传统的"协作者"集成模型进行了扩充,变为语义处理、集成算法处理、优化和执行引擎4个模块。另外,针对异构数据集成的特点,定义了异构数据集成的数据结构,并利用Web服务合成技术对模型进行了验证。     

硅基异质集成化合物半导体技术新进展

随着摩尔定律即将走向尽头,以及军民电子信息系统对多功能集成、高密度集成、小体积重量、低功耗、大带宽、低延迟等性能的持续追求,将多种化合物半导体材料体系(如GaN、InP、SiC等)的功能器件、芯片,与CMOS集成电路的芯片进行异质集成的技术正在拉开序幕,将在微电子、光电子等领域带来一场新的革命,硅基异质集成也被认为是发展下一代集成微系统的技术平台。本文梳理了射频微电子学与硅光子学领域中以化合物半导体为主的材料(或芯片)与硅半导体材料(或芯片)异质集成的最新进展,以期国内相关领域研究人员对国外的进展有一个比较全面的了解。     

Reliability issues of GaN based high voltage power devices

GaN based power devices for high efficiency switching applications in modern power electronics are rapidly moving into the focus of world wide research and development activities. Due to their unique material properties GaN power devices are distinguished by featuring high breakdown voltages, low on-state resistances and fast switching properties at the same time. Finally, these properties are the consequences of extremely high field and current densities that are possible per unit device volume or area. Therefore, in order to obtain very high performance, the material itself is stressed significantly during standard device operation and any imperfection may lead to wear out and reliability problems. Thus material quality, the specific epitaxial design as well as the device topology will directly influence device performance, reliability and mode of degradation. The paper will mainly discuss those degradation mechanisms that are especially due to the specific material combinations used in GaN based high voltage device technology such as epitaxial layer design, chip metallization, passivation schemes and general device topology and layout. It will then discuss technological ways towards engineering reliability into these devices. Generally, device designs are required that effectively minimize high field regions in the internal device or shift them towards less critical locations. Furthermore, an optimized thermal design in combination with suitable chip mounting technologies is required to enable maximum device performance.     

Reliability issues of scaled-down MOS transistors for gigabit circuits

The basic reliability issues of very small MOS transistors are addressed in this review and reliability constraints, such as trap-assisted tunneling, current increase at corner regions, oxide stability, oxide damage during processing, and hot carrier degradation are discussed. No major problems are expected for MOS transistors scaled down to their physical limits.