Active noise control: a tutorial review

Active noise control (ANC) is achieved by introducing a cancelling “antinoise” wave through an appropriate array of secondary sources. These secondary sources are interconnected through an electronic system using a specific signal processing algorithm for the particular cancellation scheme. ANC has application to a wide variety of problems in manufacturing, industrial operations, and consumer products. The emphasis of this paper is on the practical aspects of ANC systems in terms of adaptive signal processing and digital signal processing (DSP) implementation for real-world applications. In this paper, the basic adaptive algorithm for ANC is developed and analyzed based on single-channel broad-band feedforward control. This algorithm is then modified for narrow-band feedforward and adaptive feedback control. In turn, these single-channel ANC algorithms are expanded to multiple-channel cases. Various online secondary-path modeling techniques and special adaptive algorithms, such as lattice, frequency-domain, subband, and recursive-least-squares, are also introduced. Applications of these techniques to actual problems are highlighted by several examples     

Encoder-free odometric system for autonomous microrobots

This paper describes an odometric system for autonomous microrobots based on the optical properties of a motor–wheel transmission for motion feedback. We demonstrate that infra-red light, reflected from this mechanical system, shows distinctive periodic changes of amplitude, correlated with the motion of the robot. Real-time odometric signal processing, performed on a small embedded microcontroller, allows accurate movement detection for each wheel and is used for motion control, self-calibration, and calculation of differential and absolute velocity, displacement and rotation. We demonstrate some applications of this on-board odometric system in swarm robot experiments. This approach can also be applied to other industrial or academic mechatronic systems, where size or computational power are limiting factors.     

DSP control of high-power UPS systems feeding nonlinear loads

Many facilities, such as patient health care centers, data processing systems, and critical telecommunication links, rely on uninterruptible power supplies (UPS) to maintain a continuous supply of power in case of a line outage. In addition to requiring continuous power, many critical nonlinear loads are sensitive to incoming line transients and input harmonic voltage distortion. Conventional UPS systems operate to protect against such disturbances using complex filtering schemes, often employing large passive components. This paper presents the advantages of using real time digital signal processing (DSP) control of UPS systems. A DSP controlled UPS inverter and harmonic conditioning system is described and the performance is verified on a 150 kVA system     

左心室转子多路测试与控制系统

在工业生产和科学技术研究的各行业中,常常利用PC或工控机对各种数据进行采集.数据采集技术是信息科学的重要分支,是传感器、信号获取、存储与处理等信息技术结合.左心室转子位移多路测试系统是一种由4个部分构成的系统,包括电涡流传感器多路数据采集,A/D转换,高速的处理芯片DSP,12864液晶显示,多路DA功率驱动.主要是通过电涡流传感器采集信号,利用A/D转换器采集人工心脏转子位移信号,再通过PID实现对系统的控制,并且将多路采集的数据在12864液晶显示屏上直观的显示出来.     

Early Stage Automatic Strategy for Power-Aware Signal Processing Systems Design

Complexity management, portability and long term adaptivity are common challenges in different fields of embedded systems, normally colliding with the needs of efficient resource utilization and power balance. Image/signal processing systems, though required to offer a large variety of complex functions, have also to deal with battery-life limitations. Wearable signal processing systems, for example, should provide high performance and support new generation standards without compromising their portability and their long-term usability. These constraints challenge hardware designers: early stage trade-off analysis and power management automated techniques are helpful to guarantee a reasonable time-to-market. In the field of video codec specifications, the MPEG standard known as Reconfigurable Video Coding (RVC) framework addresses functional complexity and adaptivity leveraging on the intrinsic modularity of the dataflow model of computation, but it still lacks in offering power management support. The main contribution of this work is providing an automatic early-stage power management methodology to be adopted within the MPEG-RVC context. Starting from different high-level specifications, our mapping methodology identifies directly on the high-level models disjointed homogeneous logic clock regions, where the platform resources can be enabled/disabled together without affecting the overall system performance. To extend its usability to the RVC community, we have integrated this methodology within the Multi-Dataflow Composer (MDC) tool. MDC is a tool for on-the-fly reconfigurable signal processing platforms deployment. In this paper, we extended MDC to address power-aware multi-context systems. To prove the effectiveness of our work, a coprocessor for image and video processing acceleration has been assembled. This latter has been synthesized on a 90 nm ASIC technology, where demonstrated up to 90 % of reduction in the dynamic power consumption on different dataflow-intensive applications. The coprocessor has been implemented also on FPGA, confirming, partially, the benefits of adopting the proposed methodology.     

基于SPW的PSK数字通信系统仿真与分析

在现代通信系统设计中,计算机仿真设计可以快速构建系统模型,降低开发成本和周期,实现性能评估、系统优化的目的.讨论了数字信号处理和通信系统仿真设计软件SPW的功能、应用,依据PSK通信系统原理,设计出了基于SPW的BPSK系统模型.调试、仿真获得了系统关键信号的时域波形、眼图及功率谱,结果表明仿真设计满足系统性能要求.     

Semantic information processing in industrial networks

The industrial Internet of things (industrial IoT, IIoT) aims at connecting everything, which poses severe challenges to existing wireless communication. To handle the demand for massive access in future industrial networks, semantic information processing is integrated into communication systems so as to improve the effectiveness and efficiency of data transmission. The semantic paradigm is particularly suitable for the purpose-oriented information exchanging scheme in industrial networks. To illustrate its applicability, typical industrial data are investigated, i. e. , time series and images. Simulation results demonstrate the superiority of semantic information processing, which achieves a better rate-utility tradeoff than conventional signal processing.     

虚拟仪器和混合编程用于快速构建信号处理平台

将主要用于测控领域的虚拟仪器扩展作为一种通用信号处理平台。以NI的LabVIEW为框架,以NI的数据采集卡为主要硬件设计了一个完整的信号处理平台,在该平台上可以快速构建多种多样的信号处理系统,实现数据的现场采集与处理。此外,针对LabVIEW的一些不足,平台提供了多种编程语言的接口,使用者可以根据需要,选用Matlab,C语言等填写核心算法,从而发挥各种编程语言的优点,增强平台的通用性且丰富了系统的功能。最后,运用该平台搭建了2FSK信号解调系统,验证了该平台的通用性和有效性。     

Algorithm-based low-power and high-performance multimedia signalprocessing

Low power and high performance are the two most important criteria for many signal-processing system designs, particularly in real-time multimedia applications. There have been many approaches to achieve these two design goals at many different implementation levels ranging from very-large-scale-integration fabrication technology to system design. We review the works that have been done at various levels and focus on the algorithm-based approaches for low-power and high-performance design of signal processing systems. We present the concept of multirate computing that originates from filterbank design, then show how to employ it along with the other algorithmic methods to develop low-power and high-performance signal processing systems. The proposed multirate design methodology is systematic and applicable to many problems. We demonstrate that multirate computing is a powerful tool at the algorithmic level that enables designers to achieve either significant power reduction or high throughput depending on their choice. Design examples on basic multimedia processing blocks such as filtering, source coding, and channel coding are given. A digital signal-processing engine that is an adaptive reconfigurable architecture is also derived from the common features of our approach. Such an architecture forms a new generation of high-performance embedded signal processor based on the adaptive computing model. The goal of this paper is to demonstrate the flexibility and effectiveness of algorithm-based approaches and to show that the multirate approach is an effective and systematic design methodology to achieve low-power and high throughput signal processing at the algorithmic and architectural level     

Activity Measures for Fast Relative Power Estimation in Numerical Transformation for Low Power DSP Synthesis

In this paper, we propose a method for power optimization of digital signal processing (DSP) systems through reduction of circuit switching activity estimated from high levels in the synthesis hierarchy, namely at numerical and algorithmic levels. The optimization involves application of a numerical transformation called number-splitting on the system characteristic coefficients. The transformation alters the system characteristic coefficients while preserving the input/output relations. For each set of candidate coefficients, the corresponding signal flow-graph is constructed for evaluation of power consumption. First, the switching activity at all computation nodes of the graph are estimated using our novel activity transformation models, which quickly estimate the activity at the output of the adders and multipliers based on the activity at the inputs. Next, the activity at the inputs of each computation node are used to compute the average power consumption by that node, using our heuristic power estimators.The optimization framework can be applied to hardware-dedicated bit-serial, nibble-serial, as well as programmable word-parallel architectures. We focus on hardware-dedicated bit-serial systems, and show that up to 35 percent savings in power is achievable.     

Electronic-nose for detecting environmental pollutants: signal processing and analog front-end design

Environmental monitoring relies on compact, portable sensor systems capable of detecting pollutants in real-time. An integrated chemical sensor array system is developed for detection and identification of environmental pollutants in diesel and gasoline exhaust fumes. The system consists of a low noise floor analog front-end (AFE) followed by a signal processing stage. In this paper, we present techniques to detect, digitize, denoise and classify a certain set of analytes. The proposed AFE reads out the output of eight conductometric sensors and eight amperometric electrochemical sensors and achieves 91 dB SNR at 23.4 mW quiescent power consumption for all channels. We demonstrate signal denoising using a discrete wavelet transform based technique. Appropriate features are extracted from sensor data, and pattern classification methods are used to identify the analytes. Several existing pattern classification algorithms are used for analyte detection and the comparative results are presented.     

Bridging the gap between signal and power

Signal processing has been used in many different applications, including electric power systems. This is an important category, since a wide variety of digital measurements is available and data analysis is required to deliver diagnostic solutions and correlation with known behaviors. Measurements are taken at numerous locations, and the analysis of data applies to a variety of issues in ? power quality (PQ) and reliability ? power system and equipment diagnostics ? power system control ? power system protection. This article focuses on problems and issues related to PQ and power system diagnostics, in particular those where signal processing techniques are extremely important. PQ is a general term that describes the quality of voltage and current waveforms. PQ problems include all electric power problems or disturbances in the supply system that prevent end-user equipment from operating properly. Examples of voltage and current variations that can result in PQ problems include voltage interruptions, long- and short-duration voltage variations, steady-state research opportunities that use the measured voltages and currents to indicate possible equipment and system problems (referred to as equipment diagnostics).     

Technology for the 1990s

A forecast of the practical and promising devices, circuits, and systems that can be expected in the next one to five years is presented. It is based on a survey of a group of distinguished practitioners throughout the industry. The forecasts cover the areas of lasers and electrooptics, integrated optoelectronics, electron devices, digital integrated circuits, high-frequency and microwave devices, VLSI signal and image processing systems, analog ICs and signal processing, power electronics and systems, neural systems and applications, and medical image and signal processing. A particularly optimistic outlook is seen for lasers, fiber optics, optoelectronic ICs, and optical switching and processing. Digital ICs and power electronics are also expected to make steady gains. In addition, flat panel displays will attract a fair amount of activity, with the liquid-crystal and electroluminescent types emerging as the leaders in this decade. Looking further out, advances in artificial and biological neural systems represents a natural extension to more sophisticated problem-solving in speech processing, vision and communications     

Data Reuse Exploration for Low Power Motion Estimation Architecture Design in H.264 Encoder

Data access usually leads to more than 50% of the power cost in a modern signal processing system. To realize a low-power design, how to reduce the memory access power is a critical issue. Data reuse (DR) is a technique that recycles the data read from memory and can be used to reduce memory access power. In this paper, a systematic method of DR exploration for low-power architecture design is presented. For a start, the signal processing algorithms should be formulated as the nested loops structures, and data locality is explored by use of loop analysis. Then, corresponding DR techniques are applied to reduce memory access power. The proposed design methodology is applied to the motion estimation (ME) algorithms of H.264 video coding standard. After analyzing the ME algorithms, suitable parallel architectures and processing flows of the integer ME (IME) and fractional ME (FME) are proposed to achieve efficient DR. The amount of memory access is respectively reduced to 0.91 and 4.37% in the proposed IME and FME designs, and thus lots of memory access power is saved. Finally, the design methodology is also beneficial for other signal processing systems with a low-power consideration.

An image signal multiprocessor on a single chip

A digital image signal multiprocessor (ISMP), a multiprocessor version of a previous real-time image signal processor (RISP) for gray-level image processing, is discussed. It is composed of a main controller and four processor elements (PEs), which are programmable 12-b digital signal processors. One PE has the processing speed of 50-million microinstructions-per-second. The ISMP has 200-million microinstructions-per-second performance using parallel processing with a round-robin method for local image processing. In the other operation mode, each PE processes the same image data with different feature-extracting programs. In addition, system processing power can be easily increased through a novel multichip processing mode. It has 30000 transistors on a 14.4-mm×13.7-mm chip using 1.2-μm double-metal CMOS process technology. Its power dissipation is 2.9 W     

TMS320并行处理技术在地面雷达信号处理中的应用研究

现代雷达信号处理设备的研制不仅对处理速度要求越来越高,并且对设备的体积和功耗也有苛刻的要求.为此,本文针对地面脉冲多普勒雷达信号处理的基本要求,研究以双片TMS320C25数字信号处理器构成的并行处理系统,完成对运动目标的检测.文中对并行处理系统的一些关键问题进行了较深入的研究,如解决输入数据的瓶颈效应,双片TMS320C25的同步协调问题等.此并行处理系统既能满足实时处理,又能大大缩小没备的体积和功牦.     

Rapid prototyping methodology for multiprocessor implementation of digital signal processing systems

A methodology for the hierarchical partitioning and mapping of digital signal processing (DSP) tasks to heterogeneous local cluster based network of very large scale integration (VLSI) processors is presented. The goal is to achieve rapid prototyping of VLSI DSP systems. The high level partitioning issues of DSP task graphs and the proposed metrics to guide the partitioning process are described in this paper. Partitioning tominimize power inefficiency in the DSP system is one important metric addressed by this work, since low power signal processing is paramount to new portable and high density multi-chip module (MCM) DSP systems. The application of theRatio Cut Partitioning approach to DSP graphs is explained. We illustrate our results with examples and show how the final partitions vary depending upon the target architecture to meet rapid prototyping requirements. We compare our approach with known techniques and show that it works much better for our target applications.     

Design and Synthesis of a Multiprocessor System-on-Chip Architecture for Real-Time Biomedical Signal Processing in Gamma Cameras

MPSoC (Multi-Processor System-on-Chip) architecture is becoming increasingly used because it can provide designers much more opportunities to meet specific performance and power goals. In this paper, we propose an MPSoC architecture for implementing real-time signal processing in gamma camera. Based on a fully analysis of the characteristics of the application, we design several algorithms to optimize the systems in terms of processing speed, power consumption, and area costs etc. Two types of DSP core have been designed for the integral algorithm and the coordinate algorithm, the key parts of signal processing in a gamma camera. An interconnection synthesis algorithm is proposed to reduce the area cost of the Network-on-Chip. We implement our MPSoC architecture on FPGA, and synthesize DSP cores and Network-on-Chip using Synopsys Design Compiler with a UMC 0.18  \upmum\upmu\textrm m standard cell library. The results show that our technique can effectively accelerate the processing and satisfy the requirements of real-time signal processing for 256 × 256 image construction.