Cycle time analysis for wafer revisiting process in scheduling of single-arm cluster tools

Some wafer fabrication processes performed by cluster tools require revisiting. With wafer revisiting, a cluster tool is very difficult to be scheduled due to a large number of possible schedules for the revisiting process. Atomic layer deposition (ALD) is a typical process with wafer revisiting that should be performed by cluster tools. This paper discusses the scheduling problem of single-arm cluster tools for the ALD process. In scheduling such a system, the most difficult part is to schedule the revisit...     

晶圆重入加工的组合设备终止暂态的调度与分析

晶圆重入是半导体组合设备加工中典型的复杂加工工艺,分析和优化暂态加工过程对于晶圆重入加工具有重要意义.为了满足加工需求和提高组合设备的加工性能,基于稳态重入加工的双臂组合设备Petri网模型和1-晶圆周期调度策略,采用虚拟晶圆的加工模式分析了系统的终止暂态过程,讨论了系统终止暂态的加工时间分布,并给出相应的解析式进行描述.利用eM-Plant仿真平台建立了重入加工的双臂组合设备终止暂态的仿真模型,并用例子验证了1-晶圆周期调度的可行性及解析式的有效性,为研究晶圆重入加工过程的优化提供了有效方法和手段.     

Intelligent scheduling approaches for a wafer fabrication factory

The production system of a wafer fabrication factory is a very complicated process. Job scheduling in a wafer fabrication factory is a very difficult task. To solve this problem, two intelligent scheduling rules are proposed in this study. The intelligent scheduling rules are modified from the well-known fluctuation smoothing rules with some innovative treatments. To evaluate the effectiveness of the proposed methodology, production simulation was also applied in this study. According to experimental results, the proposed methodology outperformed some existing approaches by reducing the average cycle time and cycle time standard deviation, the most important objectives of job scheduling in a wafer fabrication factory.     

A self-adaptive agent-based fuzzy-neural scheduling system for a wafer fabrication factory

A self-adaptive agent-based fuzzy-neural system is constructed in this study to enhance the performance of scheduling jobs in a wafer fabrication factory. The system integrates dispatching, performance evaluation and reporting, and scheduling policy optimization. Unlike in the past studies a single pre-determined scheduling algorithm is used for all agents, in this study every agent develops and modifies its own scheduling algorithm to adapt it to the local conditions. To stabilize the performance of the self-adaptive agent-based fuzzy-neural scheduling system, some treatments have also been taken. To evaluate the effectiveness of the proposed methodology and to make comparison with some existing approaches, production simulation is also applied in this study to generate some test data. According to experimental results, the self-adaptive agent-based fuzzy-neural system did improve the performance of scheduling jobs in the simulated wafer fabrication factory, especially with respect to the average cycle time and cycle time standard deviation.     

Scheduling Dual-Arm Cluster Tools With Multiple Wafer Types and Residency Time Constraints

Accompanying the unceasing progress of integrated circuit manufacturing technology, the mainstream production mode of current semiconductor wafer fabrication is featured with multi-variety, small batch, and individual customization, which poses a huge challenge to the scheduling of cluster tools with single-wafer-type fabrication. Concurrent processing multiple wafer types in cluster tools, as a novel production pattern, has drawn increasing attention from industry to academia, whereas the corresponding research remains insufficient. This paper investigates the scheduling problems of dual-arm cluster tools with multiple wafer types and residency time constraints. To pursue an easy-to-implement cyclic operation under diverse flow patterns,we develop a novel robot activity strategy called multiplex swap sequence. In the light of the virtual module technology, the workloads that stem from bottleneck process steps and asymmetrical process configuration are balanced satisfactorily. Moreover, several sufficient and necessary conditions with closed-form expressions are obtained for checking the system's schedulability. Finally, efficient algorithms with polynomial complexity are developed to find the periodic scheduling, and its practicability and availability are demonstrated by the offered illustrative examples.     

Using an artificial neural network prediction model to optimize work-in-process inventory level for wafer fabrication

A proper selection of a work-in-process (WIP) inventory level has great impact onto the productivity of wafer fabrication processes, which can be properly used to trigger the decision of when to release specific wafer lots. However, the selection of an optimal WIP is always a tradeoff amongst the throughput rate, the cycle time and the standard deviation of the cycle time. This study focused on finding an optimal WIP value of wafer fabrication processes by developing an algorithm integrating an artificial neural network (ANN) and the sequential quadratic programming (SQP) method. With this approach, it offered an effective and systematic way to identify an optimal WIP level. Hence, the efficiency of finding the optimal WIP level was greatly improved.     

Intelligent maintenance prediction system for LED wafer testing machine

Achieving high quality production of light-emitting diode (LED) wafers requires robust monitoring and the use of a stable test machine. In many factories, production continues 24 h a day. Stopping the manufacturing process at a factory is often difficult. Therefore, reducing inspection time and ensuring the stability of test machines are important. Traditionally, LED wafer factories examine their test machines during periodic maintenance. Standard lamp adjustments are performed to ensure their accuracy. This process interrupts the manufacturing process and requires extra manpower. It reduces productivity and increases production cost. Additionally, the accurate assessment of the aging of the components of the machine requires an experienced engineer. Correctly timing the maintenance and replacing the aging components of the LED wafer test machine are important. This work performed feature extraction to identify the working attributes of an LED wafer test machine. The intelligent maintenance prediction system then uses the radial basis function neural network and variability of the working attributes to predict the maintenance times and aging of the LED wafer test machines. Experimental results reveal that the accuracy of proposed system in predicting maintenance times exceeds 98 %.     

An extended event graph with negative places and tokens for time window constraints

We introduce places with negative holding times and tokens with negative token counts into a timed event graph in order to model and analyze time window constraints. We extend the enabling and firing rules for such an extended event graph named a negative event graph (NEG). We develop necessary and sufficient conditions based on the circuits for which the NEG is live, that is, an infinite sequence of feasible firing epochs exist for each transition. We prove that the minimum cycle time is the same as the maximum circuit ratio of the circuits with positive token counts. We also show that when there exists circuits with negative token counts, the maximum cycle time is bounded and the same as the minimum circuit ratio of such circuits. A scheduling example for a robot-based cluster tool with wafer residency time constraints for semiconductor manufacturing is explained. Note to Practitioners-Scheduling and control problems for modern man-made systems, including automated manufacturing systems such as cluster tools for semiconductor manufacturing, microcircuits, and real-time software systems, are usually modeled as discrete event systems. Such systems often have strict time constraints on timings of some events. Our results can be used for identifying whether there can be a feasible schedule that satisfies all time constraints, computing the range of the feasible cycle times, and determining a steady schedule with the minimum cycle time. By using the feasibility condition, we also can accommodate the system configuration, the task times, and the task sequence so that the system can satisfy the time constraints while meeting the target cycle time. Such practice is already used for real cluster tool engineering. We have more results on implementing a real-time scheduler and controller for time constrained systems.     

具有清洗工艺的单臂组合设备终止暂态调度

随着多品种小批量生产模式的普及,导致了组合设备频繁的暂态加工过程.为了提高组合设备的生产柔性,同时考虑晶圆驻留时间约束和腔室清洗时间约束,研究了单臂组合设备的终止暂态调度问题.首先,提出了 1-周期清洗工艺的暂态调度规则,并采用了面向资源的Petri网对单臂组合设备的终止暂态过程进行建模,引入避免死锁的变迁触发规则;其次,根据系统的终止暂态时间特性并考虑不同的调度情形,建立了终止暂态调度的线性规划模型;最后,通过实例验证了该方法的可行性.实验结果表明,与运用改进拉式策略的虚拟晶圆方案相比,该调度方案可有效地减少组合设备终止暂态的完工时间,并满足晶圆制造的工艺要求.     

A two-phase dynamic dispatching approach to semiconductor wafer testing

There have been numerous advancements and rising competition in semiconductor technologies. In light of this, the wafer test plays a more significant role in providing the most prompt yield feedback for quick process improvement. However, the wafer test shop floor is getting more complicated than ever before because of the increasing change-over rate, nonlinear wafer arrival, and preemption by urgent orders. Furthermore, the foundry wafer test is a heterogeneous production with different production cycle times and a large variety of nonidentical testers. Shop floor conditions, including work in process (WIP) pool, tester status, and work order priority, continuously change. There is a need to operate the kind of production line that simultaneously fulfills multiple objectives. Such objectives are maximum confirmed line item performance (CLIP) for normal lots, 100% CLIP for urgent lots, minimum change-over rate, and shortest cycle time. Thus, a reactive dispatching approach is proposed and expected to perform a real-time solution no matter how/what the shop floor would change. The dynamic approach is mainly triggered by two kinds of major events: one is when an urgent lot comes in, and the other is when a tester is idle. In addition, through a two-phase dispatching algorithm, lot ranking, and lot assignment methods, prioritized WIP lots and an appropriate lot assignment are suggested. A better performance measure is obtained by considering the multiple objectives the wafer test operations seek to achieve.     

Production planning in semiconductor wafer fab considering variable cycle times

Recent research in the semiconductor manufacturing area has addressed some industrial engineering and operations research applications to solve the challenging production planning and scheduling problems. Relative to the other industries, the number of practical production management techniques and supporting software in the semiconductor industry is limited. The conventional models proposed use fixed or averaged cycle time and yield to get the results. However, in the actual wafer fabs, cycle time is spread widely and skewed due to the large variations in the operations. Therefore, the use of averaged cycle time and yield makes significant differences between the plan and the actual shop performance. Thus, we focus on the production planning problem in the wafer fabrication (“fab”), introducing a planning methodology that explicitly considers the variable cycle time and the shop status. We also evaluate some different types of input policies.     

Mechanical and electrical bonding between silicon wafer and glass wafer with etched channels containing metal tracks

In this paper a novel process to bond and, at the same time, to electrically connect a silicon wafer to a glass wafer is presented. It consists of a low temperature anodic bonding process between silicon and glass by using a glass wafer with etched channels in order to contain metal tracks. The glass-to-silicon anodic bonding process at low temperatures (not exceeding 300°C) assures a strong mechanical link (Berthold et al. in Transducers 1999, June:7–10, 1999). The electrical contacts between the metal pads on the backside of a silicon wafer and the metal pads on the glass wafer are achieved by sintering and diffusion of metals due to a kind of thermo compression bonding. This bonding method permits a high vertical control due to a well-controlled etching of the cavity depth and to the thickness precision of both metallization (pads on silicon wafers and metal tracks on glass wafer). This IC-processing compatible approach opens up the way to a new electrical connection concept keeping, at the same time, a strong mechanical bond between glass and silicon wafers for an easier fabrication of a more complex micro-system.     

Scheduling cluster tools in wafer fabrication using candidate list and simulated annealing

This paper presents a new method for scheduling cluster tools in semiconductor fabrication. A cluster tool consists of a group of single-wafer chambers organized around a wafer transport device, or robot. Cluster fabrication system considered in this paper consists of serial cluster tools. Due to constraints imposed by multiple routes of each wafer type and machines with no buffer, it is difficult to find an optimal or near-optimal schedule. In order to determine the sequence of the operations to be released and the assignment of the machine to each operation, the proposed method uses a job requirement table with random keys as a solution representation. Simulated annealing seeks the optimal or near-optimal sequence and machine assignment of the operations. In this paper, the scheduling objective is to find a schedule with minimum makespan. A Gantt chart is obtained as the final schedule. To handle the constraints, the proposed method uses a candidate list. To determine which operation can be scheduled in considering the constraints, a negotiation procedure between the operations in the candidate list and a current state of the system is introduced. To show the effectiveness of the proposed method, scheduling example of a real cluster fabrication system is presented. Scheduling results are compared with those obtained by using several dispatching rules. From the experimental results, it is shown that the proposed method is promising.     

A fuzzy hierarchical reinforcement learning based scheduling method for semiconductor wafer manufacturing systems

Scheduling semiconductor wafer manufacturing systems has been viewed as one of the most challenging optimization problems owing to the complicated constraints, and dynamic system environment. This paper proposes a fuzzy hierarchical reinforcement learning (FHRL) approach to schedule a SWFS, which controls the cycle time (CT) of each wafer lot to improve on-time delivery by adjusting the priority of each wafer lot. To cope with the layer correlation and wafer correlation of CT due to the re-entrant process constraint, a hierarchical model is presented with a recurrent reinforcement learning (RL) unit in each layer to control the corresponding sub-CT of each integrated circuit layer. In each RL unit, a fuzzy reward calculator is designed to reduce the impact of uncertainty of expected finishing time caused by the rematching of a lot to a delivery batch. The results demonstrate that the mean deviation (MD) between the actual and expected completion time of wafer lots under the scheduling of the FHRL approach is only about 30 % of the compared methods in the whole SWFS.     

An effective fuzzy collaborative forecasting approach for predicting the job cycle time in wafer fabrication

Predicting the cycle time of each job in a factory is an important task to the factory. However, it is not easy to deal with the uncertainty in the job cycle time. To cope with this problem and to effectively predict the job cycle time, an effective fuzzy collaborative forecasting approach is proposed in this study. The main difference between the proposed methodology and the existing methods is that the proposed methodology generates a fuzzy cycle time forecast in an effective way. In addition, the proposed method utilizes each round of fuzzy artificial neural network training to generate the upper and lower bounds of the job cycle time. The upper and lower bounds then serve as the basis for the subsequent collaboration. We collected the data of 120 jobs from a wafer fabrication factory to assess the effectiveness of the proposed method. The analysis results showed that the proposed fuzzy collaborative forecasting approach was indeed more efficient and accurate than some existing methods.     

Fuzzy-neural approaches with example post-classification for estimating job cycle time in a wafer fab

Estimating the cycle time of a job in a wafer fabrication plant (wafer fab) is a critical task to the wafer fab. Many recent studies have shown that pre-classifying a job before estimating the cycle time was beneficial to the forecasting accuracy. However, most pre-classification approaches applied in this field could not absolutely classify jobs. Besides, whether the pre-classification approach combined with the subsequent forecasting approach was suitable for the data was questionable. For tackling these problems, two hybrid approaches with example post-classification, the equally-divided method and the proportional-to-error method, are proposed in this study in which a job is post-classified by a back propagation network (BPN) instead after the forecasting error is generated. In this novel way, only jobs whose cycle time forecasts are the same accurate will be clustered into the same category, and the classification algorithm becomes tailored to the forecasting approach. For evaluating the effectiveness of the proposed methodology and to make comparison with some existing approaches, production simulation (PS) is applied in this study to generate test data. According to experimental results, the forecasting accuracy (measured with root mean squared error, RMSE) of the proportional-to-error method was significantly better than those of the other approaches in most cases by achieving a 26–56% (and an average of 41%) reduction in RMSE over the comparison basis – multiple-factor linear combination (MFLC). The effect of post-classification was also statistically significant.     

A fuzzy back propagation network ensemble with example classification for lot output time prediction in a wafer fab

Lot output time prediction is a critical task to a wafer fabrication plant (wafer fab). To further enhance the accuracy of wafer lot output time prediction, the concept of clustering is applied to Chen’s fuzzy back propagation network (FBPN) approach in this study by pre-classifying wafer lots before predicting their output times with several FBPNs that have the same topology. Each wafer lot category has a corresponding FBPN that is applied to predict the output times of all lots belonging to the category. In choosing the learning examples of each category, whether a wafer lot can be unambiguously classified or not and the accuracy of predicting the output time of the lot are simultaneously taken into account. To validate the effectiveness of the proposed methodology and to make comparison with some existing approaches, the actual data in a wafer fab were collected. According to experimental results, the prediction accuracy of the proposed methodology was significantly better than those of some existing approaches in most cases by achieving a 19–52% (and an average of 38%) reduction in the root-mean-square-error (RMSE). On the other hand, compared with the fuzzy c-means (FCM)-BPN-ensemble approach, the performance of the proposed methodology in the efficiency respect was indeed improved.     

An unsupervised neural network approach for automatic semiconductor wafer defect inspection

Semiconductor wafer defect inspection is an important process before die packaging. The defective regions are usually identified through visual judgment with the aid of a scanning electron microscope. Dozens of people visually check wafers and hand-mark their defective regions. Consequently, potential misjudgment may be introduced due to human fatigue. In addition, the process can incur significant personnel costs. Prior work has proposed automated visual wafer defect inspection that is based on supervised neural networks. Since it requires learned patterns specific to each application, its disadvantage is the lack of product flexibility. Self-organizing neural networks (SONNs) have been proven to have the capabilities of unsupervised auto-clustering. In this paper, an automatic wafer inspection system based on a self-organizing neural network is proposed. Based on real-world data, experimental results show, with good performance, that the proposed method successfully identifies the defective regions on wafers.     

A nonlinearly normalized back propagation network and cloud computing approach for determining cycle time allowance during wafer fabrication

This study investigated the determination of the allowance that must be added to the cycle time estimate, which is a critical concern when assigning internal due dates. Because no method for estimating cycle times is completely accurate, producing such estimates remains problematic but has rarely been addressed in the literature. A large allowance postpones the internal due date, diminishing company appeal when a factory manager negotiates with a customer. Therefore, in this study, a nonlinear approach was proposed to normalize the cycle times. After estimating the cycle time of a job by using a back propagation network, the allowance added to the cycle time can be effectively reduced through the collaboration of several computing clouds. Theoretical properties of the proposed method were validated, and a case from a wafer fabrication factory was used to evaluate the effectiveness of the proposed method in comparison with various existing methods. According to the experimental results, the proposed method facilitated establishing tight upper bounds on the cycle times. The proposed method was proven to be very effective.     

Image processing techniques for wafer defect cluster identification

Electrical testing determines whether each die on a wafer functions as originally designed. But these tests don't detect all the defective dies in clustered defects on the wafer, such as scratches, stains, or localized failed patterns. Although manual checking prevents many defective dies from continuing on to assembly, it does not detect localized failure patterns-caused by the fabrication process-because they are invisible to the naked eye. To solve these problems, we propose an automatic, wafer-scale, defect cluster identifier. This software tool uses a median filter and a clustering approach to detect the defect clusters and to mark all defective dies. Our experimental results verify that the proposed algorithm effectively detects defect clusters, although it introduces an additional 1% yield loss of electrically good dies. More importantly, it makes automated wafer testing feasible for application in the wafer-probing stage