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1.
提出一种电容片内集成、高效率升压模式的DC-DC电源管理芯片,较普通结构相比,文中提出的电路结构具有6组2×,3组3×,2组4×升压模型共11种工作模式,并具有低纹波等优点。通过MIM电容与积累型NMOS电容串联的方式,提高单位面积容值,使得总电容面积大幅减小。采用SMIC 0.18μm CMOS工艺,利用Cadence工具对电路进行仿真验证,所提出自适应开关电容升压电路,在输出电压为3 V时,其效率最高可达到83.6%。在开关频率为20 MHz时,输入电压范围为1~1.8 V,所需总片内集成电容总面积为900 μm×900 μm,输出电压纹波<40 mV  相似文献   

2.
We report state-of-the-art V-band power performance of 0.15-μm gate length InGaAs/InAlAs/InP HEMT's which have 15 μm×23 μm dry-etched through-substrate source vias (substrate thickness 50 μm). The 500-μm wide InP HEMT's were measured in fixture at 60 GHz and demonstrated an output power of 190 mW with 40% power-added efficiency (PAE) and 6.8 dB power gain at an input power of 16 dBm. These results represent the best combination of power and PAE reported to date at this frequency for any solid state device. The results are achieved through optimization of the InP-based heterostructure which incorporates a graded pseudomorphic InGaAs channel and a graded pseudomorphic InAlAs Schottky barrier layer, and the use of 15 μm×23 μm dry-etched through-substrate source vias  相似文献   

3.
A 1.064-μm band upconversion pumped Tm3+-doped fluoride fiber amplifier and a laser both operating at 1.47 μm are investigated in detail. The two devices are based on the 3F 43H4 transition in a trivalent thulium ion, which is a self-terminating system. When pumped at 1.064 μm, the amplifier has a gain of over 10 dB from 1.44 to 1.51 μm and a low-noise characteristic. Also, the fiber laser generates a high-output power of over 100 mW with a slope efficiency of 59% at around 1.47 μm. These levels of performance will be important for optical communication systems  相似文献   

4.
High power and high-efficiency multi-finger heterojunction bipolar transistors (HBT's) have been successfully realized at Ku-band by using an optimum emitter ballasting resistor and a plated heat sink (PHS) structure. Output power of 1 W with power-added efficiency (PAE) of 72% at 12 GHz has been achieved from a 10-finger HBT with the total emitter size of 300 μm2. 72% PAE with the output power density of 5.0 W/mm is the best performance ever reported for solid-state power devices with output powers more than 1 W at Ku-band  相似文献   

5.
A 1.5-V high drive capability CMOS op-amp   总被引:1,自引:0,他引:1  
A novel CMOS operational amplifier with a 1.5 V power supply is presented. It is based on a folded-mirror transconductance amplifier and a high-efficiency output stage. The amplifier achieves an open-loop gain and a gain-bandwidth product higher than 65 dB and 1 MHz, respectively. In addition, a 1 V peak-to-peak output voltage into a 500 Ω and 50 pF output load is provided with a total harmonic distortion of -77 dB. This performance was achieved using maximum aspect ratios of 120/1.2 and 360/1.2 for the NMOS and PMOS transistors, respectively, and a quiescent current as low as 60 μA for the driver transistors. The amplifier was implemented in a standard 1.2 μm CMOS process with threshold voltages around 0.8 V. It dissipates less than 300 μW  相似文献   

6.
A high-efficiency focusing waveguide grating coupler (FWGC) using parallelogramic group profiles is proposed, designed and fabricated. A new waveguide grating structure has been employed which consists of bilayered grating with one grating etched into the guiding layer and the other into a high-index cladding layer. Computer simulation shows that both high directionality and large radiation decay factor are obtainable with this structure. Fabrication of this FWGC by electron beam lithography is described. A coupling efficiency of 86% and focusing spot size full-width at half maximum (FWHM) of around 10 μm have been achieved  相似文献   

7.
To solve the problems of trade-off between the short channel effect and the performance enhancement of sub-quartermicrometer MOSFETs, we have developed a recessed channel MOSFET structure called ISRC (Inverted-Sidewall Recessed-Channel). The oxide thickness is 4 nm and the effective channel length is 0.1 μm, which is the smallest Si-MOSFET ever reported in the recessed channel structures. The maximum saturation transconductance at VD=2 V is 446 mS/mm for the 0.1 μm n-channel device. The threshold voltage roll-off is kept within 64 mV when the gate length varies from 1.4 μm to 0.1 μm and good subthreshold characteristics are achieved for 0.1 μm channel device  相似文献   

8.
Power performance of a continuous-wave Cr2+:ZnSe laser was investigated experimentally and numerically at 2.47 μm. In the experiments, an astigmatically compensated z-cavity with a 3% transmitting output coupler produced as high as 250 mW of output power when excited by a NaCl:OH$color-center laser at 1.58 μm. The measured absorbed power slope efficiency was 24.2%. Experimental pump absorption saturation and laser efficiency data were analyzed by using a numerical model to determine the absorption, emission, and excited-state absorption cross-sections. Simulations were then performed to investigate the dependence of the output power on crystal and resonator parameters. Results indicate that optimum power performance should be obtained with a 1.5-cm-long crystal which has a total unsaturated absorption of 86%. Finally, the optimum output coupling of the resonator was determined to be 10%  相似文献   

9.
An experimental bipolar transistor structure with self-aligned base-emitter contacts formed using one polysilicon layer is presented with geometries and frequency performance comparable to those of double-polysilicon structures. This structure, called STRIPE (self-aligned trench-isolated polysilicon electrodes), provides a 0.2-μm emitter-base polysilicon contact separation. A 0.4-μm emitter width is achieved with conventional 0.8-μm optical lithography. Scaling of the emitter width of 0.3 μm has been performed with minimal degradation of device performance, and scaling of the emitter width pattern to 0.2 μm has been demonstrated. These dimensions are the smallest achieved in single-polysilicon structures with polysilicon base contacts and are comparable to those achieved in double-polysilicon structures. The STRIPE structure has been used to fabricate transistors with ft as high as 33.8 GHz  相似文献   

10.
CW fiber laser cascades in an Er3+-doped fluorozirconate fiber operating simultaneously at 2.7 μm/1.55 μm or at 3.45 μm/2.7 μm/1.55 μm pumped around 650 nm are reported. Output powers of nearly 20 mW at 1.55 μm and 1.2 mW around 2.7 μm were obtained with a nonoptimized experimental setup for the 2.7 μm/1.55 μm cascade. At 1.55 μm a laser efficiency of 5% was achieved. By varying the parameters of the experimental setup, additional effective simultaneous laser action at 3.45 μm was demonstrated  相似文献   

11.
Thin monocrystalline silicon solar cells   总被引:2,自引:0,他引:2  
One of the most effective approaches for a cost reduction of crystalline silicon solar cells is the better utilization of the crystals by cutting thinner wafers. However, such thin silicon wafers must have sufficient mechanical strength to maintain a high mechanical yield in cell and module manufacturing. The electrical performance of thin cells drops strongly with decreasing cell thickness if solar cell manufacturing technologies without a backside passivation or a back-surface-field (BSF) are applied. However, with the application of a BSF, stable efficiencies of over 17%, even with decreasing cell thickness, have been reached. Thin solar cells show lower photodegradation, as is normally observed for Cz-silicon cells with today's standard thickness (about 300 μm) because of a higher ratio of the diffusion length compared to the cell thickness. Cells of about 100-150 μm thickness fabricated with the production Cz-silicon show almost no photodegradation. Furthermore, thin boron BSF cells have a pronounced efficiency response under backside illumination. The backside efficiency increases with decreasing cell thickness and reaches 60% of the frontside cell efficiency for 150 μm solar cells and also for solar modules assembled of 36 cells of a thickness of 150 μm. Assuming, for example, a rearside illumination of 150 W/m2, this results in an increased module power output of about 10% relatively  相似文献   

12.
A modular, high density 0.5 μm Complementary BiCMOS technology with integrated high-voltage Lateral Diffused MOS (LDMOS) and conductivity modulated Lateral Insulated Gate Bipolar Transistor (LIGBT) structures designed for high performance, multi-functional integrated circuit applications is described. The advantages of VLSI processing and 0.5 μm compatible layout rules have been applied to the design and fabrication of the tight-pitch high-voltage devices without sacrificing the performance of 0.5 μm dual-poly (N+/P+) gate CMOS and complementary vertical bipolar transistors. Single chip integration of VLSI microprocessors with high-voltage and/or high-current input and output functions for “Smart Power” applications can be achieved using this technology  相似文献   

13.
Technology challenges for silicon integrated circuits with a design rule of 0.1 μm and below are addressed. We begin by reviewing the state-of-the-art CMOS technology at 0.25 μm currently in development, covering a logic-oriented processes and dynamic random access memory (DRAM) processes. CMOS transistor structures are compared by introducing a figure of merit. We then examine scaling guidelines for 0.1 μm which has started to deviate for optimized performance from the classical theory of constant-field scaling. This highlights the problem of nontrivial subthreshold current associated with the scaled-down CMOS with low threshold voltages. Interconnect issues are then considered to assess the performance of microprocessors in 0.1 μm technology. 0.1 μm technology will enable a microprocessor which runs at 1000 MHz with 500 million transistors. Challenges below 0.1 μm are then addressed. New transistor and circuit possibilities such as silicon on insulator (SOI), dynamic-threshold (DT) MOSFET, and back-gate input MOS (BMOS) are discussed. Two problems below 0.1 μm are highlighted. They are threshold voltage control and pattern printing. It is pointed out that the threshold voltage variations due to doping fluctuations is a limiting factor for scaling CMOS transistors for high performance. The problem with lithography below 0.1 μm is the low throughput for a single probe. The use of massively parallel scanning probe assemblies working over the entire wafer is suggested to overcome the problem of low throughput  相似文献   

14.
The small-signal frequency response of long-wavelength vertical-cavity lasers (LW-VCLs) is of interest in determining the ultimate bandwidth of these devices for use in terrestrial networks. This letter analyses two distinct device structures of double wafer-bonded vertical-cavity lasers operating at 1.5 μm and compares their high-speed performance. We demonstrate the highest modulation bandwidth and the highest modulation current efficiency of an electrically pumped LW-VCL of 7 and 4.1 GHz/√mA, respectively  相似文献   

15.
Previous work has shown that at a wavelength of 1.3 μm and power levels on the order of a few milliwatts, directional coupler switches show negligible damage due to the photorefractive effect. The author's experiments at higher power levels (20 mW) show a significant reduction in performance for 1-cm-long directional coupler modulators with uniform electrodes. The reduction in modulation efficiency is in good agreement with a numerical simulation based on the coupled mode equations using index changes estimated from previous work. At similar power levels, Mach-Zehnder modulators showed little effect making them a good design for high power applications. Other electrode structures, such as the reverse Δβ type, might help alleviate the effect in directional couplers. Modulators operating at 1.55 μm should also show less susceptibility to the effect  相似文献   

16.
The author's present the DC and RF power performance of planar-doped channel InGaAs high-electron-mobility transistors (HEMTs). The planar-doped channel (PDC) pseudomorphic GaAs HEMT with 400 μm of gate width exhibited an output power of 184 mW, corresponding to 460 mW/mm, with 4.6-dB saturation gain and 25% power-added efficiency at 55 GHz. Although higher power density is possible, the authors have designed the device to operate at less than 500 mW/mm for thermal and reliability reasons. Devices with unit gate finger widths ranging from 30 to 50 μm were fabricated and characterized, with no performance degradation observed from using the longer gate fingers  相似文献   

17.
The microwave characteristics at 18 and 20 GHz of submicron-gate indium phosphide (InP) metal-insulator-semiconductor field-effect transistors (MISFETs) for high output power density applications are presented. InP power MISFETs were fabricated with 0.7 μm gate lengths, 0.2 mm gate widths, and drain-source spacings of 2, 3 and 5 μm. The output power density was investigated as a function of drain-source spacing. The best output power density and gain were obtained for drain-source spacings of 3 μm. At 18 GHz output power densities of 1.59 W/mm with a gain of 3.47 dB and a power-added efficiency of 20.0% were obtained for a drain-source spacing of 3 μm. At 20 GHz output power densities of 1.20 W/mm with a gain of 3.17 dB and a power-added efficiency of 13.6% were obtained for a drain-source spacing of 3 μm  相似文献   

18.
Encapsulated rapid thermal annealing (RTA) has been used in the fabrication of indium phosphide (InP) power metal-insulator-semiconductor field-effect transistors (MISFETs) with ion-implanted source, drain, and active channel regions. The MISFETs had a gate length of 1.4 μm. Six to ten gate fingers per device, with individual gate finger widths of 100 or 125 μm, were used to make MISFETs with total gate widths of 0.75, 0.8, or 1 mm. The source and drain contact regions and the channel region of the MISFETs were fabricated using silicon implants in semi-insulating InP at energies from 60 to 360 keV with doses from 1×1012 to 5.6×1014 cm-2. The implants were activated using RTA at 700°C for 30 s in N2 or H2 ambients using a silicon nitride encapsulant. The high-power, high-efficiency MISFETs were characterized at 9.7 GHz, and the output microwave power density for the RTA conditions used was as high as 2.4 W/mm. For a 1-W input at 9.7 GHz gains up to 3.7 dB were observed, with an associated power-added efficiency of 29%. The output power density was 70% greater than that reported for GaAs MESFETs  相似文献   

19.
A high-power diode-pumped Nd:YAG laser oscillating at a wavelength of 1.319 μm is reported. A 122-W CW laser beam with an M2 factor of 35 has been achieved with an optical efficiency of 19.6%. The lasing characteristics, including thermal lensing, at 1.319 μm are compared with those at 1.06 μm. Under lasing conditions, the focal length of thermal lensing at 1.319 μm decreases by 25% and increases by 15% at 1.06 μm with respect to the nonlasing conditions. Based on the experimental results, the heat dissipation in an Nd:YAG rod is discussed with reference to nonradiative transitions from the upper laser level  相似文献   

20.
Continuous wave (CW) lasing in a thulium-doped fluorozirconate fiber at 1.46 μm with a 20% slope efficiency was observed. Simultaneous lasing at 1.86 μm with 29% slope efficiency depopulates the normally long lived 1.46-μm terminal level. It is shown that the cascade process can increase the slope efficiency ηs, of the 1.45-μm transition by a factor of ten and the 1.86-μm transition by a factor of eight. Calculations indicate that the CW laser thresholds decrease significantly  相似文献   

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