基于Simulink的混频器建模与仿真

总结了雷达系统仿真的技术现状,指出了基于传统仿真软件建模与仿真的缺点及Simulink在雷达系统仿真中的优势.以雷达系统中的混频器为例,介绍了如何利用Simulink对其进行建模和仿真,并给出了仿真结果和分析.仿真方法具有模型设计过程简单、修改容易和结果直观等特点.该文的工作不但克服了在工作站上用SPW等系统仿真软件进行雷达系统仿真投入大、推广难的不足,又克服了利用高级语言编写雷达系统软件通用性差、难度高、周期长的缺点.为今后在Simulink上开发大规模雷达系统仿真模型库和仿真复杂雷达系统打下基础.     

BiCMOS工艺的高线性度下变频混频器设计

利用BiCMOS工艺设计了一种高线性度下变频混频器.在此变频混频器的设计中结合了双极型工艺在射频段的高性能以及MOS工艺的高线性度,并利用其对传统的吉尔伯特单元进行了优化.基于JAZZ 0.35μm标准BiCMOS SBC35工艺设计参数对混频器进行了设计和仿真,仿真结果表明该混频器获得了良好的性能指标,转换增益为9.3 dB,输入3阶互调点达到了16 dBm,在5 V单电源下消耗1.9 mA的电流.     

微机电系统基于端口的多领域建模和仿真

微机电系统是典型的多领域复杂系统,需要一种能够将复杂组件和子系统紧密集成跨领域的通用建模和仿真方法.介绍了微机电系统设计和仿真的现状,给出了基于端口的多领域建模概念,分析了其建模基础和基于VHDL-AMS、键合图和线图的实现方法,并给出了组件层次仿真的实现方法.分析表明,基于端口的建模实现了多领域物理现象的统一描述,并通过界面与实现的分离,实现了自上而下的层次化建模,可用一种仿真语言和仿真器实现整个MEMS系统的建模与仿真.     

基于verilog-A数控LC振荡器系统的行为级建模

在全数字锁相环中数控振荡器和由∑△调制器所构成的系统是一个规模很大的电路,采用传统的电路级描述难以在现有的EDA工具中仿真.为此提出了一种基于Verilog-A语言的行为级建模方法来对系统进行仿真.详细介绍了数控振荡器系统中各模块的建模方法,并给出了各模块建模的关键代码.仿真结果表明对数控振荡器的行为模型不仅能提高仿真效率还能很好模拟实际系统.该行为模型具有较好的实用性,所得结果可用于指导具体电路的设计.     

基于MATLAB语言建模方法的研究

提出了一种基于Matlab语言的建模方法、分析了最小二乘法建立模型的原理,并给出了建模的具体方法和实例.MATLAB语言用于建模可以提高其效率和质量,丰富了建模的方法和手段.计算机仿真的结果验证了该方法的有效性.     

一种正交数字下变频器的高效改进结构

针对传统正交数字下变频器结构计算效率低,首先介绍一种基于混频器后X的改进方法,该方法只能使得计算效果提高1/2N,接着在此基础上利用多相滤波法对混频器后置法进行进一步改进,从而大大减少了数字下变频器的运算量,使得计算效率提高了K倍.最后对上述各种正交数字下变频方法进行算法仿真和计算效率分析对比,结果表明经过混频器后置法与多相滤波法综合改进后的数字正交下变频算法计算效率高,实现效果良好.     

基于Simulink的混频器建模与仿真

总结了雷达系统仿真的技术现状,指出了基于传统仿真软件建模与仿真的缺点及Simulink在雷达系统仿真中的优势。以雷达系统中的混频器为例,介绍了如何利用Simulink对其进行建模和仿真,并给出了仿真结果和分析。仿真方法具有模型设计过程简单、修改容易和结果直观等特点。该文的工作不但克服了在工作站上用SPW等系统仿真软件进行雷达系统仿真投入大、推广难的不足,又克服了利用高级语言编写雷达系统软件通用性差、难度高、周期长的缺点。为今后在Simulink上开发大规模雷达系统仿真模型库和仿真复杂雷达系统打下基础。     

电流注入CMOS混频器的设计及特性分析

分析并比较了两种基于电流注入技术的混频器的性能;定量地解释了跨导互补的电流注入混频器线性降低的原因。分析表明,相对于双平衡Gilbert混频器,两种基于Gilbert单元的电流注入混频器的性能,如增益、噪声和线性,都有所改善;传统电流注入混频器具有更好的线性特性,而跨导互补的电流注入混频器在增益和噪声方面则有更好的表现。基于TSMC 0.18μm CMOS混频器的仿真结果,对理论分析进行了验证。     

基于软件无线电多相滤波的数字正交变换技术

针对传统数字正交变换存在A/D采样速率要求比较高导致后续的数字低通滤渡成为瓶颈、运算数据量大、需要正交本振等方面的不足,提出了一种基于软件无线电多相滤波的数字正交变换技术.首先分析基于多相滤波的数字正交变换的实现理论,实现模型,然后设计由于奇偶抽取引起的多相滤波器中的两个延时滤波器,最后在MATLAB/SIMULINK下建模仿真.实验仿真结果表明,用该方法设计的正交变换满足要求.     

模型编译器的实现与应用

实现了一个自动化的模型编译器(CAMC)。CAMC能够接受使用Verilog-AMS等行为级语言描述的器件模型,并按照标准电路仿真器的接口产生C语言代码。这些代码经过C语言编译器,可以和电路仿真器协同工作。同时介绍了CAMC的具体实现、优化算法和语法扩展,并给出了在MOSFET器件和传输线建模等方面的应用。     

A SiGe HBT Translinear Harmonic Mixer

A novel even-order harmonic mixer is proposed. Based on the translinear loop of BJT/HBTs, frequency doubling and single-to-differential conversion circuits have been employed in the design of harmonic mixer. The proposed mixer has been verified in a SiGe HBT process by SpectreRF simulations.     

谱分析方法的混合电路BIST

SoC芯片内对于混合信号电路测试有着举足轻重的作用.本文介绍了一种通过谱密度分析方法的混合电路内建自测试.此方法通过使用噪声源与比较器数字量化得到被测信号的频谱特性.它的主要特点是电路简单、抗干扰性能强和多点插入多路并行采集,不需要多位AD转换器和多路选择开关.此方法基本上是全数字式的,采用一位量化,数据处理速度快,能满足给定条件下的实时处理要求;并可利用系统内已有的资源,适应于SoC环境.本文给出了系统实现的详细结构和一个测试锁相环电路的测试仿真实例,验证了谱分析方法的测试有效性.     

Signature analysis for fault detection of mixed-signal ICs based on dynamic power-supply current

In this paper we have investigated a unified and simultaneous fault detection method for mixed-signal integrated circuits. The method is based on the analysis of the power-supply current through the circuit under test. The analysis has been done paying attention to the dynamic behaviour of the power-supply current, in order to avoid measurement problems related to the large amount of quiescent current drop across many analog blocks.The analysis of the dynamic power-supply current entails certain problems related to the complexity of the measurement process, especially those due to the high speed of the current transients. These problems have been addressed by considering a design for test procedure based on the use of built-in dynamic current sensors.The goal of the design for test methodology proposed is to represent the Iddt through the mixed-signal IC under test by a digital signature. The paper presents some advantages of this approach such as a good tolerance to cross-talk noise and the need for only a conventional digital tester on the complete mixed-signal IC for fault detection. The analysis is illustrated with some test results.     

Novel Process and Temperature-Stable, IDD Sensor for the BIST Design of Embedded Digital, Analog, and Mixed-Signal Circuits

This paper proposes a new IDD sensor for built-in self-test (BIST) applications for digital, analog, and mixed-signal circuits. This novel, wide-band, nonintrusive, process and temperature-stable IDD sensor operates up to 230 MHz, which is 2.3X faster than previously proposed designs, and occupies 78.3% less area than another competing design. A BIST utilizing this novel IDD sensor is created and tested on numerous digital circuits, as well as on an op-amp and a mixer, achieving up to 90% fault coverage, while maintaining the performance of the circuit-under-test. The experiments were implemented in 0.18-m TSMC CMOS mixed-signal technology.     

基于WPT分层和独立子波函数的单路心音混合信号BSS新方法

提出了一种基于小波变换分层和独立子波函数的单路混合信号的盲源分离新方法。首先讨论了单路混合信号分离模型,以及如何利用WPT进行窄带分层和获取独立子波函数的技术;然后通过结合独立子波函数进入单路混合信号,使单路混合信号由一维向量转化成为多维向量,以实现其盲分离;最后通过心音信号的分离实验,验证了本方法的有效性和可行性。     

Novel difference-frequency dual-signal injection method for CMOS mixer linearization

This paper presents the application of dual-signal injection technique to the reduction of intermodulation distortion (IMD) level in double-balanced mixer. In this method, "difference-frequency" signal components are optimally fed to the mixer through the biasing circuitry for IMD cancellation. For comparison purposes, the measured performance of a 900-MHz complementary metal oxide semiconductor (CMOS) mixer based upon both single and dual injection approaches is shown.     

基于二分法的混合信号接口板的设计

介绍了一种基于二分算法的混合信号接口板.该接口板可通过编程任意配置测试芯片管脚实现模拟或数字信号输入端口与输出端口的无损连接,可广泛应用于芯片自动化测试领域.本设计采用二分法来实现管脚的分级,采用遍历引脚逐一比较的方式来配置引脚连接,通过控制模拟开关阵列来实现模拟信号的输入与输出端口连接,通过FPGA实现数字信号的输入与输出端口连接.该设计方案利用极少的开关实现了复杂线路的配置,具有较高的资源利用率,极大降低了芯片测试的难度和成本.     

An ADC BIST with on-chip ramp generator

This work presents built-in self-test (BIST) techniques for the production testing of mixed signal circuits. The special test strategy for the typical mixed-signal component analog-to-digital converter (ADC) is discussed. The traditional test for such mixed-signal components can be completed through a DSP-based mixed-signal tester with an arbitrary waveform generator and a signal digitizer, but such a test is very costly and time consuming. Hence, a BIST strategy based on an on chip ramp generator (OCRG) is proposed in this work for testing ADC. This BIST method has an advantage testing ADC without DAC to overcome area overhead. This BIST method realizes the test controller, test pattern generation and output response analyser at the aspect of the on-chip circuitry. The demonstration of the proposed BIST is given through various simulation results in the last parts of this work.     

Verification techniques for substrate coupling and theirapplication to mixed-signal IC design

This paper presents techniques for the analysis of substrate-coupled noise in mixed-signal integrated circuits. Advantages and limitations of some commonly employed verification techniques for substrate coupling are outlined. A preprocessed boundary element method introduced in this paper utilizes precomputed z parameters to generate an analytical model for substrate impedance in a preprocessing stage. Truncated series expansions of the analytical impedance model are used to accelerate solution of the resulting boundary element equations. A methodology that applies these fast techniques to the verification of large mixed-signal circuits and results that confirm its efficiency are described. This complete methodology has been applied to the design and verification of an industrial mixed-signal video analog-to-digital converter IC for substrate noise problems     

Dynamic stress-induced high-frequency noise degradations in nMOSFETs

Device parameter shifts in nMOSFETs subject to inverter-like dynamic voltage stress are examined experimentally. Model equations to relate high-frequency noise to device parameters are given. Dynamic stress-induced degradations in high-frequency noise performance of 0.16 μm nMOSFETs are investigated. Good agreement between the analytical predictions and experimental data is obtained. Noise performance of a Gilbert mixer is evaluated using Cadence SpectreRF simulation with the measured device model parameters.