High-performance nonhydrogenated nickel-induced laterally crystallized P-channel poly-Si TFTs

High-performance nickel-induced laterally crystallized (NILC) p-channel poly-Si thin-film transistors (TFTs) have been fabricated without hydrogenation. Two different thickness of Ni seed layers are selected to make high-performance p-type TFTs. A very thin seed layer (e.g., 5 /spl Aring/) leads to marginally better performance in terms of transconductance (Gm) and threshold voltage (V/sub th/) than the case of a 60 /spl Aring/ Ni seed layer. However, the p-type poly-Si TFTs crystallized by the very thin Ni seeding result in more variation in both V/sub th/ and G/sub m/ from transistor to transistor. It is believed that differences in the number of laterally grown polycrystalline grains along the channel cause the variation seen between 5 /spl Aring/ NILC TFTs compared to 60-/spl Aring/ NILC TFTs. The 60 /spl Aring/ NILC nonhydrogenated TFTs show consistent high performance, i.e., typical electrical characteristics have a linear field-effect hole mobility of 156 cm/sup 2//V-S, subthreshold swing of 0.16 V/dec, V/sub th/ of -2.2 V, on-off ratio of >10/sup 8/, and off-current of <1/spl times/10/sup -14/ A//spl mu/m when V/sub d/ equals -0.1 V.     

An abrupt InP-GaInAs-InP DHBT

We report on the performance of abrupt InP-GaInAs-InP double heterojunction bipolar transistors (DHBTs) with a thin heavily doped n-type InP layer at the base-collector interface. The energy barrier between the base and the collector was fully eliminated by a 4-nm-thick silicon doped layer with N/sub D/=3/spl times/10/sup 19/ cm/sup -3/. The obtained f/sub T/ and f/sub MAX/ values at a current density of 1 mA//spl mu/m/sup 2/ are comparable to the values reported for DHBTs with a grade layer between the base and the collector.     

Low-frequency noise in submicrometer MOSFETs with HfO/sub 2/, HfO/sub 2//Al/sub 2/O/sub 3/ and HfAlO/sub x/ gate stacks

Low-frequency noise measurements were performed on p- and n-channel MOSFETs with HfO/sub 2/, HfAlO/sub x/ and HfO/sub 2//Al/sub 2/O/sub 3/ as the gate dielectric materials. The gate length varied from 0.135 to 0.36 /spl mu/m with 10.02 /spl mu/m gate width. The equivalent oxide thicknesses were: HfO/sub 2/ 23 /spl Aring/, HfAlO/sub x/ 28.5 /spl Aring/ and HfO/sub 2//Al/sub 2/O/sub 3/ 33 /spl Aring/. In addition to the core structures with only about 10 /spl Aring/ of oxide between the high-/spl kappa/ dielectric and silicon substrate, there were "double-gate oxide" structures where an interfacial oxide layer of 40 /spl Aring/ was grown between the high-/spl kappa/ dielectric and Si. DC analysis showed low gate leakage currents in the order of 10/sup -12/A(2-5/spl times/10/sup -5/ A/cm/sup 2/) for the devices and, in general, yielded higher threshold voltages and lower mobility values when compared to the corresponding SiO/sub 2/ devices. The unified number-mobility fluctuation model was used to account for the observed 1/f noise and to extract the oxide trap density, which ranged from 1.8/spl times/10/sup 17/ cm/sup -3/eV/sup -1/ to 1.3/spl times/10/sup 19/ cm/sup -3/eV/sup -1/, somewhat higher compared to conventional SiO/sub 2/ MOSFETs with the similar device dimensions. There was no evidence of single electron switching events or random telegraph signals. The aim of this paper is to present a general discussion on low-frequency noise characteristics of the three different high-/spl kappa//gate stacks, relative comparison among them and to the Si--SiO/sub 2/ system.     

Low-frequency noise in submicrometer MOSFETs with HfO/sub 2/, HfO/sub 2//Al/sub 2/O/sub 3/ and HfAlO/sub x/ gate stacks

Low-frequency noise measurements were performed on p- and n-channel MOSFETs with HfO/sub 2/, HfAlO/sub x/ and HfO/sub 2//Al/sub 2/O/sub 3/ as the gate dielectric materials. The gate length varied from 0.135 to 0.36 /spl mu/m with 10.02 /spl mu/m gate width. The equivalent oxide thicknesses were: HfO/sub 2/ 23 /spl Aring/, HfAlO/sub x/ 28.5 /spl Aring/ and HfO/sub 2//Al/sub 2/O/sub 3/ 33 /spl Aring/. In addition to the core structures with only about 10 /spl Aring/ of oxide between the high-K dielectric and silicon substrate, there were "double-gate oxide" structures where an interfacial oxide layer of 40 /spl Aring/ was grown between the high-K dielectric and Si. DC analysis showed low gate leakage currents in the order of 10/sup -12/ A(2-5 /spl times/ 10/sup -5/ A/cm/sup 2/) for the devices and, in general, yielded higher threshold voltages and lower mobility values when compared to the corresponding SiO/sub 2/ devices. The unified number-mobility fluctuation model was used to account for the observed 1/f noise and to extract the oxide trap density, which ranged from 1.8 /spl times/ 10/sup 17/ cm/sup -3/ eV/sup -1/ to 1, 3 /spl times/ 10/sup 19/ cm/sup -3/ eV/sup -1/ somewhat higher compared to conventional SiO/sub 2/ MOSFETs with the similar device dimensions. There was no evidence of single electron switching events or random telegraph signals. The aim of this paper is to present a general discussion on low-frequency noise characteristics of the three different high-K/gate stacks, relative comparison among them and to the Si-SiO/sub 2/ system.     

Wideband DHBTs using a graded carbon-doped InGaAs base

We report an InP/InGaAs/InP double heterojunction bipolar transistor (DHBT), fabricated using a mesa structure, exhibiting 282 GHz f/sub /spl tau// and 400 GHz f/sub max/. The DHBT employs a 30 nm InGaAs base with carbon doping graded from 8/spl middot/10/sup 19//cm/sup 3/ to 5/spl middot/10/sup 19//cm/sup 3/, an InP collector, and an InGaAs/InAlAs base-collector superlattice grade, with a total 217 nm collector depletion layer thickness. The low base sheet (580 /spl Omega/) and contact (<10 /spl Omega/-/spl mu/m/sup 2/) resistivities are in part responsible for the high f/sub max/ observed.     

Optimization of AuGe-Ni-Au ohmic contacts for GaAs MOSFETs

GaAs-based metal-oxide-semiconductor field-effect transistors (MOSFETs) are promising devices for high-speed and high-power applications. One important factor influencing the performance of a GaAs MOSFET is the characteristics of ohmic contacts at the drain and source terminals. In this paper, AuGe-Ni-Au metal contacts fabricated on a thin (930 /spl Aring/) and lightly doped (4/spl times/10/sup 17/ cm/sup -3/) n-type GaAs MOSFET channel layer were studied. The effects of controllable processing factors such as the AuGe thickness, the Ni/AuGe thickness ratio, alloy temperature, and alloy time to the characteristics of the ohmic contacts were analyzed. Contact qualities including specific contact resistance, contact uniformity, and surface morphology were optimized by controlling these processing factors. Using the optimized process conditions, a specific contact resistance of 5.6/spl times/10/sup -6/ /spl Omega//spl middot/cm/sup 2/ was achieved. The deviation of contact resistance and surface roughness were improved to 1.5% and 84 /spl Aring/, respectively. Using the improved ohmic contacts, high-performance GaAs MOSFETs (2 /spl mu/m/spl times/100 /spl mu/m) with a large drain current density (350 mA/mm) and a high transconductance (90 mS/mm) were fabricated.     

A high current gain 4H-SiC NPN power bipolar junction transistor

This work reports the development of high power 4H-SiC bipolar junction transistors (BJTs) by using reduced implantation dose for p+ base contact region and annealing in nitric oxide of base-to-emitter junction passivation oxide for 2 hours at 1150/spl deg/C. The transistor blocks larger than 480 V and conducts 2.1 A (J/sub c/=239 A/cm/sup 2/) at V/sub ce/=3.4 V, corresponding to a specific on-resistance (R/sub sp on/) of 14 m/spl Omega/cm/sup 2/, based on a drift layer design of 12 /spl mu/m doped to 6/spl times/10/sup 15/cm/sup -3/. Current gain /spl beta//spl ges/35 has been achieved for collector current densities ranging from J/sub c/=40 A/cm/sup 2/ to 239 A/cm/sup 2/ (I/sub c/=2.1 A) with a peak current gain of 38 at J/sub c/=114 A/cm/sup 2/.     

GaInP/GaAs collector-up tunneling-collector heterojunction bipolar transistors (C-up TC-HBTs): optimization of fabrication process and epitaxial layer structure for high-efficiency high-power amplifiers

This paper describes a novel heterojunction bipolar transistor (HBT) structure, the collector-up tunneling-collector HBT (C-up TC-HBT), that minimizes the offset voltage V/sub CE,sat/ and the knee voltage V/sub k/. In this device, a thin GaInP layer is used as a tunnel barrier at the base-collector (BC) junction to suppress hole injection into the collector, which results in small V/sub CE,sat/. Collector-up configuration is used because of the observed asymmetry of the band discontinuity between GaInP and GaAs depending on growth direction. To minimize V/sub k/, we optimized the epitaxial layer structure as well as the conditions of ion implantation into the extrinsic emitter and post-implantation annealing. The best results were obtained when a 5-nm-thick 5/spl times/10/sup 17/-cm/sup -3/-doped GaInP tunnel barrier with a 20-nm-thick undoped GaAs spacer was used at the BC junction, and when 2/spl times/10/sup 12/-cm/sup -2/ 50-keV B implantation was employed followed by 10-min annealing at 390/spl deg/C. Fabricated 40/spl times/40-/spl mu/m/sup 2/ C-up TC-HBTs showed almost zero V/sub CE,sat/ (<10 mV) and a very small V/sub k/ of 0.29 V at a collector current density of 4 kA/cm/sub 2/, which are much lower than those of a typical GaInP/GaAs HBT. The results indicate that the C-up TC-HBT's are attractive candidates for high-efficiency high power amplifiers.     

Interdigitated Ge p-i-n photodetectors fabricated on a Si substrate using graded SiGe buffer layers

We report an interdigitated p-i-n photodetector fabricated on a 1-/spl mu/m-thick Ge epitaxial layer grown on a Si substrate using a 10-/spl mu/m-thick graded SiGe buffer layer. A growth rate of 45 /spl Aring//s/spl sim/60 /spl Aring//s was achieved using low-energy plasma enhanced chemical vapor deposition. The Ge epitaxial layer had a threading dislocation density of 10/sup 5/ cm/sup -2/ and a rms surface roughness of 3.28 nm. The 3-dB bandwidth and the external quantum efficiency were measured on a photodetector having 1-/spl mu/m finger width and 2-/spl mu/m spacing with a 25/spl times/28 /spl mu/m/sup 2/ active area. At a wavelength of 1.3 /spl mu/m, the bandwidth was 2.2, 3.5, and 3.8 GHz at bias voltages of -1, -3, and -5 V, respectively. The dark current was 3.2 and 5.0 /spl mu/A at -3 and -5 V, respectively. This photodetector exhibited an external quantum efficiency of 49% at a wavelength of 1.3 /spl mu/m.     

Observation of lasing from vertically self-organized InAs three-dimensional island quantum boxes on GaAs (001)

We report the first observation of lasing from vertically self-organized multiple stacks of electronically uncoupled InAs three-dimensional island quantum boxes grown via molecular beam epitaxy on GaAs (001) substrates. A low-threshold current density of 310 A/cm/sup 2/ at 79 K is found for a stack of five sets of islands corresponding to 2 ML InAs depositions separated by 36 monolayer GaAs spacers grown via migration enhanced epitaxy. The distribution of the island volumes (1.5/spl times/10/sup 5/ /spl Aring//sup 3/-4 /spl times/10/sup 5/ /spl Aring//sup 3/) gives, as expected, a multitude of laser lines between 980 mm and 996 nm.     

High mobility NMOSFET structure with high-/spl kappa/ dielectric

High-/spl kappa/ NMOSFET structures designed for enhancement mode operation have been fabricated with mobilities exceeding 6000 cm/sup 2//Vs. The NMOSFET structures which have been grown by molecular beam epitaxy on 3-in semi-insulating GaAs substrate comprise a 10 nm strained InGaAs channel layer and a high-/spl kappa/ dielectric layer (/spl kappa//spl cong/20). Electron mobilities of >6000 and 3822 cm/sup 2//Vs have been measured for sheet carrier concentrations n/sub s/ of 2-3/spl times/10/sup 12/ and /spl cong/5.85/spl times/10/sup 12/ cm/sup -2/, respectively. Sheet resistivities as low as 280 /spl Omega//sq. have been obtained.     

High field-effect mobility in n-channel Si face 4H-SiC MOSFETs with gate oxide grown on aluminum ion-implanted material

We report investigations of Si face 4H-SiC MOSFETs with aluminum (Al) ion-implanted gate channels. High-quality SiO/sub 2/-SiC interfaces are obtained both when the gate oxide is grown on p-type epitaxial material and when grown on ion-implanted regions. A peak field-effect mobility of 170 cm/sup 2//V/spl middot/s is extracted from transistors with epitaxially grown channel region of doping 5/spl times/10/sup 15/ cm/sup -3/. Transistors with implanted gate channels with an Al concentration of 1/spl times/10/sup 17/ cm/sup -3/ exhibit peak field-effect mobility of 100 cm/sup 2//V/spl middot/s, while the mobility is 51 cm/sup 2//V/spl middot/s for an Al concentration of 5/spl times/10/sup 17/ cm/sup -3/. The mobility reduction with increasing acceptor density follows the same functional relationship as in n-channel Si MOSFETs.     

SiGe HBTs on bonded SOI incorporating buried silicide layers

A technology is described for fabricating SiGe heterojunction bipolar transistors (HBTs) on wafer-bonded silicon-on-insulator (SOI) substrates that incorporate buried tungsten silicide layers for collector resistance reduction or buried groundplanes for crosstalk suppression. The physical structure of the devices is characterized using cross section transmission electron microscopy, and the electrical properties of the buried tungsten silicide layer are characterized using sheet resistance measurements as a function of bond temperature. Possible contamination issues associated with the buried tungsten silicide layer are investigated by measuring the collector/base reverse diode tics. A resistivity of 50 /spl mu//spl Omega/cm is obtained for the buried silicide layer for a bond anneal of 120 min at 1000/spl deg/C. Collector/base reverse diode tics show a voltage dependence of approximately V/sup 1/2/, indicating that the leakage current is due to Shockley-Read-Hall generation in the depletion region. Fitting of the current-voltage tics gives a generation lifetime of 90 ns, which is as expected for the collector doping of 7 /spl times/ 10/sup 17/ cm/sup -3/. These results indicate that the buried tungsten silicide layer does not have a serious impact on junction leakage.     

Investigation of breakdown and DC behavior in HBTs with (Al,Ga)As collector layer

We report on the realization of an InGaP-GaAs-based double heterojunction bipolar transistor with high breakdown voltages of up to 85 V using an Al/sub 0.2/Ga/sub 0.8/As collector. These results were achieved with devices with a 2.8 /spl mu/m collector doped to 6/spl times/10/sup 15/ cm/sup -3/ (with an emitter area of 60/spl times/60 /spl mu/m/sup 2/). They agree well with calculated data from a semi-analytical breakdown model. A /spl beta//R/sub SBI/ (intrinsic base sheet resistance) ratio of more than 0.5 by introducing a 150-nm-thick graded Al-content region at the base-collector heterojunction was achieved. This layer is needed to efficiently suppress current blocking, which is otherwise caused by the conduction band offset from GaAs to Al/sub 0.2/Ga/sub 0.8/As. The thickness of this region was determined by two-dimensional numerical device simulations that are in good agreement with the measured device properties.     

Demonstration of 1789 V, 6.68 m/spl Omega/ /spl middot/ cm/sup 2/ 4H-SiC merged-PiN-Schottky diodes

The design, fabrication and characterisation of a high performance 4H-SiC diode of 1789 V-6.6 A with a low differential specific-on resistance (R/sub SP/spl I.bar/ON/) of 6.68 m/spl Omega/ /spl middot/ cm/sup 2/, based on a 10.3 /spl mu/m 4H-SiC blocking layer doped to 6.6/spl times/10/sup 15/ cm/sup -3/, is reported. The corresponding figure-of-merit of V/sub B//sup 2//R/sub SP/spl I.bar/ON/ for this diode is 479 MW/cm/sup 2/, which substantially surpasses previous records for all other MPS diodes.     

Analysis of transit times and minority carrier mobility in n-p-n 4H-SiC bipolar junction transistors

An analysis of the transit times and minority carrier mobility in n-p-n 4H-SiC RF bipolar junction transistors is presented. These parameters were extracted from small signal RF measurements on 4H-SiC RF transistors with three different base thicknesses: 100, 140, and 200 nm. The study shows that the room temperature minority carrier electron mobility is 215 cm/sup 2//V/spl middot/s for a base Al doping of N/sub B/=4/spl times/10/sup 18/ cm/sup -3/. The analysis reveals that the collector charging time /spl tau//sub C/ and the parasitic charging time /spl tau//sub P/ from the capacitance between metal pads and the underlying collector region have a significant effect on the transistors RF performance. The calculated RF gain is in good agreement with the measured results.     

A novel InGaP/Al/sub x/Ga/sub 1-x/As/GaAs CEHBT

A new and interesting InGaP/Al/sub x/Ga/sub 1-x/As/GaAs composite-emitter heterojunction bipolar transistor (CEHBT) is fabricated and studied. Based on the insertion of a compositionally linear graded Al/sub x/Ga/sub 1-x/As layer, a near-continuous conduction band structure between the InGaP emitter and the GaAs base is developed. Simulation results reveal that a potential spike at the emitter/base heterointerface is completely eliminated. Experimental results show that the CEHBT exhibits good dc performances with dc current gain of 280 and greater than unity at collector current densities of J/sub C/=21kA/cm/sup 2/ and 2.70/spl times/10/sup -5/ A/cm/sup 2/, respectively. A small collector/emitter offset voltage /spl Delta/V/sub CE/ of 80 meV is also obtained. The studied CEHBT exhibits transistor action under an extremely low collector current density (2.7/spl times/10/sup -5/ A/cm/sup 2/) and useful current gains over nine decades of magnitude of collector current density. In microwave characteristics, the unity current gain cutoff frequency f/sub T/=43.2GHz and the maximum oscillation frequency f/sub max/=35.1GHz are achieved for a 3/spl times/20 /spl mu/m/sup 2/ device. Consequently, the studied device shows promise for low supply voltage and low-power circuit applications.     

10-kV, 123-m/spl Omega//spl middot/cm/sup 2/ 4H-SiC power DMOSFETs

10-kV, 123-m/spl Omega//spl middot/cm/sup 2/ power DMOSFETs in 4H-SiC are demonstrated. A 42% reduction in R/sub on,sp/, compared to a previously reported value, was achieved by using an 8 /spl times/ 10/sup 14/ cm/sup -3/ doped, 85-/spl mu/m-thick drift epilayer. An effective channel mobility of 22 cm/sup 2//Vs was measured from a test MOSFET. A specific on-resistance of 123 m/spl Omega//spl middot/cm/sup 2/ were measured with a gate bias of 18 V, which corresponds to an E/sub ox/ of 3 MV/cm. A leakage current of 197 /spl mu/A was measured at a drain bias of 10 kV from a 4H-SiC DMOSFET with an active area of 4.24 /spl times/ 10/sup -3/ cm/sup 2/. A switching time of 100 ns was measured in 4.6-kV, 1.3-A switching measurements. This shows that the 4H-SiC power DMOSFETS are ideal for high-voltage, high-speed switching applications.     

Full characterization of packaged Er-Yb-codoped phosphate glass waveguides

We present a procedure for the characterization of packaged Er-Yb-codoped phosphate glass waveguides. The procedure is based on precise measurements of the output optical powers when the waveguide is diode-laser pumped at 980 nm. The dependence of these optical powers on the input pump power is then fitted to the results from a numerical model that describes in detail the propagation of the optical powers inside the waveguide. The best fit is obtained for the following parameters: the signal wavelength scattering losses are /spl alpha/(1534)=8.3/spl times/10/sup -2/ dB/cm, the Yb/sup 3+/ absorption and emission cross sections (/spl ap/980 nm) are 5.4/spl times/10/sup -25/ m/sup 2/ and 7.0/spl times/10/sup -25/ m/sup 2/, the Er/sup 3+/ absorption and emission cross sections (/spl ap/980 nm) are 1.6/spl times/10/sup -25/ m/sup 2/ and 1.2/spl times/10/sup -25/ m/sup 2/, the Yb/sup 3+/--Er/sup 3+/ energy-transfer coefficient is 1.8/spl times/10/sup -23/ m/sup 3//s and the cooperative-upconversion coefficient is 8/spl times/10/sup -25/ m/sup 3//s. An approximate method is introduced that allows the determination of the absorption and emission cross section distributions for the erbium /sup 4/I/sub 13/2//spl hArr//sup 4/I/sub 15/2/ transition from the amplified spontaneous emission power spectrum.     

Nitride-based light-emitting diodes with Ni/ITO p-type ohmic contacts

The optical and electrical properties of Ni(5 nm)-Au(5 nm) and Ni(3.5 nm)-indium tin oxide (ITO) (60 nm) films were studied. It was found that the normalized transmittance of Ni/ITO film could reach 87% at 470 nm, which was much larger than that of the Ni-Au film. It was also found that the specific contact resistance was 5 /spl times/ 10/sup -4/ /spl Omega/ /spl middot/ cm/sup 2/ and 1 /spl times/ 10/sup -3/ /spl Omega/ /spl middot/ cm/sup 2/, respectively, for Ni-Au and Ni/ITO on p-GaN. Furthermore, it was found that the 20 mA output power of light-emitting diode (LED) with Ni-Au p-contact layer was 5.26 mW. In contrast, the output power could reach 6.59 mW for the LED with Ni/ITO p-contact layer.