Performance Study of a Class-E Power Amplifier With Tuned Series-Parallel Resonance Network

This paper reports on a modified class-E amplifier with a tuned series-parallel resonance network. This configuration introduces two additional resonance frequencies. The design equations required to determine the optimum operations are analyzed in detail by introducing three additional boundary conditions. compared to the conventional class-E amplifier, the numerical results show that the improvements on load resistance, maximum transistor current, power output capability, and maximum frequency can be obtained by properly selecting the resonance frequencies of the tuned network. Comparisons between simulations and measurements of an experimental circuit of the new configuration are drawn to validate the feasibility. The drain efficiency of 81.77%, power-added efficiency of 79.58%, and output power of 32.71 dBm (1.866 W) at 250 MHz are measured.     

Analysis and design of continuous class-E power amplifier at sub-nominal condition

The continuous class-E power amplifier at sub-nominal condition is proposed in this paper. The class-E power amplifier at continuous mode means it can be high efficient on a series matching networks while at sub-nominal condition means it only requires the zero-voltage-switching condition. Comparing with the classical class-E power amplifier, the proposed design method releases two additional design freedoms, which increase the class-E power amplifier’s design flexibility. Also, the proposed continuous class-E power amplifier at sub-nominal condition can perform high efficiency over a broad bandwidth. The performance study of the continuous class-E power amplifier at sub-nominal condition is derived and the design procedure is summarised. The normalised switch voltage and current waveforms are investigated. Furthermore, the influences of different sub-nominal conditions on the power losses of the switch-on resistor and the output power capability are also discussed. A broadband continuous class-E power amplifier based on a Gallium Nitride (GaN) transistor is designed and testified to verify the proposed design methodology. The measurement results show, it can deliver 10–15 W output power with 64–73% power-added efficiency over 1.4–2.8 GHz.     

A 700-MHz 1-W fully differential CMOS class-E power amplifier

A 700-MHz fully differential class-E CMOS power amplifier for wireless applications has been built toward maximum efficiency. The prototype can deliver 1 W of output power in a 50-Ω output impedance. The maximum power-added efficiency (PAE) is measured to be 62%. The obtained efficiency and output power is compared with the class-E amplifiers theory     

A planar 4.5-GHz DC-DC power converter

In this paper, we present two DC-DC converters that operate at a microwave frequency. The first converter consists of a class-E switched-mode microwave amplifier, which performs the DC-AC conversion, and two half-wave diode rectifier outputs. The class-E MESFET amplifier has a minimum power-added efficiency of 86%, corresponding drain efficiency of 95%, and 120 mW of output power at 4.5 GHz. The diode rectifier has a maximum conversion efficiency of 98% and an overall efficiency of 83%. The second converter consists of a high-efficiency class-E oscillator and a diode rectifier. The class-E oscillator has a maximum efficiency of 57% and maximum output power of 725 mW. The DC-DC converter is planar and compact, with no magnetic components, and with a maximum overall DC-DC conversion efficiency of 64% for a DC input of 3 V, and the output voltage across a 87-Ω load of 2.15 V     

A common-gate switched 0.9-W class-E power amplifier with 41% PAEin 0.25-μm CMOS

A power amplifier for wireless applications has been implemented in a standard 0.25-μm CMOS technology. The power amplifier employs class-E topology to exploit its soft-switching property for high efficiency. The finite dc-feed inductance in the class-E load network allows the load resistance to be larger for the same output power and supply voltage than that for an RF choke. The common-gate switching scheme increases the maximum allowable supply voltage by almost twice from the value for a simple switching scheme. By employing these design techniques, the power amplifier can deliver 0.9-W output power to 50-Ω load at 900 MHz with 41% power-added efficiency (PAE) from a 1.8-V supply without stressing the active devices     

Design of inverse class-E amplifier with finite D.C. feed inductance

This paper reports on a design of inverse class-E amplifier with finite D.C. feed inductance. The finite D.C. feed inductance is resonated by the parallel capacitance at the fundamental frequency. The direct design equations required to determine the optimum operations are derived in detail. Comparing with the classic inverse class-E amplifier, numerical results show that improvements in minimizing size, cost, and complexity of the circuit can be obtained by the inverse class-E topology with finite D.C. feed inductance. Comparing with the sub-harmonic and parallel-circuit class-E amplifiers, the inverse class-E topology with finite D.C. feed offers advantages for MMIC realization. Theoretical analysis is validated by numerical simulation and measurement. Excellent agreement between theory and simulation results is achieved. Comparison between simulations and measurements of an experimental circuit validate the feasibility of the design. A measured output power of 40.01 dBm, with a drain efficiency of 80.16% and power-added efficiency of 78.93% were obtained at 250 MHz with a 22-dBm input power.     

Off-Nominal Operation of Class-E Amplifier at Any Duty Ratio

Design equations for satisfying the suboptimum operating condition, i.e., only the zero-voltage switching (ZVS) condition, of a class-E amplifier with a linear shunt capacitance at any duty ratio are derived. By exploiting the suboptimum class-E operation, various amplifier parameters such as operating frequency, output power, load resistance, and component values can vary, while the ZVS operation and high efficiency can be achieved. An example of a design procedure of the class-E amplifier is given. The theoretical results were verified with PSpice simulation and an experiment.     

一种宽禁带器件的高效E类功率放大器设计

E类功率放大器是一种新型高效率放大器,属于开关模式功率放大器,其理论效率可以达到100%。可用于雷达、通信和电子对抗等领域的末级功率放大器,是系统高效率、高功率和小型化功率放大器的重要途径。通过分析其工作原理,设计了一款L波段高效E类功率放大器,输出功率大于10 W,实际漏极效率达到74.8%。     

记忆多项式数字预失真线性化逆E类功放

采用记忆多项式模型的数字预失真器,用于线性化逆E类射频功率放大器,从而获得具有高线性和高效率的射频放大系统,使得开关型的逆E类功率放大器可以适用于具有非恒包络的调制信号的发射。文中设计了一个工作于S频段的具有10W饱和功率的逆E类功率放大器,以具有5MHz信号带宽的单载波WCDMA信号作为测试信号,使用记忆多项式的预失真器对其进行线性化。实验表明,该记忆多项式预失真器能够很好地抑制逆E类功放的动态非线性引起的带外寄生频谱,可以使逆E类功放同时工作于高线性和高效率状态。     

A 2 W CMOS Hybrid Switching Amplitude Modulator for EDGE Polar Transmitters

This paper presents a hybrid switching amplitude modulator for class-E2 EDGE polar transmitters. To achieve both high efficiency and high speed, it consists of a wideband buffered linear amplifier as a voltage source and a PWM switching amplifier with a 2 MHz switching frequency as a dependent current source. The linear amplifier with a novel class-AB topology has a high current-driving capability of approximately 300 mA with a bandwidth wider than 10 MHz. It can also operate on four quadrants with very low output impedance of about 200 at the switching frequency attenuating the output ripple voltage to less than 12 . A feedforward path, a PWM control, and a third-order ripple filter are used to reduce the current burden of the linear amplifier. The output voltage of the hybrid modulator ranges from 0.4 to 3 V for a 3.5 V supply. It can drive an RF power amplifier with an equivalent impedance of 4 up to a maximum output power of 2.25 W with a maximum efficiency of 88.3%. The chip has been fabricated in a 0.35 m CMOS process and occupies an area of 4.7 .     

CMOS linear high performance push amplifier for WiMAX power amplifier

In this work a novel and efficient approach is proposed to optimize the linearity and efficiency of power amplifiers used in mobile WiMAX applications. A linear and high performance push amplifier is designed and implemented in 0.18 μm CMOS technology to enhance the linearity of a class-E switched-mode power amplifier. The proposed push amplifier consists of two sections; analog and switching sections. The analog section provides required linearity and the switching section guarantees satisfying total efficiency level. Each block is designed and optimized to meet required specifications. The core power amplifier which is a class-E switched-mode power amplifier is also designed to have maximum possible efficiency. The implemented circuit is simulated using HSPICERF and TSMC models for active and passive elements. The proposed power amplifier provides a maximum output power of 25 dBm and a power added efficiency (PAE) as high as 48% at 2.5 GHz operation frequency and supply voltage of 1.8 V. At 1 dB compression point this PA exhibits 23 dBm of output power with 42% PAE and 4.5% EVM which was appropriate for 64QAM OFDM signals.     

Class-E amplifier with an inductive impedance inverter

A design procedure and experimental results are presented for a class-E amplifier with an inductive impedance inverter. Experimental waveforms and characteristics measured at 1 MHz with an IRF620 MOSFET are given for the amplifier, which can operate under zero-voltage switching conditions for load resistances ranging from a short circuit to an open circuit. As the load resistance is increased at a fixed frequency, (1) the output power decreases, (2) a maximum efficiency of 96% occurs for optimum operation, (3) the peak values of the transistor voltage and the transistor current decrease, (4) the normalized peak values of the transistor voltage decrease, and (5) the normalized peak values of the transistor current increase     

微带线E类功率放大器的设计与实现

E类功率放大器作为开关模式放大器一种,其理想效率为100%。一种简单微带线拓扑网络的E类功率放大器被提出,这种微带线负载网络不仅满足E类功率放大器工作模式的特殊要求,而且对高次谐波有很好的抑制性,同时通过增加合适的偏置微带线可以拓宽放大器的工作带宽。采用ADS软件仿真电路,并在1GHz频率点电路实现了输出功率为4W,漏极效率为73.4%,其中漏极效率效率在63%以上的电路带宽为200MHz。     

Design of integrated 1.6 GHz, 2 W tuned RF power amplifier

This paper describes the design of an integrated tuned power amplifier specified to operate at Inmarsat satellite uplink frequencies from 1626.5 to 1660.5 MHz. The basic topology of the amplifier lies on the parallel tuned inverse class E amplifier that is modified by placing the DC-blocking capacitor into a new position and by adjusting the size of the capacitor to improve stability below the desired band. Further, the new positioning reduces losses between drain and load. The high currents flowing in the circuit made it necessary to use wide inductor width and high-Q finger capacitors in the on-chip resonator. The amplifier was implemented as a Gallium Arsenide (GaAs) integrated circuit (IC) that delivered 2 W of output power while the drain efficiency was ca. 56%. Measurements included source and load pulls to further improve the performance of the amplifier and to investigate the stability at small input drive levels.     

A highly efficient class-EF<Subscript>2</Subscript> power amplifier in GaAs pHEMT technology

This paper presents a highly efficient class-EF₂ power amplifier in GaAs pHEMT technology with high output power. Drain swing voltage of class-E power amplifier (PA) imposes a restriction on its output power. In this work, using a combination of class-E and F relaxes this limitation which may help in increasing DC supply voltage. Higher DC supply voltage of class-EF₂ PA leads to increased output power and efficiency, as output power is proportional to supply voltage. In addition, higher supply voltage permits PA to work under lower current which can cause to reduce power dissipation. Proposed class-EF₂ PA is implemented in a single recess AlGaAs–InGaAs pHEMT technology with 0.25-µm gate length; power added efficiency of 52% at 31 dBm output power is achieved at 1.8 GHz.     

S波段高效GaN逆E类功率放大器

介绍一种高效逆E类功率放大器的设计方法,并选用GaN器件设计了工作于2.3GHz的逆E类功率放大器。当供电26V,输入功率26dBm时,放大器输出功率40.2dBm,工作效率76.1%,PAE为73.3%。提供了详尽的仿真与实测数据并对放大器性能进行分析。用数字预失真技术对逆E类功率放大器进行线性化校正并取得了良好的效果。     

基于谐波调谐的双频高效功率放大器设计

为了满足无线通信系统对低功耗双频功放的需求,分析高效功放的阻抗条件,提出了一种新型双频输出匹配电路,包括谐波控制电路和基波匹配电路两部分.首先,通过调谐晶体管的谐波阻抗减小漏极电压和漏极电流波形的重叠,从而提高功放的效率;其次,通过公式推导得出双频阻抗匹配电路参数,将晶体管在两个频率下的最佳基波阻抗匹配至50Ω.为验证...     

A 1.9-GHz, 1-W CMOS class-E power amplifier for wirelesscommunications

This paper presents a 1-W, class-E power amplifier that is implemented in a 0.35-μm CMOS technology and suitable for operations up to 2 GHz. The concept of mode locking is used in the design, in which the amplifier acts as an oscillator whose output is forced to run at the input frequency. A compact off-chip microstrip balun is also proposed for output differential-to-single-ended conversion. At 2-V supply and at 1.98 GHz, the power amplifier achieves 48% power-added efficiency (41% combined with the balun)     

Class E high-efficiency tuned power oscillator

The class E high-efficiency transistor tuned power oscillator, based on the class E power amplifier, is presented. Theoretical conditions for optimum operation of the oscillator are formulated. A new feedback-loop circuit is proposed and a corresponding oscillator design procedure is given. Experimental results show that the collector-voltage and collector-current waveforms and the collector efficiency of the oscillator are the same as in the class E amplifier with the same transistor and operating at the same frequency. The measured collector efficiency was over 95 percent with 3 W output at 2 MHz. The proposed oscillator is especially applicable at high frequencies because it minimizes the power dissipated during the transistor off-to-on transition, even if the switching time is an appreciable fraction of the signal period.     

Inverse Class-E Amplifier With Transmission-Line Harmonic Suppression

This paper reports on the design methodology and experimental characterization of the inverse class-E power amplifier. A demonstration amplifier with excellent second and third harmonic-suppression levels has been designed, constructed, and measured. The circuit fabricated using a 1.2-mm gate-width GaAs MESFET is shown to be able to deliver 22-dBm output power at 2.3 GHz. The amplifier achieve a peak power-added efficiency of 64% and drain efficiency of 69%, and exhibits 11.6 dB power gain when operated from a 3-V supply voltage. Comparisons of simulated and measured results are given with good agreement between them being obtained. Experimental results are presented for the amplifier's response to Gaussian minimum shift keying modulation, where a peak error vector modulation value of 0.6% is measured.