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1.
In a multiprocessor array, some processing elements (PEs) fail to function normally due to hardware defects or soft faults caused by overheating, overload or occupancy by other running applications. Fault-tolerant reconfiguration reorganizes fault-free PEs to a new regular topology by changing the interconnection among PEs. This paper investigates the problem of constructing as large as possible logical array with short interconnects from a physical array with faults. A flexible rerouting scheme is developed to improve the efficiency of utilizing fault-free PEs. Under the scheme, two efficient reconfiguration algorithms are proposed. The first algorithm is able to generate the maximum logical array (MLA) in linear time. The second algorithm reduces the interconnect length of the MLA, and it is capable of producing nearly optimal logical arrays in comparison to the lower bound of the interconnect length, that is also proposed in this paper. Experimental results validate the efficiency of the flexible rerouting schemes and the proposed algorithms. For 128×128 host arrays with 30% unavailable PEs, the proposed approaches improve existing algorithm up to 44% in terms of logical array size, while reducing the interconnection redundancy by 49.6%. In addition, the proposed algorithms are more scalable than existing approaches. On host arrays with 50% unavailable PEs, our algorithms can produce logical arrays with harvest over 56% while existing approaches fail to construct a feasible logical array.  相似文献   

2.
In this paper we analyze the algorithms expressed as a system of recurrence equations. The algorithms are called 2?1 output algorithms if two output values of one function (variable identification) are specified by the system of recurrence equations for each index point in the algorithm. The algorithm is in free form if the indexes of these two values are not dependent. Two standard classes are determined by this criteria: the nearest neighbour and the all pair form. For example the sorting algorithm can be expressed in the all pair form i.e., the linear insertion algorithm or in the nearest neighbour form i.e., the bubble sort algorithm. However these algorithms are different in their nature. A procedure to eliminate the computational broadcast for the all pair 2?1output algorithm has been proposed by the authors in [1]. The result obtained by implementing this procedure was a localized form of the algorithm and a system of uniform recurrence equations by eliminating the computational and data broadcast. So he data dependence method can be efficiently used for parallel implementations. The proposed procedure cannot be implemented directly on the nearest neighbour form algorithms. Here we show how the algorithm can be restructured into a form where the computational and data broadcast can be eliminated. These transformations result in localized algorithms. A few examples show how these algorithms can be implemented on processor arrays. For example, the Gentleman Kung triangular array [2] can be used for solving the QR decomposition algorithm for both forms of the algorithm. The implementations differ in the order of the data flow and the processor operation. We show that the implementation of the nearest neighbour algorithm is even better than the standard one.  相似文献   

3.
We present an adaptive fault-tolerant wormhole routing algorithm for hypercubes by using 3 virtual networks. The routing algorithm can tolerate at least n−1 faulty nodes and can route a message via a path of length no more than the shortest path plus four. Previous algorithms which achieve the same fault tolerant ability need 5 virtual networks. Simulation results are also given in this paper.  相似文献   

4.
In this paper, we present a fault-tolerant routing algorithm for torus networks by using only 4 virtual channels. The proposed algorithm is based on the solid fault model, which includes rectangular faults and many practical nonconvex faults. Previous works need at least 6 virtual channels to achieve the same fault-tolerant ability.  相似文献   

5.
Large-scale multiple processor systems are already widely used in the field of process control. They are real-time systems and differ considerably from traditional computer systems. Such systems are used to perform a large variety of relatively complex tasks, many of them extremely time-critical. In the near future, the tasks will increase in number and size and will become even more time-critical, caused, for instance, by the expected integration of expert systems in process control. The question naturally arises as to whether or not such an increase of the requirements could be met by a straightforward enhancement of present designs [10], the interconnection network being in any case the key issue.

The paper describes the concept of a new crossbar switch design, based on the use of so-called configurational processors that would be extraordinarily well suited to the specific requirements in the field of process control. The new design principle is VLSI-compatible; the whole crossbar switch can be implemented with building blocks of one type. It is possible to arrange these components for the crossbar switch in close proximity to the processing elements, which are physically distributed throughout the whole area of a plant. This characteristic, in combination with the use of bitserial buses, allows a crossbar switch to be implemented in an advantageous manner, particularly without excessive cabling costs.  相似文献   


6.
This paper investigates the design of fault-tolerant TDMA-based data aggregation scheduling (DAS) protocols for wireless sensor networks (WSNs). DAS is a fundamental pattern of communication in wireless sensor networks where sensor nodes aggregate and relay data to a sink node. However, any such DAS protocol needs to be cognisant of the fact that crash failures can occur. We make the following contributions: (i) we identify a necessary condition to solve the DAS problem, (ii) we introduce a strong and weak version of the DAS problem, (iii) we show several impossibility results due to the crash failures, (iv) we develop a modular local algorithm that solves stabilising weak DAS and (v) we show, through simulations and an actual deployment on a small testbed, how specific instantiations of parameters can lead to the algorithm achieving very efficient stabilisation.  相似文献   

7.
k-ary n-cubes are a class of communication patterns that are employed by a number of typical parallel algorithms. This paper addresses the implementation of parallel algorithms with bidirectional 3-ary n-cube communication patterns on a bidirectional linear array WDM optical networks when the information is transmitted one dimension after another. By giving an embedding scheme ?, we prove the optimal number of wavelengths under ? and design a routing and wavelength assignment strategy of it.  相似文献   

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