Catalyst incorporation at defects during nanowire growth

Scanning and transmission electron microscopy was used to correlate the structure of planar defects with the prevalence of Au catalyst atom incorporation in Si nanowires. Site-specific high-resolution imaging along orthogonal zone axes, enabled by advances in focused ion beam cross sectioning, reveals substantial incorporation of catalyst atoms at grain boundaries in <110> oriented nanowires. In contrast, (111) stacking faults that generate new polytypes in <112> oriented nanowires do not show preferential catalyst incorporation. Tomographic reconstruction of the catalyst-nanowire interface is used to suggest criteria for the stability of planar defects that trap impurity atoms in catalyst-mediated nanowires.     

In‐situ Observations of Nanoscale Effects in Germanium Nanowire Growth with Ternary Eutectic Alloys

Vapour‐liquid‐solid (VLS) techniques are popular routes for the scalable synthesis of semiconductor nanowires. In this article, in‐situ electron microscopy is used to correlate the equilibrium content of ternary (Au_0.75Ag_0.25–Ge and Au_0.65Ag_0.35–Ge) metastable alloys with the kinetics, thermodynamics and diameter of Ge nanowires grown via a VLS mechanism. The shape and geometry of the heterogeneous interfaces between the liquid eutectic and solid Ge nanowires varies as a function of nanowire diameter and eutectic alloy composition. The behaviour of the faceted heterogeneous liquid–solid interface correlates with the growth kinetics of the nanowires, where the main growth facet at the solid nanowire–liquid catalyst drop contact line lengthens for faster nanowire growth kinetics. Pronounced diameter dependent growth kinetics, as inferred from liquid–solid interfacial behaviour, is apparent for the synthesised nanowires. Direct in‐situ microscopy observations facilitates the comparison between the nanowire growth behaviour from ternary (Au–Ag–Ge) and binary (Au–Ge) eutectic systems.     

Epitaxial growth of silicon nanowires using an aluminium catalyst

Silicon nanowires have been identified as important components for future electronic and sensor nanodevices. So far gold has dominated as the catalyst for growing Si nanowires via the vapour-liquid-solid (VLS) mechanism. Unfortunately, gold traps electrons and holes in Si and poses a serious contamination problem for Si complementary metal oxide semiconductor (CMOS) processing. Although there are some reports on the use of non-gold catalysts for Si nanowire growth, either the growth requires high temperatures and/or the catalysts are not compatible with CMOS requirements. From a technological standpoint, a much more attractive catalyst material would be aluminium, as it is a standard metal in Si process lines. Here we report for the first time the epitaxial growth of Al-catalysed Si nanowires and suggest that growth proceeds via a vapour-solid-solid (VSS) rather than a VLS mechanism. It is also found that the tapering of the nanowires can be strongly reduced by lowering the growth temperature.     

Controlling heterojunction abruptness in VLS-grown semiconductor nanowires via in situ catalyst alloying

For advanced device applications, increasing the compositional abruptness of axial heterostructured and modulation doped nanowires is critical for optimizing performance. For nanowires grown from metal catalysts, the transition region width is dictated by the solute solubility within the catalyst. For example, as a result of the relatively high solubility of Si and Ge in liquid Au for vapor-liquid-solid (VLS) grown nanowires, the transition region width between an axial Si-Ge heterojunction is typically on the order of the nanowire diameter. When the solute solubility in the catalyst is lowered, the heterojunction width can be made sharper. Here we show for the first time the systematic increase in interface sharpness between axial Ge-Si heterojunction nanowires grown by the VLS growth method using a Au-Ga alloy catalyst. Through in situ tailoring of the catalyst composition using trimethylgallium, the Ge-Si heterojunction width is systematically controlled by tuning the semiconductor solubility within a metal Au-Ga alloy catalyst. The present approach of alloying to control solute solubilities in the liquid catalyst may be extended to increasing the sharpness of axial dopant profiles, for example, in Si-Ge pn-heterojunction nanowires which is important for such applications as nanowire tunnel field effect transistors or in Si pn-junction nanowires.     

On the p-type character of Cd-and Zn-doped InAs nanowires

InAs nanowires are potential materials for high speed nanoelectronic devices due to their high electron mobility among the semiconductor nanostructures. One of the main challenges, however, is to obtain a p-type InAs material, since the Fermi level is usually pinned at the conduction band, leading to an intrinsic n-type behaviour. Here we show through first principles calculations that InAs nanowires, doped with Cd or Zn substitutional impurities, can behave as p-type materials. Differently from other III-V nanowires, these impurities introduce shallow acceptor levels. We show that the Zn impurity can be equally distributed along the nanowire radius, naturally compensating the surface levels. On the other hand, the Cd impurity is preferentially found in the core region, requiring a surface treatment to eliminate the surface pinning levels. These results explain the available experiments and show how and why p-type InAs nanowires can be obtained.     

Direct imaging of the atomic structure inside a nanowire by scanning tunnelling microscopy

Semiconductor nanowires are expected to be important components in future nano-electronics and photonics. Already a wide range of applications has been realized, such as high-performance field-effect transistors, bio/chemical sensors, diode logics and single-nanowire lasers. As nanowires have small cross-sections and large surface-to-bulk ratios, their properties can be significantly influenced by individual atomic-scale structural features, and they can have properties or even atomic arrangements with no bulk counterparts. Hence, experimental methods capable of directly addressing the atomic-scale structure of nanowires are highly desirable. One such method is scanning tunnelling microscopy (STM), which, by direct imaging of the atomic and electronic structure of surfaces has revolutionized the perception of nanoscale objects and low-dimensional systems. Here we demonstrate how combining STM with an embedding scheme allows us to image the interior of semiconductor nanowires with atomic resolution. Defect structures such as planar twin segments and single-atom impurities are imaged inside a GaAs nanowire. Further, we image an intriguing GaAs nanowire that is separated into two distinct nanocrystallites along the growth direction of the wire.     

Defect transfer from nanoparticles to nanowires

Metal-seeded growth of one-dimensional (1D) semiconductor nanostructures is still a very active field of research, despite the huge progress which has been made in understanding this fundamental phenomenon. Liquid growth promoters allow control of the aspect ratio, diameter, and structure of 1D crystals via external parameters, such as precursor feedstock, temperature, and operating pressure. However the transfer of crystallographic information from a catalytic nanoparticle seed to a growing nanowire has not been described in the literature. Here we define the theoretical requirements for transferring defects from nanoparticle seeds to growing semiconductor nanowires and describe why Ag nanoparticles are ideal candidates for this purpose. We detail in this paper the influence of solid Ag growth seeds on the crystal quality of Ge nanowires, synthesized using a supercritical fluid growth process. Significantly, under certain reaction conditions {111} stacking faults in the Ag seeds can be directly transferred to a high percentage of <112>-oriented Ge nanowires, in the form of radial twins in the semiconductor crystals. Defect transfer from nanoparticles to nanowires could open up the possibility of engineering 1D nanostructures with new and tunable physical properties and morphologies.     

Effect of point defects and impurities on the electronic transport of Au tipped ultranarrow PbS nanorods

Electronic transport through single nanowire/nanorod directly probes the fundamental limits of semiconductor device miniaturization. Point defects or impurity centers form easily during the growth of nanorods/nanowires which may strongly affect the electronic transport efficiencies. Existing models of electronic transport are often unable to determine the role of defects and impurities at the nanoscale because there are significant differences between nanostructures and bulk materials arising from unique geometries and confinement. The effect of defect and impurities on the conductance of a model ultranarrow PbS rod was modeled using density functional theory. It was observed that the introduction of defects and Au impurities modified the orbital energies of PbS nanorods and reduced the conductance compared to the defect-free rod. The conductance for the nanorods with defects and impurities were limited by the number of available conduction channels required for efficient electronic conduction.     

Investigation of initial growth of ZnO nanowires and their growth mechanism

ZnO nanowires were synthesized on Si substrates by a simple metal vapor deposition method without any catalysts. The initial growth and the growth mechanism of the ZnO nanowires were studied using scanning and transmission electron microscopy. We found that the ZnO nanowires grew on the Si substrate via a self-seeding vapor-solid mechanism. The growth process of the ZnO nanowires consisted of four steps: self-seeding, one-dimensional epitaxial growth of the nanowires on the seeds by a base-growth mode, further acceleration of nanowire growth with additional seeding, and active formation of the nanowires.     

Gold/boron core-shell nanocables synthesized from gold-boron eutectic droplets

Metal/semiconductor core-shell coaxial nanocables are promising building blocks for nanoelectronic devices while in situ growth of these nanocables remains challenging due to the distinctly different synthesis temperature ranges required for metals and semiconductors. To overcome this difficulty, we have developed a vapor-liquid-solid and oxide-assisted bimodal competition growth strategy for in situ metal/semiconductor core-shell nanocable growth. Using this process, gold/boron core-shell nanocables were obtained. A core-shell Au-B/BO(x) eutectic droplet formed via hydrogen gas-assisted rapid cooling was found critical for initiation of the nanocable growth. In addition, the large difference in the boron nanowire growth rates in the vapor-liquid-solid and oxide-assisted mechanisms facilitates the layered growth in the nanocables. The compatibility of this method with the vapor-liquid-solid process applied widely for semiconductor nanowire growth allows in situ connection of metal/semiconductor nanocables with semiconductor nanowires.     

Electron Tomography Reveals the Droplet Covered Surface Structure of Nanowires Grown by Aerotaxy

For the purpose of functionalizing III‐V semiconductor nanowires using n‐doping, Sn‐doped GaAs zincblende nanowires are produced, using the growth method of Aerotaxy. The growth conditions used are such that Ga droplets, formed on the nanowire surface, increase in number and concentrations when the Sn‐precursor concentration is increased. Droplet‐covered wires grown with varying Sn concentrations are analyzed by transmission electron microscopy and electron tomography, which together establish the positioning of the droplets to be preferentially on {?111}B facets. These facets have the same polarity as the main wire growth direction, [?1?1?1]B. This means that the generated Ga particles can form nucleation sites for possible nanowire branch growth. The concept of azimuthal mapping is introduced as a useful tool for nanowire surface visualization and evaluation. It is demonstrated here that electron tomography is useful in revealing both the surface and internal morphologies of the nanowires, opening up for applications in the analysis of more structurally complicated systems like radially asymmetrical nanowires. The analysis also gives a further understanding of the limits of the dopants which can be used for Aerotaxy nanowires.     

Fabrication, structural characterization and photoluminescence of Q-1D semiconductor ZnS hierarchical nanostructures

Quasi-one-dimensional semiconductor ZnS hierarchical nanostructures have been fabricated by thermal evaporation of a mixture of ZnS nanopowders and Sn powders. Sn nanoparticles are located at or close to the tips of the nanowires (or nanoneedles) and served as the catalyst for quasi-one-dimensional ZnS nanostructure growth by a vapour-liquid-solid mechanism. The morphology and microstructure of the ZnS hierarchical nanostructures were measured by scanning electron microscopy and high-resolution transmission electron microscopy. The results show that a large number of ZnS nanoneedles were formed on the outer shells of a long and straight ZnS axial nanowire. The ZnS axial nanowires grow along the [001] direction, and ZnS nanoneedles are aligned over the surface of the ZnS nanowire in the radial direction. The room temperature photoluminescence spectrum exhibits a UV weak emission centred at 337?nm and one blue emission centred at 436?nm from the as-synthesized single-crystalline semiconductor ZnS hierarchical nanostructures.     

Statistical analysis of excitonic transitions in single,free-standing GaN nanowires: Probing impurity incorporation in the poissonian limit

Single, free-standing GaN nanowires grown by plasma-assisted molecular-beam epitaxy have been investigated with low temperature micro-photoluminescence. The quantitative analysis of the luminescence spectra of around 100 nanowires revealed that each nanowire exhibits its own individual spectrum. A significant fraction of nanowires exclusively emits at energies corresponding to either surface-donor-bound or free excitons, demonstrating that optical properties of individual nanowires are determined by a few impurity atoms alone. The number of impurities per nanowire and their location within the nanowires varies according to Poissonian statistics.     

Mineralization of semiconductor nanocrystals on peptide-coated bionanotubes and their pH-dependent morphology changes

While various mineralizing peptides have been applied to grow metal nanoparticles on bionanotube templates, the semiconductor nanoparticle growth on nanotubes has not extensively been explored yet. In this paper, various semiconductor nanocrystals were grown on the bionanotubes surfaces with controlled sizes. When three synthetic peptides, which recognize and selectively bind Ge, Ti, and Cu ions, respectively, were incorporated on template bionanotube surfaces, highly crystalline and monodisperse Ge, TiO2, and Cu2S nanocrystals were grown on the tube surfaces. The sizes of these nanocrystals could be tuned as a function of pH, and larger semiconductor nanocrystals were grown as the pH of growth solutions was increased. All of these nanocrystals from smaller sizes to larger sizes had the same crystallinity. This peptide-controlled nanocrystal growth technique will be very useful to prepare semiconductor nanowires as building blocks for future microelectronics, whose band gaps can be tuned by the sizes of coated semiconductor nanoparticles via their quantum confinement effect. The novelty of this approach in the electronic device fabrication is that the semiconductor nanocrystal size control can be achieved by controlling peptide configurations via pH change, and this control may tune electronic structures and band gaps of the resulting semiconductor nanowires.     

Diameter-dependent composition of vapor-liquid-solid grown Si(1-x)Ge(x) nanowires

Diameter-dependent compositions of Si(1-x)Ge(x) nanowires grown by a vapor-liquid-solid mechanism using SiH(4) and GeH(4) precursors are studied by transmission electron microscopy and X-ray energy dispersive spectroscopy. For the growth conditions studied, the Ge concentration in Si(1-x)Ge(x) nanowires shows a strong dependence on nanowire diameter, with the Ge concentration decreasing with decreasing nanowire diameter below approximately 50 nm. The size-dependent nature of Ge concentration in Si(1-x)Ge(x) NWs is strongly suggestive of Gibbs-Thomson effects and highlights another important phenomenon in nanowire growth.     

Growth mode control for direct-gap core/shell Ge/GeSn nanowire light emission

Germanium-tin is a promising semiconductor alloy system for novel light emitting devices and optical sensors in the mid-IR region. For sufficiently high Sn compositions, the material has a direct band-gap near 0.5 eV, and could have applications either as a detector or an emitter. Although high Sn compositions have been achieved in Ge_1−xSn_x through a variety of growth strategies, the understanding of how chemical vapor deposition conditions affect Sn composition and optical properties in core–shell Ge/Ge_1−xSn_x nanowires is still lacking. In this study, gas precursor partial pressures and shell growth temperatures are systematically varied to provide guiding principles to overcome obstacles for higher Sn incorporation. We achieve a direct band-gap material using an elastically compliant Ge core nanowire substrate. In the course of the growth study, we demonstrate several findings regarding the Ge_1−xSn_x shell growth mechanism. First, we observe an H₂ passivation effect in which higher H₂ to SnCl₄ partial pressure ratio results in a concurrent increase in axial wire growth and decrease in radial growth. Second, we find that Ge_1−xSn_x shell growth in the studied CVD process is mass transport limited. Third, our results suggest that low shell growth temperature and high shell growth rate facilitate high Sn composition through metastable Sn solute trapping due to suppressed surface diffusion relative to the velocity of advancing shell surface steps. In this work, we demonstrate single nanowire photoluminescence at room temperature from core-shell Ge/Ge_0.88Sn_0.12 nanowires. Understanding the Ge_1−xSn_x shell growth mechanism via chemical vapor deposition (CVD) facilitates achieving minimal residual strain in the shell and the high crystalline quality and large Sn composition necessary for the observed optical properties. The results are universally applicable to Ge_1−xSn_x thin film epitaxy on compliant substrates including grown or etched nanowires, nanosheets, or free-standing 2D crystals.     

Sn(78)Ge(22)@carbon core-shell nanowires as fast and high-capacity lithium storage media

Branched Sn78Ge22@carbon core-shell nanowires were prepared by thermal annealing of butyl-capped Sn78Ge22 clusters at 600 degrees C in a vacuum. The first discharge and charge capacities are 1250 and 1107 mA h/g, showing a Coulombic efficiency of 88%. Such a one-dimensional core-shell design exploits the benefits of the Sn78Ge22 nanowire to produce an exceptional high rate lithium reactivity (93% Coulombic efficiency at 8C (=6400 mA/g) rate) as well as excellent capacity retention after extended cycles (capacity retention of 94%).     

几种Si、Ge纳米线导热系数的原子模拟

采用非平衡分子动力学方法模拟了Si纳米线、Ge纳米线、核-壳结构的Si/Ge纳米线及超晶格结构的Si/Ge纳米线的导热系数,给出了纳米线的温度与导热系数关系曲线,对比了几种纳米线导热特性的差异,研究结果表明,随着温度的升高,各纳米线的导热系数降低;相同温度下,纳米线导热系数的大小顺序为：核-壳结构的Si/Ge纳米线、超晶格结构的Si/Ge纳米线、Si纳米线、Ge纳米线。     

Interface charge induced p-type characteristics of aligned Si(1-x)Gex nanowires

This study reports the electrical transport characteristics of Si(1-x)Gex (x=0-0.3) nanowires. Nanowires with diameters of 50-100 nm were grown on Si substrates. The valence band spectra from the nanowires indicate that energy band gap modulation is readily achievable using the Ge content. The structural characterization showed that the native oxide of the Si(1-x)Gex nanowires was dominated by SiO2; however, the interfaces between the nanowire and the SiO2 layer consisted of a mixture of Si and Ge oxides. The electrical characterization of a nanowire field effect transistor showed p-type behavior in all Si(1-x)Gex compositions due to the Ge-O and Si-O-Ge bonds at the interface and, accordingly, the accumulation of holes in the level filled with electrons. The interfacial bonds also dominate the mobility and on- and off-current ratio. The large interfacial area of the nanowire, together with the trapped negative interface charge, creates an appearance of p-type characteristics in the Si(1-x)Gex alloy system. Surface or interface structural control, as well as compositional modulation, would be critical in realizing high-performance Si(1-x)Gex nanowire devices.