EDA仿真技术在电子线路分析中的应用

强调目前电子工程师们从事电子产品设计时,如何利用ＥＤＡ技术,使用计算机仿真软件对电路,信号与系统进行辅助分析,优化电路设计,提高开发产品进程及设计人员的工作效率。并结合实例介绍了Ｅｌｅｃｔｒｏｎｉｃｓ Ｗｏｒｋｂｅｎｃｈ软件对实际电子线路进行仿真分析的方法。     

SEDAN－Ⅲ半导体器件模拟程序介绍

ＳＥＤＡＮ－Ⅲ半导体器件模拟程序介绍ＡｎＩｎｔｒｏｄｕｃｔｉｏｎｔｏｔｈｅＳｉｍｕｌａｔｉｎｇＰｒｏｇｒａｍｏｆＳＥＤＡＮ－ⅢＳｅｍｉｃｏｎｄｕｃｔｏｒＤｅｖｉｃｅｓ￥／／西安理工大学高勇ＳＥＤＡＮ（ＳＥ——ｃ。ｎｄｕＣｔｏｒＤｅＶｋｅＡＮｄｙＳＩｓ...     

THE COMMON LAWS OF MASS TRANSFER PROCESSES IN CHEMICAL ENGINEERING

ＴＨＥＣＯＭＭＯＮＬＡＷＳＯＦＭＡＳＳＴＲＡＮＳＦＥＲＰＲＯＣＥＳＳＥＳＩＮＣＨＥＭＩＣＡＬＥＮＧＩＮＥＥＲＩＮＧＺｈｏｎｇＤｕｎａｎ（ＳｃｉｅｎｃｅＤｅｐａｒｔｍｅｎｔⅡ）Ａｂｓｔｒａｃｔ：Ｉｎｔｈｅｖａｒｉｏｕｓｍａｓｓｔｒａｎｓｆｅｒｐｒｏｃｅ...     

电网调度自动化系统运行统计分析软件ESSA设计

介绍了在汉化ＤＯＳ环境下用ＦＯＸＰＲＯＶ２．５（Ｘ）开发的电网调度自动化系统运行统计分析软件ＥＳＳＡ，重点介绍了ＥＳＳＡ的总体结构和功能，阐述统计分析方法的实现。     

GTR,IGBT在RDCLI变频调速装置中的应用特点

ＧＴＲ、ＩＧＢＴ在ＲＤＣＬＩ变频调速装置中的应用特点西北工业大学陈宁，周继华，焦振宏（西安７１００７２）ＴｈｅＡｐｐｌｉｃａｔｉｏｎＣｈａｒａｔｅｒｉｚａｔｉｏｎｏｆＧＴＲａｎｄＩＧＢＴｉｎＲＤＣＬＩＶＶＶＦＥｑｕｉｐｍｅｎｔ￥／／本文分析零电压情况...     

基于E-dot探头的冲击电压测量系统

介绍了基于Ｅ－ｄｏｔ探头的冲击电压测量系统的原理和特点,研制了一套用于测量真空中绝缘子上冲击电压的Ｅ－ｄｏｔ冲击电压测量系统,同时利用ＰＳＰＩＣＥ电路分析软件对所研制的冲击电压测量系统进行了分析和优化。通过利用美国ＰＥＲＳＯＮ公司的ＶＤ－３０５Ａ 型分压器对该系统进行校验后的结果表明,该系统完全可以用于冲击电压的测量。     

06 配电网实时恢复供电的一种实用方法

０６配电网实时恢复供电的一种实用方法＝Ｒｅａｌ－ｔｉｍｅｓｅｒｖｉｃｅｒｅｓｔｏｒａｔｉｏｎｉｎｄｉｓｔｒｉｂｕｔｉｏｎｎｅｔｗｏｒｋｓ：Ａ　Ｐｒａｃｔｉｃａｌａｐｐｒｏａｃｈ　［刊．英］／ＳａｒｍａＮＤＲ…∥ＩＥＥＥＴｒａｎｓｏｎＰｏｗｅｒＤｅｌｉ...     

基于E-dot探头的冲击电压测量系统

介绍了基于Ｅ－ｄｏｔ探头的冲击电压测量系统的原理和特点，研制了一套用于测量真空中绝缘子上冲击电压的Ｅ－ｄｏｔ冲击电压测量系统，同时利用ＰＳＰＩＣＥ电路分析软件对所研制的冲击电压测量系统进行了分析和优化。通过利用美国ＰＥＲＳＯＮ公司的ＶＤ－３０５Ａ 型分压器对该系统进行校验后的结果表明，该系统完全可以用于冲击电压的测量。     

电力科技信息

01　电力变压器中静态起电的实验研究和建模 =Ｅｘｐｅｒｉｍｅｎｔａｌｓｔｕｄｙａｎｄｍｏｄｅｌｉｎｇｏｆｓｔａｔｉｃｅｌｅｃｔｒｉｆｉｃａｔｉｏｎｉｎｐｏｗｅｒｔｒａｎｓｆｏｒｍｅｒｓ〔刊 ,英〕/ＭｏｒｅａｕＯ…∥ＩＥＥＥＴｒａｎｓａｃｔｉｏｎｓｏｎＩｎｄｕｓｔｒｙＡｐｐｌｉｃａ ｔｉｏｎｓ.- 2 0 0 1,37(4) .- 971～ 9770 2　电流源逆变器电压调整的改进 =Ｉｍｐｒｏｖｅｄｖｏｌｔａｇｅｒｅｇｕｌａ ｔｉｏｎｆｏｒｃｕｒｒｅｎｔ ｓｏｕｒｃｅｉｎｖｅｒｔｅｒｓ〔刊 ,英〕/ＺｍｏｏｄＤＮ…∥ＩＥＥＥＴｒａｎｓ…     

电力科技信息

０１用于配电网电压稳定性提高的电网结构变换＝Ｎｅｔ－ｗｏｒｋｒｅｃｏｎｆｉｇｕｒａｔｉｏｎｆｏｒｅｎｈａｎｃｍｅｎｔｏｆｖｏｌｔｓｇｅｓｔａｂｉｌｉｔｙｉｎｄｉｓｔｒｉｂｕｔｉｏｎｎｅｔｗｏｒｋｓ［刊,英］／ＫａｓｈｅｍＭＡ…／／ＩＥＥＰｒｏ－ｃｅｅｄｉｎｇｓ：Ｇｅｎｅｒａｔｉｏｎ,ＴｒａｎｓｍｉｓｓｉｏｎａｎｄＤｉｓｔｒｉｂｕｔｉｏｎ．－２０００,１４７（３）．－１７１～１７５０２采用控制有源直流滤波器的陷波滤波器消除高压直流系统的谐波＝ＨａｒｍｏｎｉｃｃａｎｃｅｌｌａｔｉｏｎｆｏｒＨＶＤＣｓ…     

反馈式电压放大器增益与带宽相关性系统分析

对用四种运放作开环元件的反馈式电压放大器的增益与带宽相关性作系统分析，结果表明：传统电压型运放闭环电压放大器的增益－带宽积为常数；其它三种运放闭环电压放大器的增益与带宽相互独立，带宽可在增益改变下保持常数；环增益对增益与带宽相关性有重要作用。ＳＰＩＣＥ模拟结果验证了理论分析的正确性。     

Design of an automatic gain control loop for high speed communication

This paper presents the design of an automatic gain control (AGC) loop for high-speed communication systems, which can be used in wired, wireless, or optical receiver. The design is performed in 130 nm SiGe BiCMOS technology. A Gilbert cell-based variable gain amplifier is designed, which shows approximately linear gain control with respect to the gain control voltage. The variable gain amplifier is followed by two fixed gain cascode amplifiers. Then, a full wave rectifier-based peak detector is designed and analyzed. To reduce the peak detector error, a compensation technique is applied. Finally, an operational amplifier is designed, which is used as voltage adder and comparator. The designed AGC loop is simulated with sinusoidal and pseudorandom binary sequence (prbs) input signal with high frequency signal of 1 to 30 GHz. The simulation results of the AGC loop show that a gain tuning range of 47 dB (−7 to 40 dB) is obtained in this design. It is also seen that the reference signal can be varied from 50 to 200 mV. This AGC works in the input voltage signal range between 3 mV peak and 230 mV peak, and the power dissipation of is 79 mW.     

大容性负载双极性高压功率放大器设计

设计了一种适合压电陶瓷驱动器等大容性负载动态应用的双极性高压功率放大器,它基于误差放大式原理,采用高压集成运放(PA89)驱动多组并联功率放大级的电路结构,在实现双极性高电压输出的同时具有很强的电流驱动能力.该放大器驱动等效电容为2.5μF的压电陶瓷驱动器时,能实现单端到地-500～+500V高压输出,电压增益40dB...     

0.5‐V bulk‐driven differential amplifier

A new 0.5‐V fully differential amplifier is proposed in this article. The structure incorporates a differential bulk‐driven voltage follower with conventional gate‐driven amplification stages. The bulk‐driven voltage follower presents differential gain equal to unity while suppressing the input common‐mode voltage. The amplifier operates at a supply voltage of less than 0.5 V, performing input transconductance almost equal to a gate transconductance and relatively high voltage gain without the need for gain boosting. The circuit was designed and simulated using a standard 0.18‐µm CMOS n‐well process. The low‐frequency gain of the amplifier was 56 dB, the unity gain bandwidth was approximately 3.2 MHz, the spot noise was 100 nV/√Hz at 100 kHz and the current consumption was 90 μΑ. Copyright © 2012 John Wiley & Sons, Ltd.     

激光回波小信号宽带放大器设计

设计了一款激光回波小信号宽带低噪声放大器。选用低噪声、高带宽电流反馈型差分运算放大器THS4509,采用两级放大电路结构以获得较大的放大倍数,利用传输线变压器实现输出信号由双端到单端转换。为减小噪声,采用过渡带特性最好的椭圆低通滤波器滤除带外噪声。经实验验证,该放大器具有40 dB放大倍数、120 MHz带宽和小于10 mV(pp)的系统噪声,能对各种反射率条件下不同目标反射回的微弱激光小信号进行有效放大,较好地解决了远距离和低反射率目标物体测距问题,实际测试测距量程可达450 m。     

新型电子式电流互感器测量精度分析

通过对新型电子式电流互感器的基本测量原理进行介绍和分析可知:采用Rogowski线圈为传感头的电子式电流互感器,就必须再加入积分环节,从而使电子式电流互感器的精度受积分器精度的影响较大。从集成运放输入失调电压、偏置电流及其漂移、集成运放增益和带宽、温度变化对积分电路的影响3个方面分析了传统的模拟积分器对测量精度的影响,并总结出了误差公式。最后,提出了数字式积分器的必要性和可行性,给出了数字式积分器的实现方案。     

A 60‐GHz power amplifier design with on‐chip tunable load‐matching network and power detect in 90‐nm CMOS

This paper presents a 60‐GHz power amplifier with on‐chip varactor‐based tunable load‐matching networks and an embedded DC temperature‐sensor‐based power detector. The output power can be monitored by the DC temperature sensor, and load‐matching network can be tuned by regulating the control voltage of the varactors, which can be used for correcting unpredictable process, supply voltage, and temperature (PVT) variations and load mismatch. Measured results show that the small‐signal gain of the CMOS power amplifier is up to 6.5 dB at 52 GHz. The power amplifier achieves 5 dBm output P1dB and 7 dBm saturated output power with 4.5% maximun power added efficiency (PAE) at 1 V control voltage. By sweeping the control voltage of the varactors, the power amplifier can obtain the maximun power gain, which can be used to solve the load mismatch. © 2016 Institute of Electrical Engineers of Japan. Published by John Wiley & Sons, Inc.     

Design and simulation of novel amplifier‐based mixer for ISM band wireless applications

This letter describes a low‐voltage low‐power (LV‐LP) 2.4‐GHz mixer for Industrial, Scientific and Medical (ISM) band wireless applications. The approach is based on a two‐stage amplifier, and the Gilbert switch stage is inserted between the two amplifier stages. The proposed amplifier‐based mixer delivers a remarkable conversion gain of 13 dB with a local oscillator (LO) power of 7 dBm, while consuming only 1.05‐mW DC power from a 0.8‐V supply voltage. The input‐referred third‐order intercept point (IIP3) of the mixer is 3.82 dBm, and the chip area is only 0.429 mm². The results indicate that this mixer is suitable for the low‐voltage low‐power applications. Copyright © 2014 John Wiley & Sons, Ltd.     

An improved current-comparator-based 1000-A transconductanceamplifier for the in-situ calibration of transformer loss measuringsystems

A current comparator technique and an error feedforward control strategy are applied to the design of a high current transconductance amplifier to obtain a highly stable and accurate output current. The transconductance amplifier features a current output range of 1000 A with a compliance voltage of 3 V. It has the ability to provide a highly accurate current to a circuit that is operated at high voltage. This high-current transconductance amplifier is used in a system for the in-situ calibration of transformer loss measuring systems. The output current has accuracies of better than ±10 ppm (parts-per-million) in both magnitude and phase     

An ultra-low-power,low-noise tunable electrocardiogram amplifier

The objective of this research work is to propose an innovative low-power, low-noise, tunable three-stage capacitive instrumentation amplifier, capable of receiving and magnifying the electrocardiogram (ECG) signals. This is done by adding an extra stage to the second stage of the conventional capacitive instrumentation amplifier. The results show similar midband gain with lesser capacitor usage and smaller chip occupancy area with provision of concurrent tunable gain and bandwidth. The proposed amplifier is designed and implemented using TSMC 0.18-μm CMOS technology scale under a 1-V supply voltage with the simulation process carried out using Cadence Virtuoso tool. Post-layout simulation results show that the amplifier has a tunable midband gain of 55 to 65.6 dB, low-cutoff frequency tuned from 377 mHz to 4.5 Hz and high-cutoff frequency tuned from 86.8 to 263.6 Hz. The simulated value of the input-referred noise and noise efficiency factor (NEF) of the amplifier are 9.6 μV_rms and 6.1, respectively, with the total power consumption of 71.2 nW.