Ionic outgassing from photoacid generators upon irradiation at 13.5 nm

Photoresist outgassing is considered a possible source of contamination of optics in extreme ultraviolet (EUV) lithography at 13.5 nm. We measured the relative proportions of ionic outgassing from 18 commercially available photoacid generators (PAG), which is a key component of chemically amplified photoresists, upon irradiation at 13.5 nm. These PAG include 17 triarylsulfonium or diaryliodonium salts, which contain or as the anion, and one PAG of molecular type. The overall outgassed ions in the range 10-200 u were counted in relative proportions. Outgassing of F⁺ is found to be dominant, and for most PAG the extent of F⁺ outgassing shows a satisfactory correlation with the ratio of F atomic photoabsorption to the overall PAG photoabsorption. Outgassed ions F⁺, CF⁺, and from PAG containing the anion and additional such as , and from those containing are identified. Triphenylsulfonium perfluoro-1-butanesulfonate is one PAG to emit the most abundant F⁺ and total ionic fragments, and a PAG of molecular type (N-hydroxy-5-norbornene-2,3-dicarboximide perfluoro-1-butanesulfonate) also emits abundantly both hydrocarbon ions and F⁺. Ionic outgassing of PAG cations includes (C₆H₅)₂S⁺ from R(C₆H₅)₂S⁺ salts and I⁺ from diaryliodonium salts. For PAG containing t-C₄H₉, significantly less F⁺ outgassing is observed; additional outgassing pathways are proposed. The pressure rise caused by PAG shows no dependence on the anion identity, but is correlated with cation photoabsorption, and ascribed to neutral aryl outgassing. Other minor outgassing species include from sulfonates; and ‘photostable’ PAH cations are identified for the first time and provide evidence of concurrent outgassing from, and polymerization of, PAG upon irradiation at 13.5 nm.     

Low-voltage nanopower clock generator for RFID applications

The design of an on-chip RC-based oscillator, implemented in a standard BiCMOS process, without any external component, is presented. The proposed oscillator provides a clock signal at a frequency of 50 kHz with a temperature coefficient smaller than 0.3%/^°C over a temperature range from 0 to , without any external trimming. The proposed oscillator operates with a supply voltage of 0.8 V and has a power consumption of at room temperature. The chip area is .     

Properties of wurtzite GaN MESFETs studied by two-dimensional full band Monte Carlo approach

The properties of a GaN Metal-Semiconductor Field Effect Transistor were studied based on two-dimensional full band Monte Carlo simulations. The dependences of the distributions of the electric potential, electron concentration, electric field, drift velocity, and average electron energy on the gate-source voltage (V_GS) and drain-source voltage (V_DS) were obtained, then the characteristics of the drain current (I_DS) versus the drain-source voltage (V_DS) and the transconductance (G_m) versus V_GS characteristics were determined. At and I_DS is 5.03 A/cm, which is higher value. The G_m−V_GS curve shows bell shaped and the maximum G_m is 112 ms/mm at and The current gain cutoff frequency (f_T) is 98 GHz at and      

A 1-V RF-CMOS LNA design utilizing the technique of capacitive feedback matching network

In this paper, a CMOS low-noise amplifier (LNA) with a new input matching topology has been proposed, analyzed and measured. The input matching network is designed through the technique of capacitive feedback matching network. The proposed LNA which is implemented in a technology is operated at the frequency of 12.8 GHz. It has a gain S21 of 13.2 dB, a noise figure (NF) of 4.57 dB and an NF_min of 4.46 dB. The reverse isolation S12 of the LNA can achieve and the input and output return losses are better than . The input 1-dB compression point is and IIP3 is . This LNA drains 10 mA from the supply voltage of 1 V.     

Barrier characteristics of gold Schottky contacts on moderately doped n-InP based on temperature dependent I-V and C-V measurements

The temperature dependences of current-voltage (I-V) and capacitance-voltage (C-V) characteristics of the gold Schottky contacts on moderately doped n-InP (Au/MD n-InP) Schottky barrier diodes (SBDs) have been systematically investigated in the temperature range of 60-300 K. The main diode parameters, ideality factor (n) and zero-bias barrier height (apparent barrier height) were found to be strongly temperature dependent and while the decreases, the n and the increase with decreasing temperature. According to Thermionic Emission (TE) theory, the slope of the conventional Richardson plot [In(J₀/T²) vs. 1000/T] should give the barrier height. However, the experimental data obtained do not correlate well with a straight line below 160 K. This behaviour has been interpreted on the basis of standard TE theory and the assumption of a Gaussian distribution of the barrier heights due to barrier inhomogeneities that persist at the metal-semiconductor interface. The linearity of the apparent barrier height vs. 1/(2kT) plot that yields a mean barrier height of 0.526 eV and a standard deviation (σ_s0) of 0.06 eV, was interpreted as an evidence to apply the Gaussian distribution of the barrier height. Furthermore, modified Richardson plot [ vs. 1/T] has a good linearity over the investigated temperature range and gives the and the Richardson constant (A^∗) values as 0.532 eV and 15.90 AK⁻²cm⁻², respectively. The mean barrier heights obtained from both plots are appropriate with each other and the value of A^∗ obtained from the modified Richardson plot is close to the theoretical value of 9.4 AK⁻²cm⁻² for n-InP. From the C-V characteristics, measured at 1 MHz, the capacitance was determined to increase with increasing temperature. C-V measurements have resulted in higher barrier heights than those obtained from I-V measurements. The discrepancy between Schottky barrier heights(SBHs) obtained from I-V and C-V measurements was also interpreted. As a result, it can be concluded that the temperature dependent characteristic parameters for Au/MD n-InP SBDs can be successfully explained on the basis of TE mechanism with Gaussian distribution of the barrier heights.     

Numerical optimization of an extracted HgCdTe IR-photodiodes for 10.6-μm spectral region operating at room temperature

The electrical and photoelectrical properties of long wavelength Hg_1−xCd_xTe structures have been optimized by using an exact numerical analysis. In this analysis we have been taking into account the degeneracy, non-parabolicty, deviation from thermodynamical equilibrium and graded interfaces. The band diagram, electrical field, carrier mobility, photoelectrical gain, responsivity, noise and detectivity have been calculated and optimized as a function of different variable such as alloy composition, doping concentration, thickness, and applied voltage to obtain optimized performance at room temperature. This numerical simulation can be used to optimize the mentioned parameters for other structures such as , operating in photodiode, or photovoltaic mode.     

YBCO superconducting tapes by melt-annealing method on metallic Ni%5W substrates

Superconducting tapes of YBCO-123 were produced by melt-annealing method on metallic Ni%5W substrates. YBCO thick films of about thick were deposited on Ni%5W tapes previously CeO₂ coated using different thermal treatments. A final architecture of the tapes like Ni%5W/CeO₂/YBCO/Au-Pd was achieved.Critical temperatures (T_c) of the superconducting tapes around 89 K and critical current densities (J_c) of at 77 K and were determined by resistive methods. All the samples displayed a granular character and the crystalline structure of the superconducting YBCO-123 with and preferential orientation along the c-axis as determined by SEM and XRD analysis, respectively. Both grain sizes and c-axis orientation are dependent of the thermal treatments.     

Self-aligned In0.49Ga0.51P/GaAs HBT DC and RF characteristics related with orientations

A self-aligned InGaP/GaAs HBT DC and RF characteristics related with orientations were studied. The DC current gain was greater for the [0 1 1] emitter orientation compared to orientation. However, it also showed slightly better RF performance for orientation with a cutoff frequency f_T 69 GHz compared to the f_T of 62 GHz for the [0 1 1] orientation. This experimental work has been proposed that the dependence of the characteristics could be attributed to both piezoelectric effect and the difference between lateral etched profiles in different directions.     

Fixed-width multipliers for the implementation of efficient digital FIR filters

The use of fixed-width multiplier for the implementation of FIR filters is investigated in this paper.The paper presents a review of the existing fixed-width multiplier architectures and analytically calculates the error introduced by the use of fixed-width multipliers in the realization of FIR filters. FIR filters are implemented in TSMC technology using state-of-the-art fixed-width multipliers, varying the architecture and the width of the output.The analysis shows that fixed-width multipliers are a suitable replacement for the full-width multiplier. Furthermore the best trade-off between error, silicon area occupation and power is provided by the LMS fixed-width multiplier. As example a FIR filter with 16b fixed-width multiplier provides a reduction of 16% in area and 18% in power dissipation with a 22% increase of the working frequency, while keeping the mean square error below  LSB².     

Ultrahigh-quality single crystals of silicon carbide by alternate repetition of growth perpendicular to c-axis

The dislocation structure of grown crystals perpendicular to c-axis was investigated by means of X-ray analysis. It was revealed that the dislocations were almost straight parallel to the growth direction in the crystals. The alternate repetition of growth in the direction to and made the dislocations and lattice distortion successfully reduced. The mechanism for the reduction was attributed to less exposure of the dislocations to a seed surface, because the straight dislocations in the seed crystal exist parallel to the seed surface. A crystal grown on {0 0 0 1} seed substrate sliced out from the crystal by the alternate repetition of growth had drastically lower defect density than conventional crystals.     

A novel ADPLL design using successive approximation frequency control

This paper presents a hardware implementation of a fully synthesizable, technology-independent clock generator. The design is based on an ADPLL architecture described in VHDL and characterized by a digital controlled oscillator with high frequency resolution and low jitter. Frequency control is done by using a robust regulation algorithm to allow a defined lock-in time of at most eight reference cycles. ASICs in CMOS AMS and UMC have been manufactured and tested. Measurements show competitive results to state-of-the-art mixed-signal implementations.     

A CMOS image sensor with light-controlled oscillating pixels for an investigative optobionic retinal prosthesis system

This paper presents a high-dynamic range CMOS image sensor architecture incorporating light-controlled oscillating pixels which can act as front-end for an investigative optobionic retinal prosthesis research effort. Each pixel acts as an independent oscillator, whose frequency is proportional to the local light intensity. A 9×9 pixel array has been fabricated in the AMS CMOS opto process. Each pixel's area amounts to , each pixel photodiode area is while the array occupies . Measured results show that the sensor can achieve a linear optical dynamic range of 80 dB (from 0.24 Hz to 2.2 kHz). Its linear electrical dynamic range exceeds 134 dB (from 100 mHz to 502 kHz). The nominal power dissipation is about 50 nW per pixel.