Thermal stress effects of Ge2Sb2Te5 phase change material: Irreversible modification with Ti adhesion layers and segregation of Te

This paper reviews material properties of chalcogenide phase change material Ge₂Sb₂Te₅ under thermal anneal treatments. Stress evolutions of pure Ge₂Sb₂Te₅ films and stacks of Ge₂Sb₂Te₅ integrating with Ti adhesion layers are investigated. Segregation of Te atoms in the Ge₂Sb₂Te₅ film to the interface drives an interaction between Ti and Te atoms and formation of Ti-Te binary phases. The irreversible phase segregation and modification of Ge₂Sb₂Te₅ change the crystallization process, completely suppress the final transformation into otherwise stable hcp phase, and thus impact the ultimate life-cycle of such a phase change based memory cell. Since the adhesion layer is required in cell applications, the optimization of adhesion layer material and thickness may improve the life-cycles and reliability of devices.     

Characterization of Ge2Sb2Te5 thin film transistor and its application in non-volatile memory

With the increasing requirement of high density memory technology, a new cell structure—1TR has received much attention. It consists of a single thin film transistor (TFT) with chalcogenide Ge₂Sb₂Te₅ as the channel material. In order to evaluate the feasibility of its application in the field of non-volatile memory, we take a further step in researching on the characteristics of GST-TFT. We fabricated a back-gate GST-TFT and investigated the output and transfer characteristics of its two states. The experimental results show that gate voltage can modulate the GST channel currents in both the amorphous and the crystalline states. Based on the experiments, we can expect that this novel device can ultimately lead to a new nonvolatile memory technology with even higher storage density.     

Patterning of Ge2Sb2Te5 phase change material using UV nano-imprint lithography

DRAM is the most commonly used memory due to many advantages such as high speed and easy manufacturability owing to its simple structure, but is volatile. On the other hand, flash memory is non-volatile, but has other disadvantages such as slow speed, short lifetime, and low endurance for repetitive data writing. Compared to DRAM and flash memory, PRAM (Phase-change Random Access Memory), which is a non-volatile memory using a reversible phase change between amorphous and crystalline state, has many advantages such as high speed, high sensing margin, low operating voltage, and is being pursed as a next generation memory. Being able to pattern and etch phase change memory in nanometer scale is essential for the integration of PRAM. This study uses the Nano-Imprint Lithography (NIL) for patterning the PRAM in nanometer scale which is believed to be a future lithography technology that will replace the conventional Photo Lithography. Si wafers coated with SiO₂ were used as substrates, and Ge₂Sb₂Te₅ (GST) films with the thicknesses of 100 nm were deposited by RF sputtering. Poly-benzylmethacrylate based polymer patterns were formed using NIL on the surface of GST films, and the GST films were etched using Cl₂/Ar plasma in an Oxford ICP (inductively coupled plasma) etcher.     

Memory Switching Characteristics in Amorphous Ga<Subscript>2</Subscript>Se<Subscript>3</Subscript> Films

Ga₂Se₃ films were deposited by the thermal evaporation of the bulk material onto pyrographite substrates under vacuum. The I–V characteristic curves were found to be typical for a memory switch. They exhibited a transition from an ohmic region in the lower-field region to a non-ohmic region in the high-field region in the preswitching region, which has been explained by the Poole–Frenkel effect. The temperature dependence of the resistance in the ohmic region was found to be that of a thermally activated process. It was also found that the mean value of the switching voltage increased linearly with increasing film thickness in the range from 291 nm to 516 nm, while it decreased exponentially with increasing temperature in the range from 298 K to 393 K. The results were explained in accordance with the electrothermal model for the switching process.     

Bipolar resistive switching of chromium oxide for resistive random access memory

This study investigates the resistance switching characteristics of Cr₂O₃-based resistance random access memory (RRAM) with Pt/Cr₂O₃/TiN and Pt/Cr₂O₃/Pt structures. Only devices with Pt/Cr₂O₃/TiN structure exhibit bipolar switching behavior after the forming process because TiN was able to work as an effective oxygen reservoir but Pt was not. Oxygen migration between Cr₂O₃ and TiN was observed clearly before and after resistance switching from Auger electron spectroscopy (AES) analysis. Both low resistance state, ON state, and high resistance state, OFF state, of Pt/Cr₂O₃/TiN structures are stable and reproducible during a successive resistive switching. The resistance ratio of ON and OFF state is over 10², on top of that, the retention properties of both states are very stable after 10⁴ s with a voltage of −0.2 V.     

Voltage-tunable dual-band infrared photodetectors with Si/SiGe metal-semiconductor-metal heterostructure

A simple and low-cost structure of voltage-tunable dual-band near-infrared photodetector (PD) has been proposed, in which the PDs were developed by using Si_0.8Ge_0.2/Si metal-semiconductor-metal (MSM) heterostructure. The Si_0.8Ge_0.2/Si layers were deposited by ultrahigh-vacuum chemical vapor deposition system and a transparent layer of indium-tin oxide (ITO) was used as a metal layer to enhance the entrance of photons. In this study, we found that only one band was detected with a peak wavelength located at 950 nm at zero applied bias. When bias was increased to 1 V, in contrast a dual-band was achieved, where two peak wavelengths were centered at 950- and 1150-nm. It is suggested that the two bands are the absorption of top-Si and bottom-Si_0.8Ge_0.2 layers, respectively. The spectra of Si bulk and Si_0.8Ge_0.2 layer were also measured to verify our results and relating mechanisms are explained here.     

Comparison between Pt/TiO2/Pt and Pt/TaOX/TaOY/Pt based bipolar resistive switching devices

Nonvolatile memories have emerged in recent years and have become a leading candidate towards replacing dynamic and static random-access memory devices. In this article, the performances of TiO₂ and TaO₂ nonvolatile memristive devices were compared and the factors that make TaO₂ memristive devices better than TiO₂ memristive devices were studied. TaO₂ memristive devices have shown better endurance performances (10⁸ times more switching cycles) and faster switching speed (5 times) than TiO₂ memristive devices. Electroforming of TaO₂ memristive devices requires~4.5 times less energy than TiO₂ memristive devices of a similar size. The retention period of TaO₂ memristive devices is expected to exceed 10 years with sufficient experimental evidence. In addition to comparing device performances, this article also explains the differences in physical device structure, switching mechanism, and resistance switching performances of TiO₂ and TaO₂ memristive devices. This article summarizes the reasons that give TaO₂ memristive devices the advantage over TiO₂ memristive devices, in terms of electroformation, switching speed, and endurance.     

Low temperature epitaxial growth of Si0.5Ge0.5 alloy layer on Si (100) by ion beam assisted deposition

The first results were reported on low temperature epitaxial growth of Si_0.5Ge_0.5 alloy layer on Si (100) by ion beam assisted deposition. Nucleation and the growth of Si_0.5Ge_0.5 alloy layer had been investigated by atomic force microscopy and reflection high energy electron diffraction analysis. The Si_0.5Ge_0.5 alloy layer nucleated on Si (100) via Stranski-Krastanov (SK) mode. The Ar ion bombard-ment improved crystallinity and prolonged layer-by-layer stage of the SK mode. The epitaxial temperature was 200°C lower than 550-600°C in molecular beam epitaxy. In order to explain the mechanism of low temperature epitaxial growth E_Ar (energy transferred to growing film by bombarding Ar ion, eV/atom) value was experimentally calculated. In conclusion, the ion bombardment induced dissociation of three-dimensional islands and enhanced the surface diffusion. The variation of tetragonal strain and its effect on electron mobility were taken into consideration. Electron mobility increased with tetragonal strain as a result of band split.     

Double Charge Polarity Switching in Sb-Doped SnSe with Switchable Substitution Sites

Tin mono-selenide (SnSe) is one of the most promising thermoelectric materials; however, it experiences difficulty in controlling the carrier polarity, which is inevitable for realizing p-n homojunction devices. Herein, double switching of charge polarity in (Sn_1−xSb_x)Se by varying x is reported; pure SnSe shows p-type conduction, whereas the polarity of (Sn_1−xSb_x)Se switches to n-type conduction for 0.005 < x < 0.05, and then re-switches to p-type conduction for x > 0.05. The major Sb substitution site switches from the Se (Sb_Se) to Sn site (Sb_Sn) with increasing x. Sb_Sn (Sb³⁺ at Sn²⁺) works as a donor, but Sb_Se (Sb³⁻ at Se²⁻) does not produce a hole because of the Sb–Sb dimer formation. The mechanism of double polarity switching is explained by native p-type conduction in pure SnSe due to Sn-vacancy formation, whereas (Sn_1−xSb_x)Se exhibits n-type behavior due to conduction through the Sb_Se impurity band formed above the valence band maximum, and finally re-switches to weak p-type, where the Fermi level approaches the midgap level between the Sb_Se band and conduction band minimum. Clarification of the Sb doping mechanism will provide a crucial guide for developing more sophisticated doping routes for SnSe and high-performance energy-related devices.     

Interfacial reactions and electrical properties of Hf/p-Si0.85Ge0.15

Interfacial reactions and electrical properties of Hf/p-Si_0.85Ge_0.15 as a function of the annealing temperature were studied. Hf₃(Si_1−xGe)₂ and Hf(Si_1−xGe)₂ were initially formed at 500°C and 600°C, respectively. At temperatures above 400°C, Ge segregation out of the reacted layers associated with strain relaxation of the unreacted Si_0.85Ge_0.15 films appeared. At 780°C, agglomeration occurred in the Hf(Si_1−xGe_x)₂ films. All the as-deposited and annealed Hf/p-Si_0.85Ge_0.15 samples showed the formation of an ohmic contact. The lowest specific contact resistance around 10⁻⁵ ω cm² could be obtained for the Hf₃ (Si_1−xGe_x)₂ contacts to p-Si_0.85Ge_0.15 formed at 500°C. Below 500°C, the decrease of specific contact resistance with the annealing temperature is mainly caused by the formation of Hf₃(Si_1−xGe_x)₂ and an interfacial Ge-rich layer between the Hf₃(Si_1−xGe_x)₂ and unreacted Si_0.85Ge_0.15 films, while above 600°C, the increase of specific contact resistance may be due to the formation of Hf(Si_1−xGe_x)₂ and SiC as well as the roughness of the Hf(Si_1−xGe_x)₂ films.     

Fabrication and electrical characterization of phase-change memory devices with nanoscale self-heating-channel structures

We proposed a material composition and an optimized patterning process for the phase-change memory devices with a nanoscale self-heating channel (NSC) structures. As a suitable composition, Ge₁₈Sb₃₉Te₄₃ was employed, which is the 22% Sb-excessive phase compared with the conventional Ge₂Sb₂Te₅. For fabricating the NSC memory devices, Ge₁₈Sb₃₉Te₄₃ layer was patterned into a thin channel having enlarged pad areas at both sides end by the developed two-step dry etching technique using a TiN hard mask. The NSC memory devices showed such good behaviors as lower power operations without any degradation of switching speed and better endurance for cyclic rewritings even in the scaling regime of tens-of-nanometer size. It can be concluded from the obtained results that the proposed NSC memory devices promise the feasibility for realizing both aggressive scaling with a simpler process and enhanced memory performances for the phase-change nonvolatile memory applications.     

Formation of a thin III-VI compound interfacial layer at ZnTe/znse heterojunction and its effect on energy band discontinuity

Interfacial layers were inserted at the interface of ZnSe and ZnTe in order to reduce both (1) the effect of strain and (2) the valence band discontinuity. The interfacial layer adapted in this study is the III-VI compound (Ga,Se). The layered structure GaSe is favorable for the present work, because it can be a buffer layer to relax the lattice mismatch at the interface. All layers including ZnTe, (Ga,Se) and ZnSe were grown on (100) GaAs substrate by conventional molecular beam epitaxy. The crystal structure of the (Ga,Se) on ZnSe was investigated. The growth of the layered structure GaSe layer on (100) ZnSe was very difficult, though the defect zinc-blende structure Ga₂Se₃ layer could be easily grown. The defect zinc-blende structure Ga₂Se₃ was inserted at the interface of ZnSe and ZnTe so that the valence band discontinuity could be modified. The discontinuity was decreased to about 0.1 eV when the thickness of the interfacial layer was about 8Å. The current-voltage characteristics were measured for the sample with Ga₂Se₃ interfacial layer. The structure with Ga₂Se₃ exhibited the ohmic property. These results suggest that the valence band discontinuity between ZnTe and ZnSe can be reduced by introducing the Ga₂Se₃ interfacial layer.     

Formation of secondary phases during crystal growth of Pb5Ge3O11

Studies of secondary phases formed during the Czochralski growth of lead germanate crystals (Pb₅Ge₃O₁₁) show that these phases form inclusions in the crystal, thereby reducing its optical quality, and can also cause twinning and cracking. Results of differential thermal analysis, energy dispersive X-ray fluorescence analysis, and X-ray diffraction studies of secondary phases are presented. The narrow stability range for Pb₅Ge₃O₁₁ shown in the phase diagram, the thermal instability of this compound, and its pronounced supercooling during crystallization suggest that equilibrium conditions are difficult to sustain and that other compounds of the PbO-GeO₂ family may form, although Pb₅Ge3O₁₁ is melting congruently. It is shown that Pb₃GeO₅ and PbGeO₃, which are both reported to melt congruently, can crystallize during the growth of Pb₅Ge₃O₁₁ forming inclusions in the crystal. The successful synthesis of these three compounds is reported. The compound Pb₃Ge₂O₇, reported in the literature, is identified as a mixture of Pb₅Ge₃O₁₁ and PbGeO₃. Experimental conditions are presented for growing single phase Pb₅Ge₃O₁₁ crystals of uniform composition and high optical quality. This paper is based on a presentation at the Conference on Preparation and Properies of Electronic Materials, Princeton, N. J., August 1975.     

Determination of boron concentration in heavily doped p-type Si1−xGex/Si heterostructure by infrared ellipsometric spectroscopy

Si_1−xGe_x/Si heterostructures play a primary role in the Si-based fast electronics developments of today. In this work, we will present the experimental results of infrared spectroscopic ellipsometry (IRSE) for structural determination of the boron heavily doped SiGe/Si sample grown by ultra-high vacuum chemical vapor deposition (UHVCVD) (the Ge atomic percent, the thickness of SiGe film and boron concentration). Especially, the principle of boron concentration in p-type SiGe film layer determined by IRSE was elucidated in detail. In addition, in order to corroborate the validity of IRSE for determining dopant concentration, secondary ion mass spectroscopy (SIMS) experiment has also been carried out. The close experimental agreement between IRSE and SIMS demonstrate that IRSE as a contactless, and non-destructive technology can be used in-line tools in production used for measuring the Ge content, the thickness of SiGe layer and boron concentration in p-type dopant SiGe/Si heterostructure, which often used the base layer of SiGe hetero-junction bipolar transistor (HBT) devices.     

Influence of La substitution on the electrical properties of metal-ferroelectric (BiFeO3)-insulator (CeO2)-semiconductor nonvolatile memory structures

Metal-multiferroic (La-substituted BiFeO₃)-insulator (CeO₂)-semiconductor (MFIS) capacitors has been fabricated. The crystalline phase and amount of La³⁺ substitution at Bi-site were investigated by XRD and XPS in the postannealing temperature range from 500 to 700 °C, respectively. The microstructure and interfacial layer between CeO₂ and Si substrate were characterized by HRTEM. The memory windows as functions of insulator film thickness and DC power for La were measured. The maximum memory window is about 1.9 V under ±6 V applied voltage. The ferroelectric polarization increases with increasing substitution amount. The morphologies of La-substituted BiFeO₃ films were also studied by AFM.     

High mobility compressive strained Si0.5Ge0.5 quantum well p-MOSFETs with higher-k/metal-gate

Strained SiGe quantum well p-MOSFETs with LaLuO₃ higher-k dielectric were fabricated and characterized. The strained Si/strained Si_0.5Ge_0.5/strained SOI heterostructure transistors showed good output and transfer characteristics with an I_on/I_off ratio of 10⁵. The extracted hole mobility shows an enhancement of about 2.5 times over Si universal hole mobility and no degradation compared to HfO₂ or even SiO₂ gate dielectric devices.     

Epitaxial Ge layers on Si via GexSi1-xO2 reduction: The roles of the hydrogen partial pressure and the Ge content

The epitaxial growth of an epi-Ge layer via Ge_xSi_1-xO₂ reduction in hydrogen annealing is reported. Ge_xSi+_1-x alloys with x = 0.52 and 0.82 were first grown epitaxially on Si substrates. They were then oxidized in a wet ambient and subsequently annealed in 5% or 100% H₂. The reduction of Ge from its oxide state is observed in both samples with both ambients. However, an epitaxial Ge growth is only observed in the sample with x = 0.82 after the 5% H₂ annealing. The other three cases result in the formation of polycrystalline Ge. The roles of the hydrogen partial pressure and the Ge content are discussed and conditions under which this novel mode of solid-phase epitaxy can occur are explained.     

The influence of defects on device performance of MBE-grown Si homojunction and strained Si1-xGex/Si heterostructures

Different Si homojunction and strained Si_1-xGe_x/Si heterojunction diodes and bipolar transistors have been fabricated by Si-MBE. The effect of annealing on Si homojunction diodes and transistors are studied. It is found that annealing generally improves the Si device performance, such as the ideality factor and breakdown characteristics. The influence of⁶⁰Co γ irradiation on the Si_1-xGe_x/Si diode performances are investigated by studying the temperature dependence of their electrical characteristics, and the results are correlated with the quality of the MBE-films. γ irradiation causes a drop in material conductivity due to the generation of atom-displacement defects in the whole volume of the wafers and increases the defect density at hetero-interfaces. The forward I-V curves of Si_1-xGe_x/Si devices may shift towards lower or higher voltages, depending on the film quality and the irradiation dose. The increase of defect density in strained Si_1-xGe_x/Si films appears to occur easier for the films with lower quality. Electrical measurements and calculations show that the defect-associated tunneling process is important in current transport for these MBE grown Si homojunction and strained Si_1-xGe_x/Si heterojunction devices, which have initially medium film quality or have been treated by irradiation.     

High-resolution transmission electron microscopy of silicide formation and morphology development of Ni/Si and Ni/Si<Subscript>1−x</Subscript>Ge<Subscript>x</Subscript>

Nickel-silicide phase formation in the Ni/Si and Ni/Si_1−xGe_x (x=0.20) systems and its correlation with variations in sheet resistance have been studied using high-resolution transmission electron microscopy (HRTEM) and related techniques. Following a 500°C anneal, uniform and low-resistivity NiSi and NiSi_1−xGe_x (x<0.20) crystalline films were formed in the respective systems. Annealed at 900°C, NiSi₂, in the form of pyramidal or trapezoidal islands, is found to replace the NiSi in the Ni/Si system. After a 700°C anneal, threading dislocations were observed for the first time in the Ni/Si_1−xGe_x system to serve as heterogeneous nucleation sites for rapid lateral NiSi_1−xGe_x growth.     

Ultrathin HfO2 gate dielectrics on partially strain compensated SiGeC/Si heterostructure

Ultrathin HfO₂ gate dielectrics have been deposited on strain-compensated Si_0.69Ge_0.3C_0.01 layers by rf magnetron sputtering. X-ray diffraction spectra show the films to be polycrystalline having both monoclinic and tetragonal phases. The formation of an interfacial layer has been observed by high-resolution transmission electron microscopy. Secondary ion mass spectroscopy and Auger electron spectroscopy analyses show the formation of an amorphous Hf-silicate interfacial layer between the deposited oxide and SiGeC films. The average concentration of Ge at the interfacial layer is found to be 2–3 at%. The leakage current density of HfO₂ gate dielectrics is found to be several orders of magnitude lower than that reported for thermal SiO₂ with the same equivalent thickness.