Novel design strategy of multiplier-less low-pass finite impulse response filter using self-organizing random immigrants genetic algorithm

Intelligent optimization techniques are playing a very vital role in solving a wide variety of problems of engineering and technology of late. In order to meet the challenges from various perspectives, researchers are always in favor of applying those approaches to get rid of numerous practical difficulties of concern. Digital signal processing, more specifically the design of digital filters in particular, has been immensely motivated and beneficiated by means of this amalgamation. In this communication, we have incorporated a recently proposed genetic optimization method, named as self-organizing random immigrants genetic algorithm, in multiplier-free finite impulse response filter (FIR) design algorithm. Our study has focused on the selection of optimum settlement of filter coefficients through the utilization of this population-based technique which results in power of two distribution of impulse response over a binary search space. The performance of our designed filter has been thoroughly analyzed by a number of design parameters of interest and compared with other state-of-the-art multiplier-less FIR models. It has been observed that the proposed approach outperforms the other designs by a considerably large margin in those areas of signal processing where the reduction in hardware cost is the biggest challenge.     

A general weighted median filter structure admitting negativeweights

Weighted median smoothers, which were introduced by Edgemore in the context of least absolute regression over 100 years ago, have received considerable attention in signal processing during the past two decades. Although weighted median smoothers offer advantages over traditional linear finite impulse response (FIR) filters, it is shown in this paper that they lack the flexibility to adequately address a number of signal processing problems. In fact, weighted median smoothers are analogous to normalized FIR linear filters constrained to have only positive weights. It is also shown that much like the mean is generalized to the rich class of linear FIR filters, the median can be generalized to a richer class of filters admitting positive and negative weights. The generalization follows naturally and is surprisingly simple. In order to analyze and design this class of filters, a new threshold decomposition theory admitting real-valued input signals is developed. The new threshold decomposition framework is then used to develop fast adaptive algorithms to optimally design the real-valued filter coefficients. The new weighted median filter formulation leads to significantly more powerful estimators capable of effectively addressing a number of fundamental problems in signal processing that could not adequately be addressed by prior weighted median smoother structures     

Pipelined array-based FIR filter folding

The elaborate design of folded finite-impulse response (FIR) filters based on pipelined multiplier arrays is presented in this paper. The design is considered at the bit-level and the internal delays of the pipelined multiplier array are fully exploited in order to reduce hardware complexity. Both direct and transposed FIR filter forms are considered. The carry-save and the carry-propagate multiplier arrays are studied for the filter implementations. Partially folded architectures are also proposed which are implemented by cascading a number of folded FIR filters. The proposed schemes are compared as to the aspect of hardware complexity with a straightforward implementation of a folded FIR filter based on the pipelined Wallace Tree multiplier. The comparison reveals that the proposed schemes require 20%-30% less hardware. Finally, efficient implementation of partially folded FIR filter circuits is presented when constraints in area, power consumption and clock frequency are given.     

Design of two-dimensional directional filters

A directional filter has a passband extending fully along a straight line passing through the origin. In its original form the transformation technique, a powerful tool for designing two-dimensional FIR filters, is not useful to design such a filter. In this communication we suggest a few analytical and optimisation-based methods to design directional filters using the transformation technique. The superiority of the proposed methods over existing techniques is demonstrated.     

Low-Area/Power Parallel FIR Digital Filter Implementations

This paper presents a novel approach for implementing area-efficient parallel (block) finite impulse response (FIR) filters that require less hardware than traditional block FIR filter implementations. Parallel processing is a powerful technique because it can be used to increase the throughput of a FIR filter or reduce the power consumption of a FIR filter. However, a traditional block filter implementation causes a linear increase in the hardware cost (area) by a factor of L, the block size. In many design situations, this large hardware penalty cannot be tolerated. Therefore, it is important to design parallel FIR filter structures that require less area than traditional block FIR filtering structures. In this paper, we propose a method to design parallel FIR filter structures that require a less-than-linear increase in the hardware cost. A novel adjacent coefficient sharing based sub-structure sharing technique is introduced and used to reduce the hardware cost of parallel FIR filters. A novel coefficient quantization technique, referred to as a scalable maximum absolute difference (MAD) quantization process, is introduced and used to produce quantized filters with good spectrum characteristics. By using a combination of fast FIR filtering algorithms, a novel coefficient quantization process and area reduction techniques, we show that parallel FIR filters can be implemented with up to a 45% reduction in hardware compared to traditional parallel FIR filters.     

Two-Dimensional FIR ADM Digital Filters

In this paper the realization and performance of a twodimensional finite impulse response (FIR) digital filter using adaptive delta modulation (ADM) have been studied. The analytical results have been verified by computer simulation. Also, it has been shown that onedimensional DM is adequate in the realization of a two-dimensional FIR ADM digital filter. Since the ADM digital filter requires no multiplication, it offers many advantages over conventional PCM filters in cost reduction, hardware simplicity, and reduced size.     

Double span floating point representation scheme for the powers-of-two filter

The area of signal processing has been experiencing silent revolution over the last few years. A number of promising algorithms are being developed in this regard. In connection to this, minimization of hardware complexity of digital filter has grown sufficient interest amongst the research community. Hardware cost of digital filter may be reduced by encoding the filter coefficient in the form of sum of signed powers-of-two (SPT). This article introduces a new encoding strategy of the non-uniform powers-of-two coefficients for the sake of exploiting minimum hardware units. Proposed scheme targets to minimize the highest powers-of-two terms in any coefficient by judiciously dividing the ‘span’ part into two segments. As a matter of fact, it necessitates the use of minimum number of full-adder blocks during implementation as compared to other existing coefficient representation schemes. Supremacy of the proposed double span floating point (DSFP) representation technique has been mathematically substantiated and supported with the help of few design examples.     

A novel approach for coefficient quantization of low-pass finite impulse response filter using differential evolution algorithm

Evolutionary computational techniques have been employed judiciously in various signal processing applications of late. In this paper, such an attempt has been made to design a low-pass linear-phase multiplier-less finite duration impulse response (FIR) filter using differential evolution (DE) algorithm. This particular evolutionary optimization technique has been explored to search the impulse response coefficients of the FIR filter in the form of sum of power of two (SPT) in order to avoid the multipliers during design process. The performance of the designed low-pass filter has been studied thoroughly in terms of its frequency characteristics and primitive requirement of fundamental hardware blocks. The superiority of our design has been ascertained over a number of existing techniques by various means. Finally, the proposed filter of different lengths has been implemented on a field programmable gate array (FPGA) chip for evaluating the competency of this work. The percentage improvement in hardware complexity produced by our design has also been computed and clearly listed in this paper for convenience.     

一种基于迭代短卷积算法的低复杂度并行FIR滤波器结构

该文基于快速卷积算法,提出一种适用于线性相位FIR滤波器的并行结构。该结构采用快速卷积算法减少子滤波器个数,同时让尽可能多的子滤波器具有对称系数,然后利用系数对称的特性减少子滤波器模块中的乘法器数量。对于具有对称系数的FIR滤波器,提出的并行结构能够比已有的并行FIR结构节省大量的硬件资源,尤其当滤波器的抽头数较大时效果更明显。具体地,对一个4并行144抽头的FIR滤波器,提出的结构比改进的快速FIR算法(Fast FIR Algorithm, FFA)结构节省36个乘法器(14.3%),23个加法器(6.6%)和35个延时单元(11.0%)。     

Optimization of Linear Phase FIR Filters in Dynamically Expanding Subexpression Space

The most advanced techniques in the design of multiplierless finite impulse response (FIR) filters explore common subexpression sharing when the filter coefficients are optimized. Existing techniques, however, either suffer from a heavy computational overhead, or have no guarantees on the minimal hardware cost in terms of the number of adders. A recent technique capable of designing long filters optimizes filter coefficients in pre-specified subexpression spaces. The pre-specified subexpression spaces determine if a filter with fewer adders may be achieved. Unfortunately, there is no known technique that can find subexpression spaces that can guarantee the solution with the minimum number of adders in the implementation. In this paper, a tree search algorithm is proposed to update and expand the subexpression spaces dynamically, and thus, to achieve the maximum subexpression sharing during the optimization. Numerical examples show that the proposed algorithm generates filters using fewer adders than other non-optimum algorithms. On the other hand, as a consequence of its efficiency, our proposed technique is able to design longer filters than the global optimum algorithm.     

高速率低功耗FIR数字滤波器实现

利用硬件描述语言在ASIC上对FIR数字滤波器进行了设计和综合。利用子项空间技术有效地减少了多常系数乘法中加法器的个数,并通过限制加法器深度来进一步降低高速率约束条件下的实现难度。综合结果表明,该方法可以有效降低硬件的实现面积,适用于高吞吐率低功耗的数字系统设计。     

FPGA realization of FIR filters for high-speed and medium-speed by using modified distributed arithmetic architectures

This paper presents the design optimization of fully pipelined architectures for area-time-power-efficient implementation of finite impulse response (FIR) filter. The architectures are designed to obtain a suitable area-time tradeoff. Analysis of the performance of different filter orders and different address lengths of partial tables indicate the choice of four input partial tables presents the best of area-time-power-efficient realizations of FIR filter compared with the existing LUT-less DA-based implementations of FIR filters in both high-speed and medium-speed. Moreover, a number of further experiments not only shows the pipeline register’s significant influence to the maximum frequency of the FIR filters but also indicates it also has area usage. Final experiment shows that with the help of using pipeline register, the choice of 4-bits-per-clock (4BPC) of the architecture for word-length N=8 with four input partial table yields the best cost-effective when comparing with other different cases in both high-speed and medium-speed implementations.     

Design of transmit FIR filters for FDM data transmission systems

The design of transmit finite-impulse response (FIR) filters with few coefficients in frequency division multiplexing data transmission systems is considered. In these systems, quality objectives are imposed for transmission over channels affected by additive white Gaussian noise (AWGN) and over channels affected by AWGN plus adjacent channel interference (ACI). The goal of this letter is: given that an adaptive receive filter, possibly cooperating with an adaptive decision feedback equalizer, is used for the AWGN channel and for the AWGN plus ACI channel, what is the best fixed FIR transmit filter to use for both channel cases? This goal is achieved by optimizing the compromise between the performance of the system on the two mentioned channels. Also, the advantages of the proposed design over a rival method based on a fixed receive filter are demonstrated.     

New algorithm for fir filter design with discrete coefficients

This paper develops a new algorithm based on the Projected Gradient Algorithm (PGA) for the design of FIR digital filters with “sum of power of two” coefficients. It is shown that the integer programming involved in the FIR filter design can be solved by this algorithm.It is compared with the reported method for a SemiDefinite Programming (SDP) relaxationbased design. The simulations demonstrate that the new algorithm often yields the similar error performances of the FIR filter design, but the average CPU time of this approach is significantly reduced.     

A Survey of FIR Filter Design Techniques: Low-complexity,Narrow Transition-band and Variable Bandwidth

In the present century, digital signal processing (DSP) approaches are considered to be one of the most powerful technologies which may shape the science and technology in coming decades. From 1970 onwards, a drastic revolution took place in a wider domain of DSP which has made it popular in several studies such as radar and sonar signal processing, digital televisions, wireless communication scenarios and other multimedia setup etc. Digital filters form the backbone of this DSP architecture and in point of fact the field of digital filter design has drawn justified recognition from the researchers throughout the world for the last 50 years. In connection to this, thousands of research articles may be found from the literature which had extensively addressed on the design of such filters. In order to meet the requirement of narrow transition-band, finite impulse response (FIR) filters are commonly assumed to be of higher order and accordingly it significantly enhances computational complexity. In regard to this, construction of hardware efficient digital filters had drawn significant consideration which aims to include minimum hardware elements during its application and consequently consumes less power. This review paper illustrates various techniques for the implementation of hardware efficient narrow transition-band FIR filter and investigates a number of favourable attributes which are capable in sustaining the stringent requirements of communication standards. A good number of relevant articles are taken from the literature so as to make a robust and complete review.     

Generating 2-D FIR filter functions by Christoffel–Darboux formula for Chebyshev polynomials of the second kind

Global Christoffel–Darboux formula for different polynomials has already been used for the filter design. Here, this formula for orthonormal Chebyshev polynomials of the second kind and for two independent variables is applied in generating novel class linear-phase two-dimensional (2-D) finite impulse response (FIR) digital filter functions. In this way, 2-D filters with some specific features including economy, phase linearity, symmetry and selectivity are designed. Representative examples of the 2-D FIR digital filters of a new class obtained by the proposed approximation technique are given. A filter generated by the proposed approach is compared with the corresponding one generated by the procedure from literature.     

Design of linear phase FIR filters using fractional derivative constraints

In this paper, the designs of linear phase FIR filters using fractional derivative constraints are investigated. First, the definition of fractional derivative is reviewed briefly. Then, the linear phase FIR filters are designed by minimizing integral squares error under the constraint that the ideal response and actual response have several same fractional derivatives at the prescribed frequency point. Next, the fractional maximally flat FIR filters are designed by letting the number of fractional derivative constraints be equal to the number of filter coefficients. Finally, numerical examples are demonstrated to show that the proposed method has larger design flexibility than the conventional integer derivative constrained methods.     

FIR filter design over discrete coefficients and least square error

The difference routing digital filter (DRDF) consists of an FIR filter followed by a first-order integrator. This structure with power-of-two coefficients has been studied as a means of achieving low complexity, high sampling rate filters which can be implemented efficiently in hardware. The optimisation of the coefficients has previously been based on a time-domain least-squares error criterion. A new design method is proposed that includes a frequency-domain least-squares criterion with arbitrary frequency weighting and an improved method for handling quantisation of the filter coefficients. Simulation studies show that the new approach yields an improvement of up to 7 dB over existing methods and that oversampling can be used to improve performance     

A technique for multiple criterion approximation of FIR filters inmagnitude and group delay

In spite of the attention received by nonlinear phase (NLP) FIR filter design, the “best” way to solve this problem is still open to debate. The formulation of nonlinear phase FIR filter design in terms of simultaneous magnitude and group-delay approximation addresses the two parameters of ultimate interest for applications. The simultaneous minimization of these two functions (one of which, the group delay, rational) is approached on the basis of an original extension of the differential correction algorithm. The proposed design tool enjoys interesting theoretical properties and works very effectively. The filters obtained according to the multiple criterion optimization (MCO). Formulation are compared against filters that are optimal in the complex Chebychev norm. Then, the flexibility characteristic of MCO formulations of trading off between magnitude and group-delay performance is exemplified     

FPGA在数字滤波器设计中的应用

介绍了FIR数字滤波器的硬件实现技术,结合Altera公司的FLEX10K系列芯片提出了实现FIR数字滤波器的硬件电路的方案,设计出一种8阶FIR数字滤波器,并且推广到16阶及32阶,以及实现滤波器的AHDL语言。基于FPGA的电路系统设计及其仿真结果表明此系统合理、可靠且满足设计要求。