一种新型扫描隧道显微镜针尖腐蚀仪的设计

针对扫描隧道显微镜的针尖腐蚀系统,提出了一种新的电路,改变了反应电流的测量机制,克服了以往腐蚀过程中电压变化的缺点,提高了针尖制作的成功率。在此基础上对比了新旧两种电路的效果,并测量了腐蚀电压,截止电流以及钨丝浸入长度对针尖质量的影响,发现反应参数的改变对针尖特征的影响是多方面的,必须均衡考虑才能提高成功率,最后,作者在合适的参数条件下观察了整个腐蚀过程,并检测了针尖的使用效果。     

扫描隧道显微镜钨针尖的制备与表征

采用直流电化学刻蚀方法制备扫描隧道显微镜钨针尖,研究了电化学刻蚀过程中NaOH溶液浓度、钨丝浸入长度和刻蚀电压对针尖形貌的影响。通过扫描电子显微镜(SEM)测量针尖曲率半径和针尖纵横比值,以表征针尖的尺寸和形状;通过能谱仪(EDS)分析针尖表面成分,以表征表面清洁度;通过场发射显微镜(FEM)得到Fowler-Nordheim (F-N)曲线来检测针尖发射性能。实验结果表明,当溶液浓度为2 mol/L、钨丝浸入长度为4 mm、刻蚀电压为3 V时,可以得到曲率半径约为100 nm、纵横比值为13的针尖,且表面无钨的氧化层。FEM结果显示当对针尖施加500 V的负偏压时,针尖可以稳定发射50 nA量级的电流,且针尖性能具有良好的一致性。     

一种新型的STM探针

以普通的石英光纤为材料，用熔拉腐蚀复合的方法制备出nm量级的光纤探针，而后在针尖表面镀上数十nm厚的金属膜，达到导电性，使其能传导隧道电流，从而研制出一种新型的扫描隧道显微镜（STM）光纤隧道探针，在STM上取得了比较理想的实验结果。本文将光纤隧道探针与金属隧道探针作了比较，并对其性能作了分析。     

超高真空扫描隧道谱实验对碲镉汞室温带隙的直接测定

利用超高真空扫描隧道显微镜的隧道谱实验对汞空位掺杂的液相外延P型碲镉汞材料在室温条件下进行测量,发现直接的电流-电压隧道谱对带隙预言一定程度上要受到成像偏置电压的影响.但当采用了锁相放大测量技术,通过实验直接获取微分隧道谱(dI/dV)信号,并利用电流-电压谱对dI/dV作归一化处理时,最终结果则能较准确、可靠地预言材料的带隙,表明扫描隧道谱方法作为独立于光学方法之外的另一种实验表征手段对碲镉汞能带电子结构研究的适用性.     

利用I-Z曲线的STM"接触"模式的电学测量和表面改性研究

利用STM对金属有机络合物电双稳材料Ag—TCNQ薄膜进行电学性质的表征与改性，在针尖强电场的作用下，当电压达到某一阈值后薄膜从高阻态跃迁至低阻态，这两种高低阻态分别定义为一个存储单元的“0”与“1”状态。本文考虑到在STM的常规恒流工作模式下，针尖与样品之间的隧道结对于电学性质的表征与改性具有影响。为此测量隧道电流I对隧道结宽度Z的依赖关系，I-Z曲线，从而确定针尖刚好接触样品的接触点，利用STM进行了针尖与样品“接触式”的电学测量和表面电学改性研究，并与常规工作模式进行了比较。     

光子扫描隧道显微镜光子隧穿可视化数值模拟

提出了一种新的入射波设置“三波法”,即将光子扫描隧道显微镜(PSTM)系统中的入射波、全内反射波和透射的隐失波同时设置为时域有限差分(FDTD)计算区域的入射源,克服了PSTM中应用FDTD所遇到的存在样品台(分层界面)和全内反射等困难。给出了PSTM中探针针尖与样品相互作用和光子隧穿的物理图像。模拟了PSTM探针等高扫描过程。给出了PSTM图像,比较了单光束照射与π对称照射等高度扫描曲线的不同,前者有一定的偏移,后者可纠正偏移。     

Hg0.72Cd0.28Te扫描隧道谱的模型解释

本工作应用截面扫描隧道显微镜（XSTM）研究了分子束外延生长的Hg_0.72Cd_0.28Te薄膜。扫描隧道谱（STS）测量显示, 此碲镉汞材料的电流-电压（I/V）隧道谱呈现的零电流平台宽度（隧道谱表观带隙）比其实际材料带隙增大约130%,说明存在明显的针尖诱导能带弯曲（TIBB）效应。应用扫描隧道谱三维TIBB模型计算发现低成像偏压测量时获取的I/V隧道谱数据与理论计算结果有令人满意的一致性。然而较大成像偏压时所计算的I/V谱与实验谱线在较大正偏压区域存在一定偏离。这是由于目前的TIBB模型未考虑带带隧穿,缺陷辅助隧穿等碲镉汞本身的输运机制对隧道电流的影响造成的。     

一种低功耗CMOS晶振电路设计

在组成反相器的两个晶体管的栅端添加一个串联电容,直流通过连接在反相器内部的大电阻偏置这两个晶体管,P管被低于电源电压一个阈值的电压偏置,N管被高于低电压一个阈值的电压偏置,偏置电压通过电流镜镜像,因此受温度和工艺的影响较低。一种低功耗CMOS晶体振荡电路利用上述反相器,它的开启电压低于P管和N管的阈值之和,整体电路消耗的电流大概为传统电路的1/5。此晶振电路基于MXIC 0.5μm仿真模型验证实现,整体电路消耗的功耗电流小于750 nA。     

扫描隧道显微镜钨针尖氧化层去除的化学方法

电化学腐蚀得到的扫描隧道显微镜(STM)钨针尖表面通常覆盖了一层钨的氧化膜,这层氧化膜的存在很大程度上影响了STM扫描图像质量.本实验采用氢氟酸对新制备出的钨针尖进行去氧化层处理,并通过对比两组高序热解石墨(HOPG)STM图像和金样品的扫描隧道谱来论证这种去氧化层手段的有效性.     

一种高性能电流差分缓冲放大器

提出了一种新型低功耗、宽线性范围的电流差分缓冲放大器,电路中的电流镜全部采用NMOS电流镜结构,电路结构简单。对传统的电流源结构的电流输入端进行改进,降低了电路的工作电压和功耗;在电流输出端采用改进型威尔逊电流镜结构,提高了电路的线性度和带宽;在电压输出端采用电压缓冲放大器,降低了端口阻抗,提高了电压带宽。基于0.18 μm CMOS工艺,采用Pspice软件对电路进行仿真:在±0.8 V的供电电压下,电路的电流电压传输率αp,αn和βv分别为1.020,1.020,0.998;Iz/Ip,Iz/In和Vw/Vz的3阶互调截点频率分别为376,376和726 MHz;整个电路功耗仅为0.48 mW。最后,将提出的低电压低功耗高频电流差分缓冲放大器成功应用于双2阶电流模式滤波器中。     

A new type of Schottky tunnel transistor

A new type of tunnel transistor, in which electrons can tunnel through a very thin Schottky barrier between an n⁺- accumulation-layer formed just under a MOS gate for controlling the tunneling current and the Schottky metal, is proposed and demonstrated. This tunnel transistor has no threshold voltage in cathode current I_k vs. cathode voltage V_k curves. Theoretical calculations based on Stratton's tunneling theory are carried out and have trends similar to the experimental results     

一种基于CMOS CCDVCC Ⅱ的可编程多功能滤波器及可编程测量放大器

介绍了一种新型的电调谐差分电压输入第二代电流传输器.并且用其构成一种电压模式多功能滤波器,可以获得:低通、高通、带通、带阻、全通传输函数.且这种滤波器可以通过调节电流传输器偏置电流独立改变传输函数的品质因素和固有频率.这种多功能滤波器仅仅使用两个CCDVCCⅡ、一个电阻和两个电容构成,且不需要任何元件匹配.而且,可以利...     

An empirical study of dynamic properties of an individual carbon nanotube electron source system

In this paper we present an empirical study of some dynamic properties of an individual carbon nanotube (CNT) field emission electron source system. We propose a circuit model that represents the CNT cathode to anode diode as a capacitor in parallel with a voltage-controlled variable resistor. The transient response of the CNT electron source system to the falling edge of a voltage step input was evaluated. For input voltages below the threshold voltage for field emission, the nanotube loop is effectively open and the circuit response is consistent with a discharging capacitor. On the other hand, for input voltages above field emission threshold, the nanotube loop conducts and now the capacitor discharges to a certain extent through the nanotube loop as well. Field emission current versus voltage data also shows that the resistance across the CNT cathode to anode diode varies as a function of applied voltage. Below turn-on voltage, the diode behaves as an open circuit (4 TΩ at the ammeter noise floor). Above turn-on voltage, resistance falls exponentially, as expected from the Fowler–Nordheim equation for cold field emission current. Experimental current–voltage data is presented for a simple emitter array consisting of two CNTs with equal lengths. Despite the similarity in their lengths the turn-on voltages of the nanotubes varied significantly, viz. 26 V versus 109 V. This large difference in the turn-on voltages can be attributed to tip imperfections. For advanced array applications such as high-throughput parallel e-beam lithography, in which precise dose control is necessary, the diode circuit model will be useful for controlling individually addressed nanotubes to account for dissimilar field emission properties. The model may also be applied to optimize the design of a SEM incorporating a single CNT electron source.     

Electronically tunable current-mode instrumentation amplifier with high CMRR and wide bandwidth

A current-mode instrumentation amplifier consists of only two current follower differential input transconductance amplifiers is proposed in this paper. The proposed circuit of instrumentation amplifier is realized without using any passive components. Thus, the proposed circuit structure is very simple and suitable to the integrated circuit technology. The input impedance is low and output impedance is high, therefore the proposed circuit is easily cascadable. The gain of the proposed instrumentation amplifier is electronically controllable. The proposed circuit also enjoys the features of high common mode rejection ratio, wide bandwidth and low power consumption. Additionally, performance of the proposed circuit is tested under process, supply voltage and temperature variations. Furthermore, another circuit of instrumentation amplifier, which is capable of providing higher differential mode gain is also shown. The non-ideal and parasitic studies are included. HSPICE simulations are performed to validate the proposed circuits of instrumentation amplifier.     

The design of CMOS continuous-time VHF current and voltage-modelowpass filters with Q-enhancement circuits

In this paper, very high frequency (VHF) current and voltage biquadratic lowpass filters implemented directly by the linear wideband finite-gain current and voltage amplifiers, respectively, are proposed and analyzed. A new Q-enhancement circuit which consists of a finite-gain wideband tunable voltage amplifier and a Miller capacitor is also proposed. It can increase the maximum-gain frequency f_M, and enhance the maximum-gain quality factor Q_M of the VHF lowpass filters. Experimental results have successfully verified the capability of the proposed new filter implementation method in realizing both VHF current and voltage lowpass filters with maximum-gain frequency f_M tunable in the range of 148 MHz to 92 MHz. It is also shown from experimental results that the VHF current lowpass biquad with the Q-enhancement circuit has the maximum-gain frequency f_M near 185 MHz and the maximum-gain quality factor Q_M up to 18.5. A fourth-order Chebyshev current lowpass filter with the cut-off frequency of 190 MHz has been successfully designed by using the current biquads with Q-enhancement circuits     

Design to suppress return-back leakage current of charge pump circuit in low-voltage CMOS process

A new charge pump circuit has been proposed to suppress the return-back leakage current without suffering the gate-oxide reliability problem in low-voltage CMOS process. The four-phase clocks were used to control the charge-transfer devices turning on and turning off alternately to suppress the return-back leakage current. A test chip has been implemented in a 65-nm CMOS process to verify the proposed charge pump circuit with four pumping stages. The measured output voltage is around 8.8 V with 1.8-V supply voltage to drive a capacitive output load, which is better than the conventional charge pump circuit with the same pumping stages. By reducing the return-back leakage current and without suffering gate-oxide overstress problem, the new proposed charge pump circuit is suitable for applications in low-voltage CMOS IC products.     

Arc root commutation from moving contacts in low voltage devices

This paper focus on the arc commutation from a moving contact and in particular on the anode motion of a high current arc in low voltage current limiting circuit breakers. Recent investigations have observed that the anode arc root motion is affected by arc chamber geometry. It was previously assumed that cathode root motion was the dominant process. The study uses a flexible test apparatus with a solid state high speed imaging system. The experimental results presented show the influence of arc chamber venting, current level, current polarity and contact velocity on arc motion, Particular emphasis is made on the anode motion. The physical processes occurring in the anode root are discussed and related to the observed motion. The results show that the anode root is retarded at the tip of the moving contact and that this is primarily related to the venting process in the arc chamber     

Nullor Equivalents of Active Devices for Symbolic Circuit Analysis

The new pathological elements, the voltage mirror (VM) and current mirror (CM), have shown advantages in analog behavioral modeling and circuit synthesis. Recently, the floating mirror elements have been used to derive pathological sections to ideally represent various popular analog signal processing properties that involve differential or multiple single-ended signals. In order to take advantage of the symbolic nodal analysis (NA) of nullor-mirror networks, we present the nullor equivalents of a differential voltage cell, a differential voltage conveying cell, and a current replication cell in this paper. The proposed nullor equivalents can be used to represent many popular active devices in performing symbolic NA. Two representative filter circuits containing differential characteristics of active devices are given to verify the feasibility. We expect them to be used within an analog design automation environment to enhance circuit analysis and modeling.     

一种用于半桥功率IC的新型高压电平位移电路

In order to reduce the chip area and improve the reliability of HVICs,a new high-voltage level-shifting circuit with an integrated low-voltage power supply,two PMOS active resistors and a current mirror is proposed.The integrated low-voltage power supply not only provides energy for the level-shifting circuit and the logic circuit,but also provides voltage signals for the gates and sources of the PMOS active resistors to ensure that they are normally-on.The normally-on PMOS transistors do not,therefore,need to be fabricated in the depletion process.The current mirror ensures that the level-shifting circuit has a constant current,which can reduce the process error of the high-voltage devices of the circuit.Moreover,an improved RS trigger is also proposed to improve the reliability of the circuit.The proposed level-shifting circuit is analyzed and confirmed by simulation with MEDICI,and the simulation results show that the function is achieved well.     

STM/AFM nano-oxidation process to room-temperature-operatedsingle-electron transistor and other devices

Application of a scanning tunneling microscopy (STM) and an atomic force microscopy (AFM) to electron devices and an optical device are introduced in this paper. Using STM tip/AFM cantilever as a cathode, surfaces of a metal or a semiconductor are oxidized to form a few tens of nanometers-wide oxidized metal line or an oxidized semiconductor line, which works as an energy barrier for an electron. A single-electron transistor (SET), a photoconductive switch, and a high-electron mobility transistor (HEMT) are fabricated using this fabrication process. The fabricated SET operates even at high room temperatures and shows the large Coulomb gap and staircase of 200-mV periods and the large Coulomb oscillation periods of 406 mV. The fabricated photoconductive switch shows a ultra-fast response time, i.e., a full-width at half-maximum response of 380 fs at a bias voltage of 10 V. The drain current of HEMT was controlled by the oxidized semiconductor wire on the channel region formed by this fabrication process