Silicon p−n insulator-metal (p-n-I-M) devices

Silicon p-n-I-M devices with thin insulating layers ($\text{thicknesses}\text{? 30}\text{A}\text{?}$), named MTIS devices, have been developed. The two terminal device shows an S-shaped negative resistance characteristics similar to a Schockley diode (or p-n-p-n diode). Typically the threshold and sustaining voltages are 10 ～ 15 and 1.3 ～ 2 volts, respectively. The former however can be controlled by optical illumination. Turn-on time including delay is less than 2 nsec and turn-off time ? 1 nsec or less. A thyristor-like device with its third terminal connected to the n-layer shows switching operation controllable by this terminal. A monolithic linear array of p-n-I-M diodes with 30 μm spacing operates as a shift register through coupling of adjacent diodes. Life of the two terminal devices recorded at present is over 1.5 × 10⁴ hr. These devices can be applied to low power and high-speed electrical switching and also to optical switching and integrated logic circuits.     

Theory of switching in p-n-insulator (tunnel)-metal devices—II: Avalanche mode

The four layer structure M-I (leaky)-n-p semiconductor displays a current-controlled negative-resistance in its I-V characteristic. The device is named “MISS” which is an acronym for Metal-Insulator-Silicon-Switch. The punch-through mode of operation of the device was treated in an earlier paper (part I). The avalanche-mode of the operation of the device is now considered.In addition to the basic positive feedback action associated with the punch-through MISS, a second positive feedback action is found to exist in the avalanche-mode MISS, which parallels that responsible for switching in an avalanche transistor. The coexistence of these two regenerative feedback actions can, under favourable conditions, result in three stable states in the I-V characteristic of the MISS. A device incorporating this behaviour can be of importance in multi-level logic circuits.     

Characteristics of three-terminal metal-tunnel if oxide-n/p+ devices

The device described here comprises a p⁺ substrate containing an epitaxial n-layer, on the surface of which is grown a thin (～50 Å) tunnel oxide. A metal cathode is deposited on the oxide surface, and a metal anode on the back side of the p⁺ substrate. A third terminal, the gate electrode, is connected to the n epilayer to provide for biasing the n-p⁺ junction.The I-V characteristic exhibit two stable states: a high-impedance state and a low-impedance state which are separated by a negative-resistance region. The high-impedance state is stable for applied voltages up to the intrinsic threshold voltage, V_s. When the switching voltage is exceeded, the device switches rapidly to the low-impendance state, which is characterized by a current that increases with little increase in the voltage across the device.The switching voltage may be reduced below V_s by current or voltage biasing of the n-p⁺ junction by means of the gate electrode. Gate efficiencies, the ratio of the change in switching voltage with d.c. gate voltage or current, of 10 V/V and 1.0 V/μA have been observed. Pulsed gate measurements are also presented, and it found that for pulse widths down to 0.1 μs the gate switching characteristics follow the d.c. characteristics. For pulse widths less than 0.1 μs the gate efficiencies are degraded. Suggestions for improving the device characteristics and the turn-on and turn-off time of the device and device reliability are discussed.     

Diode laser fabrication using proton bombardment of PbTe

Diode lasers, in which the p-n junction was formed by causing type conversion in a p-type PbTe substrate using proton damage, have been made and their performance characterised. Variations of the energy, flux and fluence of the proton bombardment over wide ranges were found to have little or no effect on the diode I-V, C-V or power output characteristics, but such variations did affect the yield of diodes which lased. The C-V characteristics indicated that the p-n junctions were abrupt. The I-V characteristics suggested that the forward conduction current was dominated by a non-radiative multi-step tunnelling process.     

A computer-aided simulation model for the I–V characteristic of M-n-p silicon Schottky-barrier diodes produced by use of low-energy arsenic-ion implantation

Current-transport properties of Al-n-p silicon Schottky-barrier diodes have been studied both experimentally and theoretically. An analytical model for the I-V characteristic of a metal-n-p Schottky barrier diode has been developed by using an interfacial layer-thermionic-diffusion model. Assuming a Gaussian distribution for the implanted profile, the barrier-height enhancement and ideality factor have been derived analytically. Using low energy (25 KeV) arsenic implantation with the dose ranged form 8 × 10¹⁰/cm² to 10¹²/cm², Al-n-p silicon Schottky barrier diodes have been fabricated and characterized. Comparisons between the experimental measurements and the results of computer simulations have been performed and satisfactory agreements between these comparisons have been obtained. The reverse I–V characteristics of the fabricated Al-n-p silicon Schottky barrier diodes can also be well simulated by the developed model.     

Switching characteristics of polysilicon MISS devices

Experimental results on MISS devices are reported. The insulating layer was obtained by means of electron gun evaporation of undoped polycrystalline silicon. A model taking into account the specific conduction mechanisms in the semi-insulating polysilicon layer has been developed. This model explains the experimental I-V characteristics and gives rise to a switching condition relation similar to that of p-n-p-n devices.     

Electrical characteristics of laser-contacted diodes

We have fabricated p⁺-n and Schottky diodes with contacts made of laser-formed palladium-silicide. The electrical characteristics of these diodes are presented. The reverse currents and breakdown voltages are comparable to conventionally contacted p⁺-n diodes. The barrier height of laser-formed Schottky diodes agrees well with published values for Pd₂Si. The promising results point out the potential applications of contact formation by laser irradiation in device manufacture.     

Potential and limitations of Schottky-barrier barritt devices

Computer simulation of various Schottky-barrier structures is carried out to investigate the large-signal properties of these devices. Comparison between Schottky-barrier devices and their p-n junction counterparts are also made to evaluate the potential and limitations of these devices and to explain the difference in performance between them. It is shown that among various Schottky-barrier structures, the M-n-i-p⁺ structure is the most powerful one and the M-n-p-p⁺ device is the most efficient one. Furthermore, Schottky-barrier devices with low barrier heights for minority carriers (less than 0.2 eV) are capable of producing power levels close to the generated power of p-n junction devices. Investigation of the temperature dependence of the large-signal performance of these devices shows that Schottky barriers are more sensitive and exhibit their optimum performance close to room temperature value. At low temperature, the output power is limited by the low minority carrier injection, whereas at high temperature the limitation is due to the velocity-modulation losses in the injection and low-field regions of the device.     

A new integrated voltage-controlled negative resistance device-Lambda MOSFET

A new Λ-type voltage-controlled negative resistance device called the “Lambda MOSFET” is presented, which consists of three integrated n(p)-channel enhancement mode metal-oxide-silicon field effect transistors. The main integrated circuit construction of the Lambda MOSFET is to connect an inverter of the n(p)-channel enhancement mode MOSFET with load operated at the saturation region (NELS) and a n(p)-MOS driver, which can be easily fabricated by existing planar MOSFET technologies. The operational principles and the characteristics of the proposed new device are discussed.     

Voltage dependence of the differential capacitance of a p +-n junction

The dependences of the differential capacitance and current of a p ⁺-n junction with a uniformly doped n region on the voltage in the junction region are calculated. The p ⁺-n junction capacitance controls the charge change in the junction region taking into account a change in the electric field of the quasi-neutral n region and a change in its bipolar drift mobility with increasing excess charge-carrier concentration. It is shown that the change in the sign of the p ⁺-n junction capacitance with increasing injection level is caused by a decrease in the bipolar drift mobility as the electron-hole pair concentration in the n region increases. It is shown that the p ⁺-n junction capacitance decreases with increasing reverse voltage and tends to a constant positive value.     

On the forward current-voltage characteristics of p+-n-n+ (n+-p-p+) epitaxial diodes

The forward-biased current-voltage characteristics of p⁺-n-n⁺ and n⁺-p-p⁺ epitaxial diodes are derived theoretically. Effects of the energy-gap shrinkage, the high-low junction built-in voltage, the high-level injection, and the minority-carrier life time on the forward-biased current-voltage characteristics are included. Good agreements between the theoretically derived results and the experimental data of Dutton et al. are obtained. The developed theory predicts that the leakage of the high-low junction is dominated by the recombination of minority carriers in the highly doped substrate, not by the recombination of minority carriers in the high-low space charge region, which is opposite to the previous prediction of Dutton et al.     

High-voltage planar junction with a field-limiting ring

A twodimensional Poisson equation is solved as part of a program to improve breakdown characteristics of a planar p-n junction by using a field limiting ring. The influences of n^? concentration and n^? layer width of p⁺-n^?-n⁺ diode are investigated. Higher n^? concentration and smaller n^? width make optimum distance between anode and field limiting ring smaller. Breakdown voltages predicted by optimising method reported agree well with the experimental results.     

Electrical properties of CuInSe2 single crystals

Various bulk electrical properties and device characteristics have been measured. It has been shown that the majority carrier type is dependent on crystal stoichiometry. Mobilities of 660 cm²/V sec and 30 cm²/V sec have been measured for n-and p-type samples, respectively. Rectifying contacts and p-n junctions have been investigated by small signal analysis and the associated doping levels and equilibrium band diagrams have been determined. Photovoltage measurements on rectifying contacts have shown that the band-gap has a value of 0.95 ± 0.01eV.     

Effect of irradiation with fast neutrons on electrical characteristics of devices based on CVD 4<Emphasis Type="Italic">H</Emphasis>-SiC epitaxial layers

The effect of irradiation with 1-MeV neutrons on electrical properties of Al-based Schottky barriers and p⁺-n-n⁺ diodes doped by ion-implantation with Al was studied; the devices were formed on the basis of high-resistivity, pure 4H-SiC epitaxial layers possessing n-type conductivity and grown by vapor-transport epitaxy. The use of such structures made it possible to study the radiation defects in the epitaxial layer at temperatures as high as 700 K. Rectifying properties of the diode structures were no longer observed after irradiation of the samples with neutrons with a dose of 6×10¹⁴ cm^?2; this effect is caused by high (up to 50 GΩ) resistance of the layer damaged by neutron radiation. However, the diode characteristics of irradiated p⁺-n-n⁺ structures were partially recovered after an annealing at 650 K.     

Characteristics of metal/tunnel-oxide/n/p+ silicon switching devices—II: Two-dimensional effects in oxide-isolated structures

Effects of oxide isolation on the two-terminal D.C. characteristics of metal/tunnel-oxide/n/p⁺ silicon switching devices have been studied.Recent experimental results have shown that the switching characteristics are strongly dependent on area, and area-to-perimeter ratio of the device. To carry out a systematic investigation of this phenomenon, the devices in this study were isolated using V-grooves of various areas. For a given tunnel-oxide thickness and area, it was found that the magnitude of the switching voltage and holding current of the device increased with isolation area, whereas the switching current remained essentially constant. Furthermore, it is shown that the switching current is almost completely determined by the characteristics of the tunnel-oxide; in particular, the minority carrier concentration at the SiSiO₂ interface. Physical arguments are presented which adequately explain the observed trends. It is also experimentally shown that both switching current and holding current decrease as the tunnel-oxide thickness is increased.A simple two-dimensional model for the oxide-isolated MISS device is derived which effectively explains the above area-related phenomena. In agreement with experimental results, the model predicts that for a given tunnel-oxide thickness and area, an increase in switching voltage magnitude and holding current will result as the isolated p⁺-n junction area is increased. Calculations based on this model are shown to be in good agreement with experimental data.     

Silicon solar cells using natural inversion layers found in thermally-oxidized p-silicon

Inversion layer silicon solar cells are described which employ the natural inversion layer occurring at the surface of thermally-oxidized p-type silicon as one side of an induced n-p junction. Very shallow junctions are predicted theoretically with high electric fields in a direction to aid the collection of carriers generated by light of ultra-violet wavelengths. Collection efficiency calculations show the inversion layer cell to be less sensitive to lifetime and surface recombination velocity variations than diffused junction cells. Experimental 2 cm × 2 cm cells have been fabricated with the inversion layer contacted via a fine diffused n⁺ grid overlaid with a Ni-Cu-Au contact. The contact grid, specially designed to minimize the effect of the high inversion layer sheet resistance, produced a total shading of 16%. Illuminated I-V measurements confirm the induced junction to be near ideal, with an ideality factor $\text{A ? 1.05}$ and a reverse saturation current approaching that predicted theoretically. Conversion efficiencies of ? 8% have been obtained, with no special precautions being taken to reduce the series resistance of the back contact, or reflections at the front surface.     

Multiple buried channel charge-coupled device

Charge storage characteristics of a vertically stacked multiple p-n layer Si structure, under fully depleted condition, are investigated analytically and the feasibility of operating such structure as the multiple buried channel charge-coupled device (MBCCD) is discussed. Fabrication requirements of the device are outlined and the infleunce of parameter variations on its operational characteristics are described.     

A structure-oriented model for determining the substrate spreading resistance in bulk CMOS latch-up paths and its application in holding current prediction

A structure-oriented model has been developed to simulate the actual distribution of majority-carrier current flow paths in the substrate when the parasitic p-n-p-n structure with long-stripe geometry in a CMOS (complementary metal—oxide-semiconductor) circuit is at the latch-up state. Based on this structure-oriented model, the voltage drop across the latch-up path in the substrate can be calculated directly from the structure data. Therefore, the equivalent emitter-base shunting resistance in the substrate can be easily obtained and used to accurately predict the holding current. The two-dimensional numerical simulations have been carried out, based on this structure-oriented model, to obtain the emitter-base shunting resistance associated with the parasitic lateral bipolar transistor in the substrate. The computed substrate shunting resistance and the well emitter-base shunting resistance have been used to calculate the holding current with the help of the measured peak parasitic transistor gains. The predicted holding currents have been found to be in good agreement with the experimental data measured from several p-n-p-n structures, including normal and reversed layouts which are all designed by using the long-stripe geometries. Furthermore, the numerical simulations have been extended to predict the effects of the layout changes of the p-n-p-n structures on the latch-up susceptibility.     

Degradation mechanism for silicon p+-n junctions under forward bias

Leakage current degradation has been observed during forward bias stressing of silicon integrated p⁺-n junctions. Detailed characterization results of the anomalous leakage behavior are discussed in this paper. From these results an electric field-enhanced impurity diffusion mechanism has been proposed to explain both the strong temperature and forward bias dependencies on leakage current time-to-saturation. An activation energy has been determined for this mechanism (0.48±0.04 eV) and is in good agreement with that previously determined for diffusion of interstitial copper in p-type silicon. Subsequent Secondary Ion Mass Spectrometer elemental analysis has confirmed the presence of copper near the surface of the epitaxial layer containing the p⁺-n device.     

Effect of a d.c. electric field parallel to the depletion layer on the microwave oscillations in a p-i-n IMPATT diode

High frequency properties of a p-i-n IMPATT diode have been analysed when an additional d.c. electric field parallel to the area of the junction and perpendicular to the high electric field caused by reverse biasing the device is established in the space charge layer. The transit time required by the carriers to cross the depletion layer is increased due to the increase in the path length caused by the change in the direction of the resultant field while the velocity of the carriers remain saturated. It is found that the frequency for maximum negative resistance decreases with the increase of the additional d.c. electric field.