Au/SnO2/n-Si (MOS) structures response to radiation and frequency

Metal-insulator-semiconductor (MOS) structures with insulator layer thickness of 290 Å were irradiated using a ⁶⁰Co (γ-ray) source and relationships of electrical properties of irradiated MOS structures to process-induced surface defects have been investigated both before and after γ-irradiation. The density of surface state distribution profiles of the sample Au/SnO₂/n-Si (MOS) structures obtained from high-low frequency capacitance technique in depletion and weak inversion both before and after irradiation. The measurement capacitance and conductance are corrected for series resistance. Series resistance (Rs) of MOS structures were found both as function of voltage, frequency and radiation dose. The C(f)-V and G(f)-V curves have been found to be strongly influenced by the presence of a dominant radiation-induced defects. Results indicate interface-trap formation at high dose rates (irradiations) is reduced due to positive charge build-up in the semiconductor/insulator interfacial region (due to the trapping of holes) that reduces the flow rate of subsequent holes and protons from the bulk of the insulator to the Si/SnO₂ interface. The series resistance decreases with increasing dose rate and frequency the radiation-induced flat-band voltage shift in 1 V. Results indicate the radiation-induced threshold voltage shift (ΔV_T) strongly dependence on radiation dose rate and frequency.     

Phosphorescent dye-doped hole transporting layer for organic light-emitting diodes

Hole transport materials are critical to the performance of organic light-emitting diodes (OLEDs). While 1,1-bis(di-4-tolylaminophenyl)cyclohexane (TAPC) with a high triplet energy is widely used for high efficiency phosphorescent OLEDs, devices using TAPC as a hole transport layer (HTL) have a short operating lifetime due to the build-up of trapped charges at the TAPC/emitting layer (EML) interface during device operation. In this work, to solve the operating stability problem, instead of using conventional HTLs, we use a(fac-tris(2-phenylpyridine)iridium (III))(Ir(ppy)₃) doped layer as an HTL to replace the conventional HTLs. Because of the hole injecting and transporting abilities of the phosphorescent dye, holes can be directly injected into the emitting layer without an injection barrier. OLEDs based on a phosphorescent dye-doped HTL show significant improvement in operational stability without loss of efficiency.     

Correlations of impedance-voltage characteristics and carrier mobility in organic light emitting diodes

The correlation of accumulation charges at the interfaces of organic layers and carrier mobility in organic light emitting devices (OLEDs) were investigated through the impedance versus voltage (Z-V) characteristics of devices. The properties of devices with various combinations of cathode structures, HTLs and ETLs were investigated to understand the impedance transition in Z-V characteristics of OLEDs. It was observed that there is an extra impedance transition before devices turn on when the hole mobility in the HTL is much greater than the electron mobility in the ETL in the devices, which makes the Z-V characteristics a potential tool to compare the electron mobility in ETL and hole mobility in HTL.     

Thermal annealing effect on internal electrical polarization in organic solar cells

This article reports experimental studies on internal electrical polarization effects by using optical absorption and photoexcitation assisted capacitance–voltage (C–V) measurements based on morphological development in the standard P3HT:PCBM solar cell. We observe that morphological development can increase absorption intensity upon thermal annealing. The increase of absorption intensity essentially reflects an enhancement of absorption coefficient of local donor and acceptor structures. We attribute the enhancement of absorption coefficient to the well-known morphological developments: increased polymer crystallinity and molecular aggregations caused by thermal annealing. Furthermore, the enhancement in absorption coefficient indicates stronger electrical polarizations in the P3HT:PCBM film. The C–V studies find that increasing local electrical polarizations can lead to an enhancement on the generation of charge carriers at donor:acceptor interfaces and the transport of generated charge carriers to respective electrode interfaces in the P3HT:PCBM device. Our experimental findings suggest that local electrical polarizations play an important role in the development of photovoltaic processes in organic solar cells.     

Transient electroluminescence in heavy metal complex-based phosphorescent organic light-emitting diodes

In phosphorescent organic light-emitting diodes (PHOLEDs), both the rise time and decay time decrease with increasing amplitude of the applied voltage pulse. The rise time τ_r of the transient electroluminescence (TEL) increases linearly with increasing value of the ratio of voltage V to the current j, that is, with V/j. Using the equations for the dynamics of charge carriers an expression is derived for the rise time τ_r of the TEL in OLEDs. It is shown that τ_r should increase with increasing values of the ratio (V/j), dielectric constant ε, and area of cross-section of the emission layer, however, it should decrease with the thickness of emission layer. For higher values of the applied voltage nonlinearity occurs in the τ_r versus V/j plot because the increase in mobility of carriers at high electric field causes increase in the current flowing through the OLEDs. In fact, the rise time of TEL is related to the product of capacitance and effective resistance of the OLED. Considering the rate of generation and decay of radiative triplet excitons in the emission layer, an expression is derived for the decay time of TEL in PHOLEDs and it is shown that, for higher values of the time-constant of OLED, the decay time should be equal to the time-constant, however, for lower values of the time-constant, the decay time should be equal to the lifetime of radiative triplet excitons in the emission layer. A good agreement is found between the theoretical and experimental results.     

Fabrication and characterization of in situ polymerized n-polyaniline films grown on p-Si heterojunctions

This work presents a study on the fabrication and the electrical transport mechanism of the in situ polymerized n-type polyaniline (PANI) grown on p-type Si to form n-polyaniline/p-Si heterojunction devices. The current-voltage-temperature (I-V-T) characteristics of n-PANI/p-Si devices were investigated in the temperature range of 298-373 K. These devices showed good rectifying behavior and the temperature dependence of the I-V characteristics were successfully explained by the thermionic mechanism in the narrow potential range, V ? 0.4 V. The barrier height, ideality factor and the series resistance values of this structure were obtained from the forward bias I-V characteristics. The capacitance-voltage-temperature (C-V-T) characteristics of n-PANI/p-Si devices were also investigated. The barrier height values obtained from the C-V measurements were found to be higher than that obtained from the I-V measurements at various temperatures. From the capacitance-voltage-frequency (C-V-f) characteristics, it was found that the capacitance remained almost constant up to a certain values of the frequency in the lower and higher sides of the frequency scale. The higher values of capacitance at low frequencies were attributed to the excess capacitance resulting from the interface states in equilibrium with the p-Si side that can follow the AC signal.     

Efficient hole-transporter for phosphorescent organic light emitting diodes with a simple molecular structure

N,N-diphenyl-4-(quinolin-8-yl)aniline (SQTPA), which composes a triphenylamine group and a quinoline group, has been synthesized and employed as a hole-transporter in phosphorescent OLEDs. It has been proved that SQTPA has efficient hole-transport property with a hole-mobility of 3.60 × 10⁻⁵ cm²/V s at the electric field of 800 (V/cm)^1/2, which is higher than that of NPB (1.93 × 10⁻⁵ cm²/V s). Blue, orange and green phosphorescent OLEDs have been fabricated based on FIrpic, Ir(2-phq)₃, Ir(ppy)₃ with typical structures by using SQTPA as the hole-transporter. The SQTPA-based devices show maximum external quantum efficiencies and power efficiencies of 17.5%, 32.5 lm/W for blue, 12.3%, 20.5 lm/W for orange and 20.3%, 64.5 lm/W for green. The performances of SQTPA-based devices are much better than that of NPB-based phosphorescent OLEDs with similar structures. Thought of its very simple molecular structure and easy synthetic route, SQTPA should be an efficient hole-transporter for phosphorescent OLEDs.     

PdInP Schottky diode hydrogen sensors

PdInP Schottky diodes are shown to be very sensitive and reproducible detectors of hydrogen. Absorption or desorption of hydrogen by Pd causes large changes in the diode C–V or I–V characteristics. Fourfold increase in capacitance is observed on exposing the device to forming gas. We present data on sensitivity of these devices, their transient response and detection mechanism.     

Capacitance–voltage characteristics of P3HT:PCBM bulk heterojunction solar cells with ohmic contacts and the impact of single walled carbon nanotubes on them

Capacitance–voltage (C–V) characteristics of P3HT:PCBM devices of two different thicknesses are correlated with current density–voltage (J–V) characteristics. The rising portion of the C–V characteristics coincides with the exponential current density below the built-in voltage. The negative capacitance (NC) of these devices is a low frequency phenomenon and it occurs in trap-free space charge limited current (SCLC) regime. The onset frequencies of NC for devices with and without SWNTs also do not follow direct relation with effective mobility. The NC in thin devices has non-monotonic change with voltage for thin devices showing that interface state kinetics can be the reason for its occurrence. The NC of thick devices, on the other hand, increases monotonically with voltage showing that bulk properties dominate in these. Addition of SWNTs to these devices for efficiency improvement does not modify their built-in voltage. Also, the SWNTs do not affect the forward NC behaviour. However, the devices containing SWNTs show NC in reverse bias also which has different frequency dependence with voltage. The reverse bias NC is attributed to the large non-linear reverse current by charge injection into the additional energy levels introduced by SWNTs.     

Studies of the quality of GdSiO-Si interface

In this paper nMOS transistors with GdSiO gate dielectric are studied using electrical methods (C-V, I-V and charge pumping) in order to assess the quality of the dielectric-semiconductor interface. Mobility is estimated using the split C-V technique and the influence of voltage stress on interface trap generation and charge build-up in the oxide is investigated. Generation of additional interface traps is observed during negative voltage stress only, which may be attributed to hole tunneling from the semiconductor to electron traps. Multi-frequency charge pumping measurements reveal the presence of border traps.     

Extraction of electronic parameters of Schottky diode based on an organic Orcein

An Au/Orcein/p-Si/Al device was fabricated and the current-voltage measurements of the devices showed diode characteristics. Then the current-voltage (I-V), capacitance-voltage (C-V) and capacitance-frequency (C-f) characteristics of the device were investigated at room temperature. Some junction parameters of the device such as ideality factor, barrier height, and series resistance were determined from I-V and C-V characteristics. The ideality factor of 2.48 and barrier height of 0.70 eV were calculated using I-V characteristics. It has been seen that the Orcein layer increases the effective barrier height of the structure since this layer creates the physical barrier between the Au and the p-Si. The interface state density N_ss were determined from the I-V plots. The capacitance measurements were determined as a function of voltage and frequency. It was seen that the values of capacitance have modified with bias and frequency.     

Hybrid intermediate connector for tandem OLEDs with the combination of MoO3-based interlayer and p-type doping

We report on a high-quality hybrid intermediate connector (IC) used in tandem organic light-emitting diodes (OLEDs), which is composed of an ultrathin MoO₃ interlayer sandwiched between a n-type Cs₂CO₃-doped 4,7-diphenyl-1,10-phenanthroline (BPhen) layer and a p-type MoO₃-doped N,N′-diphenyl-N,N′-bis(1-naphthyl)-(1,1′-biphenyl)-4,4′-diamine (NPB) layer. The charge generation characteristics for light emission in tandem OLEDs have been identified by studying the interfaces and the corresponding devices. The hybrid IC structure exhibits superior charge generation capability, and its interfacial electronic structures are beneficial to the generation and injection of electrons and holes into bottom and top emission units, respectively. Compared to the organic-TMO bilayer and doped p–n junction structures, the hybrid IC structure combining MoO₃-based interlayer and p-type doping can effectively decrease the driving voltage and improve the current efficiency of tandem devices due to the increased bulk heterojunction-like charge generation interfaces. Our results indicate that the TMO-based hybrid IC structure can be a good structure in the fabrication of high-efficiency tandem OLEDs.     

Influence of an impurity profile on the determination of interface states

In order to determine the density of interface states from C(V) curves for high test frequencies, a comparison is made with a computed curve for uniform impurity concentration but identical minimum capacitance. The curves calculated for a doping profile (due, say, to acceptor depletion near the surface of a p-type semiconductor) are assumed to represent the measured C(V) curves of MOS diodes. A number of “charges in interface states” (8 × 10¹⁰ cm^?2 in the given example) are simulated by the impurity profile. This shows that it is not sufficient to introduce a mean effective substrate impurity concentration by adapting the minimum capacitance in the inversion region.The same accordingly applies for the C(V) curves for low test frequencies. The error due to “simulated interface states” is reduced somewhat, but it remains the altered relation between the applied voltage and the surface potential.     

Vertical silicon-on-nothing FET: Threshold voltage calculation using compact capacitance model

The threshold voltage (V_th) model of the novel vertical fully-depleted silicon-on-nothing FET (VFD SONFET) structure is extracted from the compact capacitance equivalent circuit. Due to the absence of the transistor substrate in the VFD SONFET, the channel region is coupled to the source and drain through the buried oxide. Electrostatically, the VFD SONFET resembles the SOI device with thick buried oxide and recessed source/drain, and the developed model can also be applied to these structures. This property is modeled by two-dimensional buried oxide capacitance (C_BOX), which competes for the inversion charge with gate oxide capacitance (C_GOX). Therefore, the V_th is primarily influenced by the ratio of buried and gate oxide capacitances, with the negligible effect of the silicon body equivalent capacitance and the silicon body charge. The relative impact of C_BOX increases with the down-scaling of the effective channel length. In the VFD SONFET structure, the inversion channel can be formed at the back interface of the channel region, due to its coupling to the n⁺ source and drain regions. However, it is shown by the model that the V_th value is minimally changed in this case, due to a small potential change in the silicon channel. The model accurately predicts V_th in comparison to physical simulations, especially in the long channel region, whereas accuracy drops for shorter channels. The maximum absolute deviation is below 50 mV for the channel lengths above 30 nm.     

Intermittent-contact capacitance spectroscopy – A new method for determining C(V) curves with sub-micron lateral resolution

This study introduces a novel method to measure C(V) characteristics of local MOS structures based on scanning probe microscopy (SPM) techniques. The new method operates in intermittent-contact (IC) mode and combines both the advantages of contact mode C(V) spectroscopy and intermittent-contact scanning capacitance microscopy. As a consequence, on the one hand dopant concentration and dopant type can be indicated simultaneously, on the other hand tip wear is reduced significantly.     

Negative capacitance peculiarities in a-Si:H/c-Si rectifier structure

Nontrivial negative capacitance (NC) effect, observed in a-Si:H/c-Si heterostructure devices, is discussed emphasizing the theoretical interpretation of experimental data. To explain NC effect, we have performed dark current voltage (I-V) and admittance measurements (C-V, G-V, C-f and G-f). The calculated values of series resistance (R_s) and barrier height (Φ_Bo) have the values from 100 to 114.7 Ω and 0.94 to 0.83 eV, respectively. Also, below 50% helium dilution rate, diode ideality factor (n) becomes bigger than 2, because tunneling at junction interface plays a major role. The measured room temperature (294 K) dark I-V result has been used during the fitting process for suggested capacitance model (Eq. (18)). The measured NC values exhibit strongly voltage depended behavior. This unexpected behavior is attributed to the presence of inductively coupled space charge region which might possibly be stemmed from the helium diluted a-Si:H material. It is seen that the measured NC values are well fitted with suggested capacitance model (Eq. (18)). Application of suggested correction formula on to experimental C-V data yields satisfactory results. It is shown that the calculated inductance values of the investigated device range from 10 to 42 μH and after correction, NC values are no longer observed in the C_d-V data.     

Modelling of semiconductor diodes made of high defect concentration,irradiated, high resistivity and semi-insulating material: The capacitance–voltage characteristics

Full modelling is reported of the capacitance of a long PIN semiconductor diode with a high concentration of generation–recombination (g–r) centres and different concentrations of deep traps. There are considerable differences from the textbook results given for normal lifetime diodes which have low concentrations of g–r centres. For a low density of g–r centres, the capacitance is the usual value. That is it decreases as V^−1/2 with increasing reverse bias while it increases rapidly with increasing forward bias. For high density of g–r centres and in reverse bias a departure from this voltage dependence is observed, while in forward bias a negative capacitance appears. This agrees with experiment. From these results we present a physical understanding of the processes involved. There are specific applications of these results to radiation damaged devices, lifetime killed diodes and devices made from high resistance and semi-insulating materials, especially in the interpretation of the C–V curves to evaluate the fixed space charge density.     

Low Roll‐Off and High Efficiency Orange Organic Light Emitting Diodes with Controlled Co‐Doping of Green and Red Phosphorescent Dopants in an Exciplex Forming Co‐Host

An exciplex forming co‐host is introduced in order to fabricate orange organic light‐emitting diodes (OLEDs) with high efficiency, low driving voltage and an extremely low efficiency roll‐off, by the co‐doping of green and red emitting phosphorescence dyes in the host. The orange OLEDs achieves a low turn‐on voltage of 2.4 V, which is equivalent to the triplet energy gap of the phosphorescent‐green emitting dopant, and a very high external quantum efficiency (EQE) of 25.0%. Moreover, the OLEDs show low efficiency roll‐off with an EQE of over 21% at 10 000 cdm^?2. The device displays a very good orange color (CIE of (0.501, 0.478) at 1000 cdm^?2) with very little color shift with increasing luminance. The transient electroluminescence of the OLEDs indicate that both energy transfer and direct charge trapping takes place in the devices.     

Investigations of 2.9-GHz Resonant Microwave-Sensitive Ag/MgO/Ge/Ag Tunneling Diodes

In this work, a resonant microwave-sensitive tunneling diode has been designed and investigated. The device, which is composed of a magnesium oxide (MgO) layer on an amorphous germanium (Ge) thin film, was characterized by means of temperature-dependent current (I)–voltage (V), room-temperature differential resistance (R)–voltage, and capacitance (C)–voltage characteristics. The device resonating signal was also tested and evaluated at 2.9 GHz. The I–V curves reflected weak temperature dependence and a wide tunneling region with peak-to-valley current ratio of ～1.1. The negative differential resistance region shifts toward lower biasing voltages as temperature increases. The true operational limit of the device was determined as 350 K. A novel response of the measured R–V and C–V to the incident alternating-current (ac) signal was observed at 300 K. Particularly, the response to a 100-MHz signal power ranging from the standard Bluetooth limit to the maximum output power of third-generation mobile phones reflects a wide range of tunability with discrete switching property at particular power limits. In addition, when the tunnel device was implanted as an amplifier for a 2.90-GHz resonating signal of the power of wireless local-area network (LAN) levels, signal gain of 80% with signal quality factor of 4.6 × 10⁴ was registered. These remarkable properties make devices based on MgO-Ge interfaces suitable as electronic circuit elements for microwave applications, bias- and time-dependent electronic switches, and central processing unit (CPU) clocks.     

Frequency and voltage dependence of negative capacitance in Au/SiO2/n-GaAs structures

The frequency (f) and bias voltage (V) dependence of electrical and dielectric properties of Au/SiO₂/n-GaAs structures have been investigated in the frequency range of 10 kHz–3 MHz at room temperature by considering the presence of series resistance (R_s). The values of R_s, dielectric constant (ε′), dielectric loss (ε″) and dielectric loss tangent (tan δ) of these structures were obtained from capacitance–voltage (C–V) and conductance–voltage (G/ω–V) measurements and these parameters were found to be strong functions of frequency and bias voltage. In the forward bias region, C–V plots show a negative capacitance (NC) behavior, hence ε′–V plots for each frequency value take negative values as well. Such negative values of C correspond to the maximum of the conductance (G/ω). The crosssection of the C–V plots appears as an abnormality when compared to the conventional behavior of ideal Schottky barrier diode (SBD), metal–insulator–semiconductor (MIS) and metal–oxide–semiconductor (MOS) structures. Such behavior of C and ε′ has been explained with the minority-carrier injection and relaxation theory. Experimental results show that the dielectric properties of these structures are quite sensitive to frequency and applied bias voltage especially at low frequencies because of continuous density distribution of interface states and their relaxation time.