Low-power CMOS continuous-time filters

A design technique for low-power continuous-time filters using digital CMOS technology is presented. The basic building block is a fully-balanced integrator with its unity-gain frequency determined by a small-signal transconductance and MOSFET gate capacitance. Integrator excess phase shift is reduced using balanced signal paths, and open-loop gain is increased using low-voltage cascode amplifiers. Two-pole bandpass and five-pole lowpass ladder filters have been implemented in a 1.2 μm n-well CMOS process. The lowpass prototypes provided 300 kHz-1000 kHz bias-current-tunable -3 dB bandwidth, 67 dB dynamic range with 1% total harmonic distortion (THD), and 30 μW/pole (300 kHz bandwidth) power dissipation with a 1.5 V supply; the bandpass prototypes had a tunable center frequency of 300 kHz-1000 kHz, Q of 8.5, and power dissipation of 75 μW/pole (525 kHz center frequency) from a 1.5 V supply. The active filter area was 0.1 mm²/pole for both designs     

CMOS continuous-time current-mode filters for high-frequencyapplications

Design considerations for high-frequency CMOS continuous-time current-mode filters are presented. The basic building block is a differential current integrator with its gain constant set by a small-signal transconductance and a gate capacitance. A prototype fifth-order low-pass ladder filter implemented in a standard digital 2 μm n-well CMOS process achieved a -3 dB cutoff frequency (f ₀) of 42 MHz; f₀ was tunable from 24 to 42 MHZ by varying a reference bias current from 50 to 150 μA. Using a single 5 V power supply with a nominal reference current of 100 μA, the five-pole filter dissipated 25.5 mW. The active filter area was 0.056 mm²/pole. With the minimum input signal defined as the input-referred noise integrated over a 40 MHz bandwidth, and the maximum input signal defined at the 1% total intermodulation distortion (TIMD) level, the measured dynamic range was 69 dB. A third-order elliptic low-pass ladder filter was also integrated in the 2 μm n-well CMOS process to verify the implementation of finite transmission zeros     

Automatic generation of CMOS continuous-time elliptic filters

A procedure for the generation of CMOS, continuous-time, high-frequency g/sub m/-C filters with finite transmission zeros is presented. A third-order elliptic filter with 0.5 dB equiripple passband, 15 MHz cutoff frequency and -23 dB attenuation in the stopband is given as an example. The automatic generation method can be generalised to arbitrary high-order prototypes and higher-frequency filters derived from LC ladders.<>     

Widely programmable high-frequency continuous-time filters indigital CMOS technology

We present design considerations for programmable high-frequency continuous-time filters implemented in standard digital CMOS processes. To reduce area, accumulation MOS capacitors are used as integrating elements. The filter design problem is examined from the viewpoint of programmability. To allow frequency scalability without deterioration of noise performance and of the frequency response shape, we employ a technique called “constant-capacitance scaling,” which assures that even parasitic capacitances remain invariant when transconductors are switched in and out of the filter. This technique is applied to the design of a programmable fourth order Butterworth continuous-time filter with a bandwidth programmable from 60 to 350 MHz implemented in a 0.25-μm digital CMOS process. The filter has a dynamic range of 54 dB, dissipates 70 mW from a 3.3-V supply, and occupies an area of 0.15 mm²     

High-frequency voltage-controlled continuous-time lowpass filter using linearised CMOS integrators

The design and implementation of a continuous-time lowpass filter with voltage-controlled cutoff frequency and passband ripple is presented. The circuit uses a linearised CMOS transconductor as a basic integrating building block. A voltage-controlled phase-adjusting scheme is employed in the integrator to compensate for excess phase in the transconductance at high frequencies. The fabricated filter is capable of realising cutoff frequencies as high as 2 MHz and handles single-ended input signals up to 4 V p-p with less than 1% distortion.     

High-frequency CMOS switched-capacitor filters for communications application

Bandpass filters for communications applications are realized using an 80 MHz differential single-stage CMOS operational amplifier and a fully differential identical-resonator elliptic bandpass ladder filter configuration. Experimental results are given for a CMOS sixth-order 260 kHz elliptic bandpass filter with a Q-factor of 40, a clock frequency of 4 MHz, and a power dissipation of 70 mW.     

A highly linear bulk-driven CMOS OTA for continuous-time filters

In this paper we present a bulk-driven CMOS triode-based fully balanced operational transconductance amplifier (OTA) and its application to continuous-time filters. The proposed OTA is linearly tunable with the feature of low distortion and high output impedance. It can achieve wide input range without compromising large transconductance tuning interval. Using a 0.18 μm n-well CMOS process, we have implemented a third-order elliptic low-pass filter based on the proposed OTA. Both the simulation and measurement results are reported. The total harmonic distortion is more than −45 dB for fully differential input signals of up to 0.8 V peak–peak voltage. A dynamic range of 45 dB is obtained under the OTA noise integrated over 1 MHz.     

The design of CMOS continuous-time VHF current and voltage-modelowpass filters with Q-enhancement circuits

In this paper, very high frequency (VHF) current and voltage biquadratic lowpass filters implemented directly by the linear wideband finite-gain current and voltage amplifiers, respectively, are proposed and analyzed. A new Q-enhancement circuit which consists of a finite-gain wideband tunable voltage amplifier and a Miller capacitor is also proposed. It can increase the maximum-gain frequency f_M, and enhance the maximum-gain quality factor Q_M of the VHF lowpass filters. Experimental results have successfully verified the capability of the proposed new filter implementation method in realizing both VHF current and voltage lowpass filters with maximum-gain frequency f_M tunable in the range of 148 MHz to 92 MHz. It is also shown from experimental results that the VHF current lowpass biquad with the Q-enhancement circuit has the maximum-gain frequency f_M near 185 MHz and the maximum-gain quality factor Q_M up to 18.5. A fourth-order Chebyshev current lowpass filter with the cut-off frequency of 190 MHz has been successfully designed by using the current biquads with Q-enhancement circuits     

Self-tuned continuous-time notch filters

This paper describes self-tuned continuous-time filters. A self-tuned filter in the context of this paper, is one which is being tuned continuously while it is in the system. No switching is involved. Whereas the more common master-slave approach relies on matching of components, the self-tuning approach does not. Consequently, the self-tuning approach promises more precision. Experimental work includes an implementation in 3m CMOS of a filter which operates up to 20 MHz and of a phase-locked loop which performs a self tune of the filter. Simulations and measurements which demonstrate the functionality of the approach are reported.     

On-chip automatic tuning based on amplitude detection and its application in CMOS continuous-time filters

This paper describes the results of investigation of a continuous-time CMOS voltage controlled IC filter using amplitude detectors in the tuning scheme in the form of an amplitude-locked loop. This tuning scheme is used to stabilize the filter characteristics. A prototype 20-kHz fifth-order Chebyshev low-pass filter with 0.1-dB passband ripple was realized to study the performance of the tuning scheme. Voltage controlled integrators were used as building blocks, and the design details of these integrators, whose unity-gain frequency can be varied from 8 to 32 kHz are given. Two amplitude detector circuits—a precision rectifier and an averaging rectifier-were used to test the tuning scheme. The filter cutoff frequency was held within 1% of its room temperature value over the temperature range of 0° to 70°C. All the circuits were fabricated in a standard 3-micron double-metal p-well CMOS process.     

Further improvements in digitizing continuous-time filters

A new method for digitizing a linear continuous-time filter has improved stability characteristics and reduced implementation requirements while retaining the accuracy of the higher order rules recently appearing in the literature. This method approximates the sampled input by a polynomial of degree q fitted to the latest (q+1) samples. The value of q is selected by the designer; values of q up to 14 have been tested successfully. The exact response of the original continuous-time filter to the polynomial input is computed analytically. The method has been formulated using matrices, which lends itself well to machine computation and greatly simplifies the effort needed to obtain numerical results     

基于MOCC的电流模式连续时间滤波器

本文利用多端输出电流传送器MOCC实现电流模式低通滤波器和通用滤波器。所提出的电路结构简单 ,所有无源元件均接地 ,便于CMOS工艺实现。     

Robust high-accuracy high-speed continuous-time CMOS currentcomparator

The authors present a CMOS current comparator which employs nonlinear negative feedback to obtain high-accuracy (down to 1.5 pA) and high-speed for low input currents (8 ns at 50 nA). The new structure features a speed improvement of more than two orders of magnitude for a 1 nA input current, when compared to the fastest reported to date     

CMOS switched-current ladder filters

The design and implementation of switched-current (SI) ladder filters is described. The basic current-mode circuits, including the SI differential integrator/summer are developed. The SI integrator/summer is shown to be directly analogous to the switched-capacitor (SC) integrator/summer; thus, all the synthesis techniques developed for the design of SC filters can be used to synthesize SI filters. Signal flowgraph synthesis of SI ladder filters is presented. The nonideal characteristics of SI ladder filters that limit their accuracy are evaluated. Clock-feedthrough and device mismatch induced errors are more severe in the present SI circuit configurations than in SC circuits. A standard digital 2-μm n-well CMOS process has been used to implement two high-order ladder filters. Simulations accurately predict the measured results of the first integrated SI filters. The area and power dissipation are comparable to those obtained with the switched-capacitor technique     

Correlated double sampling technique for continuous-time filters

A correlated double sampling technique, applicable to continuous-time active-RC filters, is proposed. It provides suppression of DC offset and 1/f noise, and performs gain boosting and level shifting for the opamps used. A biquad lowpass filter is described to demonstrate the application of the technique.     

Digital tuning of high-order high-Q continuous-time filters

A digital tuning scheme for automatic tuning of high-order high-Q continuous-time filters is proposed. The scheme uses phase information for both centre frequency and Q tuning, and does not rely on the relation between the passband gain and Q factor. Digital control of frequency and Q tuning loops improves the stability by enabling only one loop at a given tuning cycle. High-order filter tuning is performed without separating individual sections, eliminating switches and their parasitics     

A novel concept of phase-compensated continuous-time filters

In this paper, we will address the question of how to design a continuous-time filter that provides both a constant delay and a maximally flat magnitude response over the desired frequency band, and at the same time ensures the transient of the designed filter as short as possible. The paper presents a theoretical concept of time-varying Butterworth filters with compensated group delay response. Using the compensated Butterworth filter, we introduce time-varying parameters to its structure for the purpose of the minimization of the transient that was lengthened because of the process of the compensation. Results verifying the effectiveness of the proposed approach are presented and compared to the traditional filters. This paper is an updated and extended version of Piskorowski, J. (2006). Analog Integrated Circuits and Signal Processing, 47, (2):233–241.     

An adaptive analog continuous-time CMOS biquadratic filter

An adaptive analog continuous-time biquadratic filter is realized in a 2-μm digital CMOS process for operation at 300 kHz. The biquad implements the notch, bandpass and low-pass transfer functions. The only parameter adapted is the resonant frequency of the biquad, which is identical to the notch frequency and the bandpass center frequency. The update method is based on a least-means-square algorithm which adapts the notch frequency to minimize the power at the notch filter output. The actual update is modified to reduce the circuit complexity to one biquad and one correlator. When the filter is tracking a sinusoid, this update generates a ripple-free gradient that decreases tracking error. Applications include phase-frequency detectors, FM demodulators (linear and frequency shift keying), clock extractors, and frequency acquisition aids for phase-locked loops and Costas loops. Measured results from experimental prototypes are presented. Nonidealities of an all-analog implementation are discussed, along with suggestions to improve performance     

High-frequency narrow-band single-mode fiber-optic transversal filters

A cascade synthesis procedure for constructing high frequency narrow-band (or high quality factor) single-mode optical fiber transversal filters usingj times j (j geq 2)bidirectional couplers is reported. Design and analysis of the cascade filters are described. Experimental results of many fabricated cascade filters with tap numbers up to 256 and the first-order passband frequencies up to 3.25 GHz are consistent with the mathematical analysis.     

Current-mode integrator for voltage-controllable low frequency continuous-time filters

A novel differential current-mode integrator (CMI) for voltage-controllable low frequency continuous-time filters is presented. An example fifth-order lowpass filter using the proposed CMI and on-chip capacitors was implemented in an AMI 1.2 /spl mu/m CMOS process, and it achieved -3 dB cutoff frequencies ranging from 160 Hz to 5.6 kHz, by changing a single control voltage.