Survey of integrated‐circuit‐oscillator phase‐noise analysis

This tutorial distills the salient phase‐noise analysis concepts and key equations developed over the last 75 years relevant to integrated circuit oscillators. Oscillator phase and amplitude fluctuations have been studied since at least 1938 when Berstein solved the Fokker–Planck equations for the phase/amplitude distributions of a resonant oscillator. The principal contribution of this work is the organized, unified presentation of eclectic phase‐noise analysis techniques, facilitating their application to integrated circuit oscillator design. Furthermore, we demonstrate that all these methods boil down to obtaining three things: (1) noise modulation function; (2) noise transfer function; and (3) current‐controlled oscillator gain. For each method, this paper provides a short background explanation of the technique, a step‐by‐step procedure of how to apply the method to hand calculation/computer simulation, and a worked example to demonstrate how to analyze a practical oscillator circuit with that method. This survey article chiefly deals with phase‐noise analysis methods, so to restrict its scope, we limit our discussion to the following: (1) analyzing integrated circuit metal–oxide–semiconductor/bipolar junction transistor‐based LC, delay, and ring oscillator topologies; (2) considering a few oscillator harmonics in our analysis; (3) analyzing thermal/flicker intrinsic device‐noise sources rather than environmental/parametric noise/wander; (4) providing mainly qualitative amplitude‐noise discussions; and (5) omitting measurement methods/phase‐noise reduction techniques. Copyright © 2013 John Wiley & Sons, Ltd.     

Resistive‐less memcapacitor‐based relaxation oscillator

Recently, the realization of the conventional relaxation oscillators was introduced based on memristors. This paper validates the concept using two series memcapacitors in general which is applicable for a capacitor and memcapacitor as well. Furthermore, the necessary conditions for oscillation are introduced, and a generalized closed‐form expression for the oscillation frequency is derived. Two special cases are introduced and verified using PSPICE simulations showing a perfect matching. Copyright © 2014 John Wiley & Sons, Ltd.     

Universal current‐mode filters and parasitic impedance effects on the filter performances

In this letter, two universal current‐mode (CM) filters for simultaneously realizing low‐pass, band‐pass and high‐pass characteristics are proposed. Both of the presented filters can also realize notch and all‐pass responses with interconnection of the relevant output currents. They employ second‐generation current‐controlled conveyors (CCCIIs) and only grounded capacitors. They also have low active and passive element sensitivities along with electronically adjustable angular resonance frequency (ω₀) and quality factor (Q). Based on the first developed filter, the parasitic impedance effects of the conveyors on the filter performances are investigated in detail. Simulation results using SPICE simulation program are included to verify the theory. Copyright © 2007 John Wiley & Sons, Ltd.     

Basic bifurcation analysis of a hysteresis oscillator

This paper carries out a basic bifurcation analysis of a ‘smooth’ version of a recently proposed piecewise‐linear oscillator based on hysteresis. The analysis is made referring mainly to two circuit parameters particularly easy to vary in a laboratory implementation of the circuit. By resorting to both analytical and numerical analyses, some local and global bifurcations of the dynamics of the oscillator are pointed out. The reported results completely agree with PSPICE simulations and experimental measures. Copyright © 2001 John Wiley & Sons, Ltd.     

A mixed‐mode KHN‐biquad using DVCC and grounded passive elements suitable for direct cascading

In this paper a mixed‐mode (input and output signals can be current or voltage) Kerwin–Huelsman–Newcomb (KHN) biquad with low/high input impedance and high/low output impedance depending on the type of the corresponding signal (current/voltage) is presented. The circuit is constructed using three differential voltage current conveyors (DVCCs), two grounded capacitors and three grounded resistors. The circuit simultaneously provides bandpass (BP), highpass (HP) and lowpass (LP) responses when the output is current and notch, BP and LP responses when the output is voltage. The notch and allpass responses can be obtained by connecting appropriate output currents directly without using additional active elements. Because of the low input and high output impedance of the circuit for current signals and the high input and low output impedance for voltage signals, it can be used in cascade for realizing higher‐order filters. SPICE simulation results are given to verify the theoretical analysis. Copyright © 2008 John Wiley & Sons, Ltd.     

Phase error analysis in CMOS injection‐coupled LC quadrature oscillator (IC‐QO)

This paper presents a novel approach to study the phase error in source injection coupled quadrature oscillators (QOs). Like other LC QOs, the mismatches between LC tanks are the main source of phase error in this oscillator. The QO is analyzed where the phase error and oscillation frequency are derived in terms of circuit parameters. The proposed analysis shows that the output phase error is a function of injection current and the current of source equivalent capacitor. As a result, it is shown that increasing of tail current and LC tank quality factor decreases the phase error. Derived equations show that the phase error can be cancelled and even controlled by adjusting bias currents. To evaluate the proposed analysis and consequent designed QO, a 5.5 GHz CMOS QO is designed and simulated using the practical 0.18 µm TSMC CMOS technology. The experiments show good agreement between analytical equations and simulation results. Copyright © 2013 John Wiley & Sons, Ltd.     

A generalized family of memristor‐based voltage controlled relaxation oscillator

Recently, memristive oscillators are a significant topic in the nonlinear circuit theory where there is a possibility to build relaxation oscillators without existence of reactive elements. In this paper, a family of voltage‐controlled memristor‐based relaxation oscillator including two memristors is presented. The operation of two memristors‐based voltage relaxation oscillator circuits is demonstrated theoretically with the mathematical analysis and with numerical simulations. The generalized expressions for the oscillation frequency and conditions are derived for different cases, where a closed form is introduced for each case. The effect of changing the circuit parameters on the oscillation frequency and conditions is investigated numerically. In addition, the derived equations are verified using several transient PSPICE simulations. The power consumption of each oscillator is obtained numerically and compared with its PSPICE counterpart. Furthermore, controlling the memristive oscillator with a voltage grants the design an extra degree of freedom which increases the design flexibility. The nonlinear exponential model of memristor is employed to prove the oscillation concept. As an application, two examples of voltage‐controlled memristor‐based relaxation oscillator are provided to elaborate the effect of the reference voltage on the output voltage. This voltage‐controlled memristor‐based relaxation oscillator has nano size with storage property that makes it more efficient compared with the conventional one. It would be helpful in many communication applications.     

67 GHz three‐spiral transformer CMOS oscillator

This paper presents a 67GHz LC oscillator exploiting a three‐spiral transformer and implemented in 65nm bulk complementary metal–oxide–semiconductor technology by STMicroelectronics. The three‐spiral transformer allows operating with a lower voltage supply, still obtaining good phase noise performance, and achieving a compact design. Measured performances when supplied with 1.2 V are: oscillation frequency of 67 GHz, phase noise (PN) equal to ?96 dBc/Hz at 1 MHz frequency offset from the carrier, power consumption (P_C) equal to 19.2 mW and figure of merit (FOM) equal to ?179.7 dB/Hz. Measured performances when supplied with 0.6 V are: oscillation frequency of 67 GHz; PN equal to ?88.7 dBc/Hz at a 1 MHz frequency offset from the carrier; P_C equal to 3.6 mW and FOM equal to ?179.7 dB/Hz. Copyright © 2016 John Wiley & Sons, Ltd.     

Adaptive time‐frequency representation for weak chirp signals based on Duffing oscillator stopping oscillation system

To investigate high‐resolution time‐frequency representations for any type of weak chirp signals with a very low signal‐noise ratio, we revisit the inherent deficiencies of conventional Duffing oscillator detection methods and propose a novel Duffing oscillator stopping oscillation detection system. As a result, the detection of chirp signals can be successfully realized, and the influence of nondetection zones and critical thresholds on the detection accuracy is successfully eliminated. Furthermore, we propose an adaptive Duffing oscillator stopping oscillation detection method to measure the instantaneous frequency variation of a highly dynamic chirp signal within a large frequency range. The simulation results indicate that, compared with the conventional Duffing oscillator detection methods and the Choi‐Williams distribution, the proposed method greatly expands the frequency detection range of a single Duffing oscillator and has a lower computing cost and effective real‐time performance in detecting a high‐precision weak chirp signal, which provides a new solution for the time‐frequency representation of weak chirp signals at a lower signal‐noise ration and reveals broad prospects for applications in engineering.     

Mixed‐data multi‐modelling for fault detection and isolation

Early recognition/isolation of a faulty behaviour of a dynamic system is the main task of a fault detection and isolation (FDI). FDI methods based on adaptive probabilistic models with multiple modes represent a theoretically well justified way of solution. Their use is severely restricted by an inherent computational complexity. The complexity problem is addressed here by employing an efficient quasi‐Bayes estimation algorithm. It is directly applicable to the mixture of components created as products of factors belonging to the exponential family. It opens a novel way to deal adaptively with mixed continuous–discrete, dynamically related data. The presented theory and algorithmization are illustrated by a simple simulation example. Copyright © 2001 John Wiley & Sons, Ltd.     

CMOS weak‐inversion log‐domain glycolytic oscillator: a cytomimetic circuit example

This paper presents a 3 V, 1.21μW subthreshold log‐domain circuit which mimics the oscillations observed during the biochemical process of glycolysis due to the phosphofructokinase enzyme. The proposed electronic circuit is able to simulate the dynamics of the glycolytic oscillator and represent the time‐dependent concentration changes of the reactants and the products of the chemical process based on nonlinear differential equations which describe the biological system. By modifying specific circuit parameters, which correspond to certain chemical parameters, good agreement between the biochemical and electrical model results has been reached. The paper details the similarities between the equations that describe the biochemical process and the equations derived from the circuit analysis of a transistor and a source‐connected linear capacitor, a topology also known as the Bernoulli Cell. With the use of the Bernoulli Cell formalism, the chemical equations which describe the biochemical system have been transformed into their electrical equivalents. The analog circuit, which implements the whole process, has been synthesised, and simulation results including Monte Carlo analysis are provided, in order to verify the robustness of the proposed circuit and to compare its dynamics with prototype biological behaviour. Copyright © 2012 John Wiley & Sons, Ltd.     

Four‐segment oscillator circuit for piezoelectric sensing devices

Novel circuit design is proposed for a low‐frequency quartz crystal oscillator circuit that consists of four segments. The characteristics of the negative resistance in a low‐frequency Complementary Metal Oxide Semiconductor (CMOS)‐inverter quartz oscillator were reviewed for the two modes of SC (stress‐compensated) cut mode and the overtone of low‐frequency mode; separation of two modes and suppression of overtone oscillation were demonstrated successfully. Experimental results and an estimate of the absolute value of the negative resistance are presented for the four‐segment oscillator circuit and the conventional Colpitts circuit and two new types of oscillator circuits. © 2011 Institute of Electrical Engineers of Japan. Published by John Wiley & Sons, Inc.     

Frequency–amplitude relations for cross‐coupled voltage‐controlled oscillator

Dependence of frequency on amplitude and control bias is considered for the cross‐coupled voltage‐controlled oscillator. Closed form expressions are derived for frequency of oscillation as a function of amplitude, for positive and negative control bias voltages. Theory of nonlinear ordinary differential equations is utilized to show that the capacitance–voltage relation is the main cause of frequency shift with amplitude. Furthermore, the case of small amplitudes relative to control voltage is analyzed, and a closed form expression is derived for dependence of frequency on amplitude. This relation is then verified using the concept of effective capacitance. The effective capacitance approach is also used to extend the analysis to large voltage swings. Dependence of frequency on tuner control voltage is calculated for both bias polarities. Implications of the aforementioned equations for voltage‐controlled oscillator performance are discussed. Numerical calculations and simulations are used to compare and verify the closed form equations, showing good agreement. Copyright © 2012 John Wiley & Sons, Ltd.     

A three‐phase voltage‐source PWM inverter system characterized by sinusoidal output voltage with neither common‐mode voltage nor normal‐mode voltage

This paper deals with an inverter system integrating a small‐rated passive EMI filter with a three‐phase voltage‐source PWM inverter. The purpose of the EMI filter is to eliminate both common‐mode and normal‐mode voltages from the output voltage of the inverter. The motivation of this research is based on the well‐known fact that the higher the carrier or switching frequency, the smaller and the more effective the EMI filter. An experimental system consisting of a 5‐kVA inverter, a 3.7‐kW induction motor, and a specially designed passive EMI filter was constructed to verify the viability and effectiveness of the EMI filter. As a result, it is shown experimentally that both three‐phase line‐to‐line and line‐to‐neutral output voltages look purely sinusoidal as if the inverter system were an ideal variable‐voltage, variable‐frequency power supply when viewed from the motor terminals. This results in complete solution of serious issues related to common‐mode and normal‐mode voltages produced by the inverter. © 2003 Wiley Periodicals, Inc. Electr Eng Jpn, 145(4): 88–96, 2003; Published online in Wiley InterScience ( www.interscience.wiley.com ). DOI 10.1002/eej.10206     

A family of memristor‐based reactance‐less oscillators

In this paper, we present for the first time a family of memristor‐based reactance‐less oscillators (MRLOs). The proposed oscillators require no reactive components, that is, inductors or capacitors, rather, the ‘resistance storage’ property of memristor is exploited to generate the oscillation. Different types of MRLO family are presented, and for each type, closed form expressions are derived for the oscillation condition, oscillation frequency, and range of oscillation. Derived equations are further verified using transient circuit simulations. A comparison between different MRLO types is also discussed. In addition, detailed fabrication steps of a memristor device and experimental results for the first MRLO physical realization are presented. Copyright © 2013 John Wiley & Sons, Ltd.     

A 5 GHz quadrature relaxation oscillator with mixing for improved testability or compact front‐end implementation

We demonstrate by measurements on a test circuit that a 5 GHz relaxation oscillator with accurate quadrature outputs and low phase‐noise can be obtained, and that these favorable properties can be preserved while the mixing function is performed by this oscillator. This is useful either to measure the quadrature error at a low frequency, or to implement a low‐intermediate frequency (IF) or zero‐IF (homodyne) radio frequency front‐end. Copyright © 2008 John Wiley & Sons, Ltd.     

Design of current‐mode MOSFET‐C filters using OTRAs

In this paper, third‐order current‐mode MOSFET‐C filters that use operational transresistance amplifiers (OTRAs) with little parasitic capacitance effects are presented. On the basis of the proposed systematic method and design procedure, we can efficiently synthesize third‐order active filters with OTRAs along with simplified MOSFET resistor circuits, and all virtually grounded capacitors. Third‐order current‐mode Chebychev low‐pass and high‐pass filters are realized to verify the validity of the theoretical analysis. Experimental results employing commercially available current feedback amplifiers are also given. Copyright © 2008 John Wiley & Sons, Ltd.     

Fast‐scale instability in a PFC boost converter under average current‐mode control

This paper investigates the fast‐scale instability in a power‐factor‐correction (PFC) boost converter under a conventional average current‐mode control. The converter is operated in continuous mode. Computer simulations and theoretical analysis are performed to study the effects of the time‐varying input voltage under the variation of some chosen parameters on the qualitative behaviour of the system. It is found that fast‐scale instability may occur during a line cycle, which can cause distortion to the line current and degrade the practical power factor. The results provide useful information for the design of PFC boost converters to avoid distortion due to fast‐scale bifurcation. Copyright © 2003 John Wiley & Sons, Ltd.     

High‐speed and high‐precision position control using a sliding mode compensator

To achieve high‐speed, high‐precision position control for semiconductor product machines and industrial robots, full‐closed feedback control is applied. Many control methods have been proposed for such a system. In general, proportional position control and proportional plus integral velocity control or integral plus proportional velocity control (P,PI/I‐P), which is a type of proportional plus integral plus differential control (PID), is applied in many industrial applications. However, in the case of changing mechanical characteristics of the control target, the parameters of P,PI/I‐PI control must also change in order to maintain good motion performance. In this paper, we propose a new P,PI/I‐P control method that includes a nonlinear compensator. The algorithm of the nonlinear compensator is based on sliding mode control with chattering compensation. The effectiveness of the proposed control method is evaluated using a full‐closed single‐axis slider system via point‐to‐point control and contour control in the case of changing load. The experimental results indicate that the proposed control method is robust in the case of changing acceleration/deceleration of control reference, changing load, and low‐velocity contour motion. © 2010 Wiley Periodicals, Inc. Electr Eng Jpn, 174(2): 65–71, 2011; Published online in Wiley Online Library ( wileyonlinelibrary.com ). DOI 10.1002/eej.21011