欠奈奎斯特采样在数字接收机中的应用

从理论上讲，为提高侦察接收机的截获概率，接收机的瞬时带宽必须足够宽。接收机的瞬时带宽决定于接收机的ADC采样速率。因此数字接收机必须具备高速的ADC采样速率。这样对接收机的ADC采样器件性能提出了更高的要求。将采样的方法应用于数字接收机中，可以在一定条件下降低采样速率，同时增加接收机的瞬时带宽。提出了一种基于延时和FFT技术的时域欠采样方法，并在阐述简单原理的基础上找出存在的问题及提出改进方案。重点分析了利用延时和非延时2路通道的相位差与入射信号频率之间的关系，进行信号频率的无模糊估计。基于目前硬件实现水平，数字接收机中采用这种欠采样方法是经济可行的方案。     

Quantitative analysis of a new method for real-time generation of SNR estimates for digital phase modulation signals

A new method of estimating the signal-to-noise ratio for M-PSK receivers was presented previously, which derives that estimate from the locked-state value of a new family of carrier lock detectors. A quantitative analysis is undertaken in which it is shown that this method requires significantly less hardware and/or software resources than estimation from the received signal's error rate, is irrespective of the data sequence, and necessitates far fewer symbols in order to arrive at an equally accurate estimate.     

Ka-band direct digital receiver

A new direct-conversion wideband (26-28.5 GHz) six-port receiver is proposed for mass-market wireless communications. This six-port receiver is designed to operate without the need for precise power reading and the use of a digital signal processor that is usually required in other receivers. The proposed receiver architecture is chosen to satisfy requirements of hardware receivers used in high-speed QPSK communications. The receiver contains a receiver front-end, QPSK demodulator, and carrier recovery module. A reverse modulation loop was used to provide a rapid carrier recovery. The maximum bit rate is determined solely by the limiting speed of the baseband module. This new hardware receiver is proposed as a robust, rugged, low-cost receiver for use in wide Ka-band wireless mass-market QPSK communications such as local multipoint distribution system services, which is a prime example of communication equipment requiring such receivers. Bit-error-rate results are presented versus the noise and reference signal phase shift.     

Efficient VLSI Architectures for Multiuser Channel Estimation in Wireless Base-Station Receivers

This paper presents a reduced-complexity, fixed-point algorithm and efficient real-time VLSI architectures for multiuser channel estimation, one of the core baseband processing operations in wireless base-station receivers for CDMA. Future wireless base-station receivers will need to use sophisticated algorithms to support extremely high data rates and multimedia. Current DSP implementations of these algorithms are unable to meet real-time requirements. However, there exists massive parallelism and bit level arithmetic present in these algorithms than can be revealed and efficiently implemented in a VLSI architecture. We re-design an existing channel estimation algorithm from an implementation perspective for a reduced complexity, fixed-point hardware implementation. Fixed point simulations are presented to evaluate the precision requirements of the algorithm. A dependence graph of the algorithm is presented and area-time trade-offs are developed. An area-constrained architecture achieves low data rates with minimum hardware, which may be used in pico-cell base-stations. A time-constrained solution exploits the entire available parallelism and determines the maximum theoretical data processing rates. An area-time efficient architecture meets real-time requirements with minimum area overhead.     

Radio-triggered Wake-ups with Addressing Capabilities for Extremely Low Power Sensor Network Applications

Sensor network applications are generally characterized by long idle durations and intermittent communication patterns. The traffic loads are typically so low that overall idle duration energy consumption dominates. Low duty cycle MAC protocols are used in order to reduce the energy consumption in idle periods. However, lowering the duty cycle value in favour of energy consumption results in increased latency, which makes this approach undesirable for many practical applications. In this paper, we propose Radio Triggered Wake-up with Addressing Capabilities (RTWAC) that allows suppressing the idle duration current consumption. Our solution consists of an external low-cost hardware wake-up circuit attached to the microcontroller of a sensor node. In order to communicate with a sensor node, a special kind of out-of-band modulated wake-up signal is transmitted. The modulated signal contains data that enables to distinguish between differently addressed nodes in order to avoid undesired node wake-ups. Furthermore, we advocate the idea of combining RTWAC to a MAC protocol running on the normal sensor node radio in order to simultaneously achieve low energy consumption and low latency for reliable data communication.     

A pseudo-random asynchronous duty cycle MAC protocol in wireless sensor networks

We propose a pseudo-random asynchronous duty cycle MAC protocol in wireless sensor networks. The proposed protocol adopts a hash function to determine the next wake-up times. As the next wake-up times are known in advance, the sensor nodes do not need to remain active until their intended receivers wake up. Given an end-to-end delay requirement, the proposed protocol significantly decreases energy consumption by reducing the idle listening time.     

Complexities, error probabilities, and capacities of optical OOK-CDMA communication systems

The complexity in the hardware implementation of traditional optical code-division multiple-access correlation receivers with double optical hardlimiters is discussed. A comparison with the implementation of chip-level receivers is presented as well. In addition, the bit error probabilities and the throughput capacities for both chip-level and correlation systems (without hardlimiters) are derived and evaluated under code-correlation constraints equal to one and two. Our results reveal that chip-level receivers are much simpler and their performances are competitive with that of traditional correlation receivers with double optical hardlimiters. Further, the throughput capacity of chip-level systems can be increased by almost a factor of 3.4 when increasing the code-correlation constraint from one to two.     

High definition and high frame rate compatible NTSC broadcasttelevision system

The author proposes a method for terrestrial broadcast and cable transmission of high-definition television with high frame rate in the basic NTSC format using a single 6-MHz channel. The transmitted signal is appropriate for display on present NTSC receivers and generates a wide-screen display on new high-definition receivers with 1500 pixels horizontally on each of 966 lines in a 16:9 or 5:3 aspect ratio format. The author describes a method for motion compensation with receiver verification of motion vector data for the high-resolution monochrome portion of the signal, a method for video data by compression and quadrature modulation of the visual RF carrier. The overall hardware system has not yet been produced as hardware, but some of its components have been built in either hardware or software     

正交鉴相算法及其在瞬时测频接收机中的应用

瞬时测频接收机是现代电子侦察系统的重要组成部分。本文对一种可应用于瞬时测频接收机的正交鉴相算法进行了研究。首先对该算法进行了仿真,然后提出该算法的硬件实现方法,并结合实际器件进行了功能和时序的验证。详述了该算法的实际应用。     

Transmit Antenna Selection with Optimum Combining for Aggregate Interference in Cognitive Underlay Radio Network

Transmit antenna selection (TAS) is most popular technique in underlay cognitive radio (CR) networks as they increase the capacity of secondary users with less hardware requirements. In this paper, a new scenario of CR ad-hoc network topology is proposed in which apart from primary users, there are multiple number of secondary users which are assumed to be distributed as homogeneous spatial Poisson point process (PPP) and are trying to use the primary spectrum in underlay mode. These multiple secondary transmitters generate the aggregate interference and can degrade the performance of secondary receiver. Here this aggregate interference is estimated and its impact on performance of secondary receiver under unconstrained mode of operation is presented. Further, to enhance the performance of secondary receivers in this scenario, single TAS technique based on maximizing the received signal to interference noise ratio by using optimum combining (OC) method is proposed. Furthermore, in this work the design of end to end Simulink based environment for secondary trans–receiver system with advancements in channel design and estimation is proposed. The bit error rate (BER) analysis is presented and verified for image data for single TAS-OC technique for unconstrained mode in underlay CR network in Rician fading channel. The BER performance is also presented for different number of secondary interference sources which are located at fixed distance in one case and they are assumed to be distributed as PPP in another case.     

WCDMA 移动终端用RAKE接收机结构与实现

针对WCDMAFDD下行链路,提出了一种接收机结构。与传统接收机不同,该结构是根据多径来拉动(延时)输入信号,即根据多径把各径的信号延时对齐,而本地码的相位只需一个,来对多径支路解扩,并直接合并输出。该结构可进一步通过串行方法实现,大大减少硬件资源。由于采用全硬件技术,因此,便于ASIC集成。     

干涉式被动亚毫米波成像系统

干涉式辐射计通过多通道间的相关运算得到被动亮温图像。对于亚毫米波段(submillimeter-wave, SMMW)相关运算对硬件系统的精度与相位稳定性提出了很高的要求。本文中,通过特殊设计的高精度SMMW器件,实现了一套基于二单元干涉仪的干涉式辐射计系统。针对该系统的自身特点,作者提出了点源目标响应定标方法来降低系统误差。系统完成后,分别进行了干涉条纹实验和点源目标成像实验。经测试,系统的线性相位误差小于2°,角分辨率优于0.57°。系统实测性能和理论分析结果一致。以上研究为今后设计高分辨率亚毫米波干涉式成像辐射计提供了重要的参考价值。     

A continuous-time IR-UWB RAKE receiver for coherent symbol detection

The ultra-wide bandwidth released for unlicensed use by FCC a decade ago has initiated significant research efforts. The large ultra-wide bandwidth is attractive not only for increased data transfer speed but may also be exploited for added functionality like high-precision ranging in wireless sensor networks. RAKE based receivers are preferred for ultra-wideband (UWB) technology due to wide bandwidth. However, designing RAKE based correlating receivers remains quite challenging. Correlating receivers are also power consuming due to high-speed DSPs, ADC and matched filter. Timing synchronization is another issue associated with correlating receivers. In this paper a impulse radio ultra-wideband (IR-UWB) RAKE receiver is presented utilizing a continuous-time binary value coding scheme for power-efficiency and coherent symbol detection without the need for synchronization to achieve precise ranging using time-of-flight technique. A working prototype of the IR ranging transceiver which uses the IR-UWB RAKE receiver is presented with measured high-precision ranging towards 1.4 cm.     

Optimizing the power-sensitivity trade-off in TRF receivers

There is an inevitable trade-off between the sensitivity of an RF receiver and its total power consumption, meaning that in order to design a receiver with a high sensitivity, more power must be dissipated. Ultra-low power receivers in general and wake-up receivers in particular require a sensitivity of better than ?70 dBm while the power consumption should be as low as possible at the same time. Therefore, obtaining an optimum point where these two design specifications are met is of great interest. In this work, we present a design methodology for the tuned radio frequency (TRF) receiver topology, which yields an optimum power-sensitivity product for given design parameters. The most interesting outcome of this study is finding an optimum number of amplifier stages at the front-end of the receiver that leads to a minimum power-sensitivity product. It is shown through analytical/graphical approach in Matlab that the optimum number of stages resulting in the minimum power-sensitivity product can be different from the optimum number of amplifier stages leading to the maximum overall gain-bandwidth product. These results are also verified through circuit-level simulation with Cadence Spectre for practical design parameters. According to our study, the minimum power-sensitivity product occurs for a two-stage amplifier with moderate gain at the front-end of the TRF receiver.     

Design of a DVB-T/H COFDM Receiver for Portable Video Applications [Topics in Circuits for Communications]

Mobile video services have generated a lot of interest recently. To reach a cost-effective solution, design trade-offs among system performance, hardware complexity, and power consumption must be considered in the early design phase of such applications. In this article, we present a system overview, simulation platform, and hardware design of a DVB-T/H baseband receiver. Starting with a design platform, several algorithms on both inner and outer receivers are developed to meet target system performance under different channels. Then, system architecture and related key modules are explored, taking into account both silicon area and power consumption. Finally, several design issues related to the integration of the proposed DVB-T/H inner and outer receivers are addressed.     

基于光栅传感器位移测量的软、硬件设计

提出了一种基于AT89C51单片机开发的光栅位移传感器对线性位移进行测量的方法。其硬件设计包括数据采集、辨向、数据处理和数据显示。把读数头输出的信号(脉冲电信号)，经过硬件电路辨向，送入计数器8253计数，利用AT89C51单片机进行信号处理，最终转换成实际的线性位移值显示出来。与其他系统相比，他的硬件电路简单，并能实现较高的位移测量精度。     

Seismic borehole tomography—Measurement system and field studies

A system for seismic tomographic measurements is presented, and both hardware and software are described. The system is intended to operate in the distance range 100-1000 m. An explosive source is used to generate signals which are picked up by receivers at the surface and in boreholes. Tomographic results from two field experiments are presented. The first experiment concerns mapping of an ore body in a mine, whereas the second concerns rock quality determination.     

基于比特平面的快速中值滤波器设计与实现

提出基于比特平面的快速中值滤波算法硬件实现结构和核心处理电路,在减少了中值滤波电路面积的情况下,显著提高了处理速度.提出的比特平面算法硬件实现结构的面积与滤波数据长度和量化比特教成近似线性关系,适于各种滤波窗口大小和数据精度的中值滤波;算法硬件实现结构规则,特别适于用FPGA实现.     

MOS-only complex filter design for dual-band GNSS receivers

In this paper, the use of MOS-only active filters in the implementation of area-effective low-IF image reject filters is discussed. For this purpose, complex filter design procedure is considered regarding MOS-only filter realization techniques and a new second-order filter topology which favors filter’s area-effective implementation is proposed. Owing to the presented approach, a new complex image-reject filter with reduced chip area, which can be used in dual-band GNSS receivers, is obtained. Issues related to IQ imbalance are briefly discussed and a calibration imbalance circuit is proposed. By virtue of the current-mode design technique, the IQ imbalance circuit is embedded with the complex filter, simplifying the system topology. In order to illustrate the feasibility of the filter, post-layout simulation results of a fourth-order Butterworth-type image reject filter designed for dual-band GNSS receivers are provided using SPECTRE simulation tool in CADENCE design environment.     

Correction of Mismatches in a Time-Interleaved Analog-to-Digital Converter in an Adaptively Equalized Digital Communication Receiver

In this paper, techniques to overcome the errors caused by the offset, gain, sample-time, and bandwidth mismatches among time-interleaved analog-to-digital converters in a high-speed baseband digital communication receiver are presented. The errors introduced by these mismatches are corrected using least-mean-square adaptation implemented in digital-signal-processing blocks. Gain, sample-time, and bandwidth mismatches are corrected by modifying the operation of the adaptive receive equalizer itself to minimize the hardware overhead. Simulation results show that the gain, offset, sample-time, and bandwidth mismatches are sufficiently corrected for practical digital communication receivers.