基于精确时延模型考虑缓冲器插入的互连线优化算法

随着VLSI电路集成度增大和特征尺寸的不断减小,连线的寄生效应不可忽略,互连线的时延在电路总时延中占了很大的比例,成为决定电路性能的主要因素.在互连时延的优化技术中,缓冲器插入是最有效的减小连线时延的方法.本文提出了一个在精确时延模型下,在布线区域内给定一些可行的缓冲器插入位置,对两端线网进行拓扑优化,并同时插入缓冲器以优化时延的多项式时间实现内的算法.我们的算法不但可以实现时延的最小化,也可以在满足时延约束的条件下,最小化缓冲器的插入数目,从而避免不必要的面积和功耗的浪费.     

一种包含热效应的InP DHBT大信号模型及其Verilog-A实现

A large signal model for InP/InGaAs double heterojunction bipolar transistors including thermal effects has been reported,which demonstrated good agreements of simulations with measurements.On the basis of the previous model in which the double heterojunction effect,current blocking effect and high current effect in current expression are considered,the effect of bandgap narrowing with temperature has been considered in transport current while a formula for model parameters as a function of temperature has been developed.This model is implemented by Verilog-A and embedded in ADS.The proposed model is verified with DC and large signal measurements.     

一种基于目标延迟约束缓冲器插入的互连优化模型

基于分布式RLC传输线,提出在互连延迟满足目标延迟的条件下,利用拉格朗日函数改变插入缓冲器数目与尺寸来减小互连功耗和面积的优化模型. 在65nm CMOS工艺下,对两组不同类型的互连线进行计算比较,验证该模型在改善互连功耗与面积方面的优点. 此模型更适合全局互连线的优化,而且互连线越长,优化效果越明显,能够应用于纳米级SOC的计算机辅助设计和集成电路优化设计.     

一种基于目标延迟约束缓冲器插入的互连优化模型

基于分布式RLC传输线,提出在互连延迟满足日标延迟的条件下,利用托格朗日函数改变插入缓冲器数目与尺寸来减小互连功耗和面积的优化模型.在65nm CMOS工艺下,对两组不同类型的互连线进行计算比较,验证该模型在改善互连功耗与面积方面的优点.此模碰更适合全局瓦连线的优化,而且互连线越长,优化效果越明显,能够应用于纳米级SoC的计算机辅助设计和集成电路优化设计.     

一种考虑自热效应的AlGaN/GaN HEMT大信号模型

当AlGaN/GaN HEMT输出高功率密度时,器件沟道温度的升高将引起电流的下降(自热效应).提出了一种针对AlGaN/GaN HEMT改进的大信号等效电路模型,考虑了HEMT自热效应,建立了一种改进的大信号I-V特性模型,仿真结果与测试结果符合较好,提高了大信号模型的精度.     

一种考虑MOS效应及频变特性的类传输线型锥形TSV通孔电学模型

为准确描述锥形TSV通孔寄生电阻、电容、电感高频下MOS效应及其频变特性,本文首先推导出了锥形TSV通孔压控MOS电容的解析模型。其次基于修正后的双传输线寄生参数提取公式对锥形TSV通孔内寄生参数进行了提取。最终建立了一种考虑MOS效应及频变特性的类传输线型锥形TSV通孔电学模型。通过仿真工具验证模型精度,结果显示：在100GHz频带内模型与仿真结果吻合度较高,可以准确描述高频下锥形TSV通孔内寄生参数的半导体物理特性及频变特性,可用来预测锥形TSV通孔的电学特性,对优化三维集成电路电学性能有一定指导意义。     

Numerical analysis of the self-heating effect in SGOI with a double step buried oxide

To reduce the self-heating effect of strained Si grown on relaxed SiGe-on-insulator(SGOI) n-type metal-oxide-semiconductor field-effect transistors(nMOSFETs),this paper proposes a novel device called double step buried oxide(BOX) SGOI,investigates its electrical and thermal characteristics,and analyzes the effect of self-heating on its electrical parameters.During the simulation of the device,a low field mobility model for strained Si MOSFETs is established and reduced thermal conductivity resulting from phonon boundary scattering is considered.A comparative study of SGOI nMOSFETs with different BOX thicknesses under channel and different channel strains has been performed.By reducing moderately the BOX thickness under the channel,the channel temperature caused by the self-heating effect can be effectively reduced.Moreover,mobility degradation,off state current and a short-channel effect such as drain induced barrier lowering can be well suppressed.Therefore,SGOI MOSFETs with a thinner BOX under the channel can improve the overall performance and long-term reliability efficiently.     

双台阶式埋氧SGOI自加热效应的数值研究

To reduce the self-heating effect of strained Si grown on relaxed SiGe-on-insulator(SGOI) n-type metal-oxide-semiconductor field-effect transistors(nMOSFETs),this paper proposes a novel device called double step buried oxide(BOX) SGOI,investigates its electrical and thermal characteristics,and analyzes the effect of self-heating on its electrical parameters.During the simulation of the device,a low field mobility model for strained Si MOSFETs is established and reduced thermal conductivity resulting from...     

一种电迁移测试失效时间判定方法

采用铜大马士革工艺制备了用于电迁移测试的样品,对电迁移测试过程中存在的两类电阻-时间(R-t)特征曲线进行了研究.研究发现采用固定电阻变化率作为失效判定标准所得的失效时间分布曲线不能真实地反映样品的实际寿命,而采用第一次阻值跳变点对应的时间作为失效时间所得的分布曲线则更符合电迁移理论.针对两种失效判定方法所得到的不同结果进行了机理分析,结果表明,采用第一次阻值跳变点对应的时间作为失效时间分析电迁移失效更合理.