一种分数阶微分IIR滤波器的设计方法和改进

提出一种在不增加分数阶微分滤波器复杂度的前提下,能有效提高分数阶微分滤波器性能的方法.该方法利用几种基于典型微分算子的分数阶微分滤波器之间的互补性,通过相互内插结合的方式,用于提高IIR分数阶数字滤波器的性能.改进后的分数阶微分滤波器频率响应更接近理想分数阶微分滤波器,表明所提方法的有效性.     

一种分数阶巴特沃斯滤波器的有源电路设计

本文将分数阶的低通滤波器的传递函数通式近似设计为Butterworth滤波器,在确定阶数与截止频率之后计算得到传递函数的系数.继而,本文通过该传递函数设计电路,进行仿真并电路实现.本文设计的电路在任意阶数下都只需要修改小部分元件便可得到预计截止频率,具有很强的灵活性,方便对比研究各阶分数滤波器.     

新的分数阶混沌系统及其同步控制

研究了一个新的分数阶系统的混沌动力学行为.基于分数阶微积分理论和数值模拟,发现在该新的分数阶系统中存在混沌,并且得出该分数阶系统能产生混沌吸引子的最低阶数为2.49阶.根据分数阶动力系统稳定性理论,通过设计非线性控制器,实现了新的分数阶混沌系统的投影同步,该方法设计简便,并且不需要计算Lyapunov指数,数值模拟结果验证了该同步方法的有效性.     

分数阶微积分的一种物理解释和定域长分数阶微积分

本文讨论了现有的三种分数阶微积分基本定义(R-L(Riemann-Liouville)定义、G-L(Grumwald-Letnkov)定义和Caputo定义)对阶数的适用范围,以及三者之间的关系;强调指出分数阶导数与整数阶导数之间的区别.通过对分数阶微积分一个统一公式的讨论,以及给出分数阶微积分一个简单的物理解释,加深对分数阶微积分本质的认识;提出定域长分数阶微积分定义,给出它的直接数值算法,预期它可能在实践中得到应用.     

三维医学图像的混合噪声去除方法

针对医学图像在采集传输等过程中易受噪声污染,且目前多数去噪方法对混合噪声去噪效果不好,影响三维重构精度的问题,提出了基于自适应三维分数阶积分和中值滤波结合的混合噪声去除方法。首先介绍了几种传统方法在去除混合噪声中的不足,然后基于三维图像梯度信息提出了三维分数阶积分的自适应分数阶阶数,利用分数阶积分和中值滤波的各自优点,将两者结合对混合噪声去噪,并提出了基于混合去噪的边缘曲面追踪算法。实验结果和数据分析表明,提出的混合去噪方法能够从噪声污染的医学图像切片中追踪出高精度边缘曲面,与传统去噪方法相比,具有更好的去噪效果。     

一种新的分数阶混沌系统研究

为了提高混沌信号的复杂性,提出一个新的分数阶混沌系统.介绍两种分数阶微积分的分析方法,时域求解法对其进行数值仿真;时频域转换法对其进行电路仿真.数值仿真结果表明,系统存在混沌的最低阶数是2.31.设计该系统的分数阶混沌振荡电路,电路仿真与数值仿真结果相符,证实了该分数阶混沌振荡电路的可行性.     

基于分数阶Fourier变换的图像加密算法

针对目前基于分数阶傅里叶变换的图像加密算法中存在的不足,设计了一种基于分数阶傅里叶变换和混沌系统的图像加密新算法。该方案的安全性依赖于随机混沌图像、分数阶傅里叶变换阶数以及混沌系统的初始参数。理论分析和模拟实验结果表明该方案具有良好的图像加密效果。     

分数阶混沌系统的DSP Builder设计方法

为了克服模拟电路分数阶混沌系统设计易受外界条件影响,提出了一种基于DSP Builder设计分数阶混沌系统的方法.以分数阶Jerk系统为例,采用一种数字差分算法设计混沌系统,分析了分数阶混沌系统的动力学特性.仿真结果表明,分数阶混沌系统的DSP Builder设计方法是一种有效的分析方法,这为分数阶混沌系统的数字设计提供了新的思路.     

分数导数与数字微分器设计

从信号处理角度来考察分数阶导数和微分问题.首先论述分数阶微积分的基本概念,评论分数阶导数的几种典型定义,并重点探讨分数阶导数的频域定义及其基本性质.紧接着详细研究分数阶微分的实现:理想分数阶数字微分滤波器和FIR分数阶数字微分滤波的基本性质和设计问题,并提出分数阶微分滤波器设计中遇到的新问题以及奇对称微分滤波器、偶对称微分滤波器等新概念.最后给出一些值得进一步探讨的有趣问题.     

分数阶傅立叶变换在球面谐振腔稳定性分析中的应用

用光学传输矩阵的方法分析用球面镜实现分数阶傅立叶变换,指出球面谐振腔中的谐振过程也是分数阶傅立叶变换过程,进而推导出腔的几何尺寸与变换阶数对应的分析方程,给出了谐振腔稳定性的判据.最后分析了几个谐振腔,并指出了引入此方法的意义.     

Design of digital FIR variable fractional order integrator and differentiator

This paper presents an easy and simple method to design variable fractional order digital FIR integrators and differentiators based on fractional order systems. First, closed-form digital IIR fractional order integrators and differentiators have been obtained from the analog rational functions approximations, in a given frequency band, of the fractional order integrator s ^?m and differentiator s ^m (0?<?m?<?1) through the Tustin generating function. Then, closed-form digital FIR fractional order integrators and differentiators by truncation of the digital IIR ones have been derived. Next, polynomial interpolation has been used to design digital FIR variable fractional order integrators and differentiators that can be implemented by the Farrow structure. The main feature of variable fractional order operator is that its order can be changed without re-designing a new fractional order operator. Some examples have been presented through the paper to illustrate the performance and the effectiveness of the proposed design method. The results obtained have been discussed and have been compared to one of the most recent works in the literature using the same design parameters.     

Implementation of switched capacitor fractional order differentiator (PDδ) circuit

This paper proposes a novel implementation of switched capacitor (SC) fractional order differentiators (FOD) based on Tustin operator and Al-Alaoui operator. The existing models of half differentiator s ^1/2 have been expanded using continued fraction expansion and implemented using PSpice. The PSpice simulation results are compared with the theoretical results in the continuous time domain. The results validate the effectiveness of the SC circuit implementation of the proposed approach. A detailed analysis of the influence of the non-idealities of the third order Al-Alaoui operator based half differentiator is performed. The analytical expressions for errors in magnitude and phase due to the above mentioned non-idealities have been derived for the SC integrator and amplifier circuits used in our realisation.     

分数阶数字FIR微分器的快速WSLD设计算法

一阶逼近格林瓦尔-莱特尼科夫(G-L)加权系数的计算具有准确快速的递推公式,而高阶逼近鲁比希加权系数的求解则复杂度高,计算消耗时间长。本文通过傅里叶变换证明了鲁比希算子的逼近阶,并基于移位鲁比希算子提出一类四阶逼近的加权移位鲁比希差分(WSLD)算子。从数字信号处理角度分析WSLD算子滤波特性,设计基于WSLD算子的分数阶数字FIR微分滤波器并进行数值仿真验证。对比Al-Alaoui、鲁比希2种典型分数阶算子,结果表明,利用WSLD算子求解分数阶数字FIR滤波器滤波系数的算法简单、高效,且相对其他算子能有效减小吉布斯效应影响。     

New improved fractional order integrators using PSO optimisation

This article investigates the optimal results of new improved fractional order integrators (FOIs) of different orders. Mathematical models of FOIs have been first developed by a single-step procedure of direct linear interpolation of fractional integrators based on Al-Alaoui operator in fractional domain itself, instead of using three steps of the well-known conventional method, namely, digital interpolation, series expansion and truncation. Later, these transfer functions (TFs) are optimised for their coefficient values for finding a minimum error function by particle swarm optimisation (PSO) algorithm. Simulation results of magnitude responses, phase responses and relative magnitude errors (dB) for all the proposed half integrators have validated the effectiveness of this new technique of interpolation of fractional order operators, mixed with PSO algorithm. A parallel comparison has been also drawn between the proposed optimised half integrators and those obtained by discretisation of PSO optimised integer order digital integrators (DIs) to properly support the proposed novel combination of interpolation and PSO, both applied together in fractional domain.     

Novel Approach to Analog-to-Digital Transforms

A novel approach to analog-to-digital transforms, s-to-z transforms, is presented. The approach applies the Boxer-Thaler expansion to a leaky differentiator or to a leaky integrator instead of an ideal differentiator or integrator. The bilinear (Tustin) and the matched pole-zero (MPZ) transformation are special realizations of the new transforms, with an additional built-in prewarping and additional built-in zero placement, respectively. Examples are presented that demonstrate the viability of the approach where the proposed method is compared with the least-squares, bilinear (Tustin), and MPZ transformations     

分数阶微分在图像纹理增强中的应用

为了实现对模糊图像边缘及纹理的增强,使图像的细节信息更加清晰,需要对图像进行锐化增强。现有的增强方法一般是整数阶微分锐化及高通滤波,由于这些方法的处理效果仍不理想,文中引入了分数阶微分算子。分数阶微分不仅可以很好地增强图像的边缘和纹理信息,还可以保留平滑区域信息,抑制较大噪声。研究并分析了Tiansi分数阶微分算子的原理及特点,并对其进行了改进,提出了一种新的分数阶微分算子,可以更好地增强图像的边缘和纹理信息,同时保证图像的亮度不产生大幅度变化,而且可以抑制较小噪声的影响。从定量的角度分析,改进的分数阶微分算子的平均梯度最大可比原图像提高3.8倍。从而验证了改进的分数阶微分算子比整数阶微分算子如Laplace算子及Tiansi分数阶微分算子具有优越性,且算法简单易于实现,可应用于工程中的实时图像处理系统中。     

Digital IIR Integrator Design Using Richardson Extrapolation and Fractional Delay

In this paper, a new design of digital integrator is investigated. First, the trapezoidal integration rule and differential equation are applied to derive the transfer function of the digital integrator. The Richardson extrapolation is then used to generate high-accuracy results while using low-order formulas. Next, the conventional Lagrange finite-impulse response fractional delay filter is directly applied to implement the designed integrator. Two implementation structures are studied: direct substitution and polyphase decomposition. Finally, numerical comparisons with conventional digital integrators are made to demonstrate the effectiveness of this new design approach.      

Improved design of digital fractional-order differentiators using fractional sample delay

In this paper, a digital fractional-order differentiator (FOD) is designed by using fractional sample delay. To improve the design accuracy of conventional fractional differencing and Tustin design methods at high frequency regions, the integer delay is replaced by fractional sample delay. By using the well-documented finite-impulse-response Lagrange, infinite impulse response allpass, and Farrow fractional delay filters, the proposed FOD can be implemented easily even though the fractional sample delay is introduced. Several design examples are illustrated to demonstrate the effectiveness of the proposed method.     

Digital integrator design using Simpson rule and fractional delay filter

The IIR digital integrator is designed by using the Simpson integration rule and fractional delay filter. To improve the design accuracy of a conventional Simpson IIR integrator at high frequency, the sampling interval is reduced from T to 0.5T. As a result, a fractional delay filter needed to be designed in the proposed Simpson integrator. However, this problem can be solved easily by applying well-documented design techniques of the FIR and all-pass fractional delay filters. Several design examples are illustrated to demonstrate the effectiveness of the proposed method.     

DCT域基于分数低阶矩的数字图像水印检测

提出了离散余弦变换(DCT)域基于分数低阶统计量(FLOM)水印检测器设计的理论推导和实验证明.DCT域水印检测的传统作法分析与研究实验表明,本文方法更适合数字图像水印处理的实际应用,约束条件更为宽泛,与对照方案相比,水印提取失真率降低了7.6%,且适用对象更具一般性.