Characterization and Modeling of RF-Performance $(f_{T})$ Fluctuation in MOSFETs

The fluctuation of RF performance (particularly for $f_{T}$ : cutoff frequency) in the transistors fabricated by 90-nm CMOS technology has been investigated. The modeling for $f_{T}$ fluctuation is well fitted with the measurement data within approximately 1% error. Low-$V_{t}$ transistors (fabricated by lower doping concentration in the channel) show higher $f_{T}$ fluctuation than normal transistors. Such a higher $f_{T}$ fluctuation results from $C_{rm gg}$ (total gate capacitance) variation rather than $g_{m}$ variation. More detailed analysis shows that $C_{rm gs} + C_{rm gb}$ (charges in the channel and the bulk) are predominant factors over $C_{rm gd}$ (charges in LDD/halo region) to determine $C_{rm gg}$ fluctuation.      

AlN/GaN Insulated-Gate HEMTs With 2.3 A/mm Output Current and 480 mS/mm Transconductance

High-electron mobility transistors (HEMTs) based on ultrathin AlN/GaN heterostructures with a 3.5-nm AlN barrier and a 3-nm $hbox{Al}_{2}hbox{O}_{3}$ gate dielectric have been investigated. Owing to the optimized AlN/GaN interface, very high carrier mobility $(sim!!hbox{1400} hbox{cm}^{2}/hbox{V}cdothbox{s})$ and high 2-D electron-gas density $(sim!!kern1pthbox{2.7} times hbox{10}^{13} /hbox{cm}^{2})$ resulted in a record low sheet resistance $(sim !!hbox{165} Omega/hbox{sq})$. The resultant HEMTs showed a maximum dc output current density of $simkern1pt$2.3 A/mm and a peak extrinsic transconductance $g_{m,{rm ext}} sim hbox{480} hbox{mS/mm}$ (corresponding to $g_{m,{rm int}} sim hbox{1} hbox{S/mm}$). An $f_{T}/f_{max}$ of 52/60 GHz was measured on $hbox{0.25} times hbox{60} muhbox{m}^{2}$ gate HEMTs. With further improvements of the ohmic contacts, the gate dielectric, and the lowering of the buffer leakage, the presented results suggest that, by using AlN/GaN heterojunctions, it may be possible to push the performance of nitride HEMTs to current, power, and speed levels that are currently unachievable in AlGaN/GaN technology.      

Extraction of the Effective Mobility of $ hbox{In}_{0.53}hbox{Ga}_{0.47}hbox{As}$ MOSFETs

The extraction of the effective mobility on $hbox{In}_{0.53} hbox{Ga}_{0.47}hbox{As}$ metal–oxide–semiconductor field-effect transistors (MOSFETs) is studied and shown to be greater than 3600 $hbox{cm}^{2}/hbox{V} cdot hbox{s}$. The removal of $C_{rm it}$ response in the split $C$–$V$ measurement of these devices is crucial to the accurate analysis of these devices. Low-temperature split $C$–$V$ can be used to freeze out the $D_{rm it}$ response to the ac signal but maintain its effect on the free carrier density through the substrate potential. Simulations that match this low-temperature data can then be “warmed up” to room temperature and an accurate measure of $Q_{rm inv}$ is achieved. These results confirm the fundamental performance advantages of $hbox{In}_{0.53}hbox{Ga}_{0.47}hbox{As}$ MOSFETs.      

Breakdown Enhancement of AlGaN/GaN HEMTs on 4-in Silicon by Improving the GaN Quality on Thick Buffer Layers

We have achieved a 9- $muhbox{m}$-thick AlGaN/GaN high-electron mobility transistor (HEMT) epilayer on silicon using thick buffer layers with reduced dislocation density $(D_{D})$. The crack-free 9- $muhbox{m}$-thick epilayer included 2- $muhbox{m}$ i-GaN and 7- $ muhbox{m}$ buffer. The HEMTs fabricated on these devices showed a maximum drain–current density of 625 mA/mm, transconductance of 190 mS/mm, and a high three-terminal OFF breakdown of 403 V for device dimensions of $L_{g}/W_{g}/L_{rm gd} = hbox{1.5/15/3} muhbox{m}$ . Without using a gate field plate, this is the highest $BV$ reported on an AlGaN/GaN HEMT on silicon for a short $L_{rm gd}$ of 3 $muhbox{m}$. A very high $BV$ of 1813 V across 10- $mu hbox{m}$ ohmic gap was achieved for i-GaN grown on thick buffers. As the thickness of buffer layers increased, the decreased $D_{D}$ of GaN and increased resistance between surface electrode and substrate yielded a high breakdown.      

Performance Improvement of N-Type $hbox{TiO}_{x}$ Active-Channel TFTs Grown by Low-Temperature Plasma-Enhanced ALD

We report on performance improvement of $n$-type oxide–semiconductor thin-film transistors (TFTs) based on $hbox{TiO}_{x}$ active channels grown at 250 $^{circ}hbox{C}$ by plasma-enhanced atomic layer deposition. TFTs with as-grown $hbox{TiO}_{x}$ films exhibited the saturation mobility $(mu_{rm sat})$ as high as 3.2 $hbox{cm}^{2}/hbox{V}cdothbox{s}$ but suffered from the low on–off ratio $(I_{rm ON}/I_{rm OFF})$ of $hbox{2.0} times hbox{10}^{2}$. $hbox{N}_{2}hbox{O}$ plasma treatment was then attempted to improve $I_{rm ON}/I_{rm OFF}$. Upon treatment, the $hbox{TiO}_{x}$ TFTs exhibited $I_{rm ON}/I_{rm OFF}$ of $hbox{4.7} times hbox{10}^{5}$ and $mu_{rm sat}$ of 1.64 $hbox{cm}^{2}/hbox{V}cdothbox{s}$, showing a much improved performance balance and, thus, demonstrating their potentials for a wide variety of applications such as backplane technology in active-matrix displays and radio-frequency identification tags.      

Gate-Recess Technology for InAs/AlSb HEMTs

The gate-recess technology for Si $delta$-doped InAs/AlSb high-electron-mobility transistors (HEMTs) has been investigated by combining atomic force microscopy (AFM) inspection of the gate-recess versus time with electrical device characterization. Deposition of the gate metal on the $hbox{In}_{0.5}hbox{Al}_{0.5}hbox{As}$ protection layer or on the underlying AlSb Schottky layer resulted in devices suffering from high gate-leakage current. Superior dc and high frequency device performance were obtained for HEMTs with an insulating layer between the gate and the Schottky layer resulting in a reduction of the gate leakage current $I_{G}$ by more than two orders of magnitude at a drain-to-source voltage $V_{DS}$ of 0.1 V. The existence of this intermediate insulating layer was evident from the electrical measurements. AFM measurements suggested that the insulating layer was due to a native oxidation of the AlSb Schottky layer. The insulated-gate HEMT with a gate length of 225 nm exhibited a maximum drain current $I_{D}$ higher than 500 mA/mm with good pinchoff characteristics, a dc transconductance $g_{m}$ of 1300 mS/mm, and extrinsic values for cutoff frequency $f_{T}$ and maximum frequency of oscillation $f_{max}$ of 160 and 120 GHz, respectively.      

A 2.4-GHz Resistive Feedback LNA in 0.13-$mu$m CMOS

A $g_{m}$-boosted resistive feedback low-noise amplifier (LNA) using a series inductor matching network and its application to a 2.4 GHz LNA is presented. While keeping the advantage of easy and reliable input matching of a resistive feedback topology, it takes an extra advantage of $g_{m}$ -boosting as in inductively degenerated topology. The gain of the LNA increases by the $Q$ -factor of the series RLC input network, and its noise figure (NF) is reduced by a similar factor. By exploiting the $g_{m}$-boosting property, the proposed fully integrated LNA achieves a noise figure of 2.0 dB, S21 of 24 dB, and IIP3 of ${- 11}~ hbox{dBm}$ while consuming 2.6 mW from a 1.2 V supply, and occupies 0.6 ${hbox {mm}}^{2}$ in 0.13-$mu{hbox {m}}$ CMOS, which provides the best figure of merit. This paper also includes an LNA of the same topology with an external input matching network which has an NF of 1.2 dB.      

High-Performance 0.1-$muhbox{m}$ Gate AlGaN/GaN HEMTs on Silicon With Low-Noise Figure at 20 GHz

The realization of high-performance 0.1-$muhbox{m}$ gate AlGaN/GaN high-electron mobility transistors (HEMTs) grown on high-resistivity silicon substrates is reported. Our devices feature cutoff frequencies as high as $f_{T} = hbox{75} hbox{GHz}$ and $f_{rm MAX} = hbox{125} hbox{GHz}$, the highest values reported so far for AlGaN/GaN HEMTs on silicon. The microwave noise performance is competitive with results achieved on other substrate types, such as sapphire and silicon carbide, with a noise figure $F = hbox{1.2}{-}hbox{1.3} hbox{dB}$ and an associated gain $G_{rm ass} = hbox{8.0}{-}hbox{9.5} hbox{dB}$ at 20 GHz. This performance demonstrates that GaN-on-silicon technology is a viable alternative for low-cost millimeter-wave applications.      

First Internal Spacers' Introduction in Record High $I_{rm ON}/I_{rm OFF} hbox{TiN/HfO}_{2}$ Gate Multichannel MOSFET Satisfying Both High-Performance and Low Standby Power Requirements

For the first time, internal spacers have been introduced in multichannel CMOSFET (MCFET) structures, featuring a decrease of the intrinsic $CV/I$ delay by 39%. The process steps introduced for this new MCFET technological option are studied and optimized in order to achieve excellent $I_{rm ON}/I_{rm OFF}$ characteristics (NMOS: 2.33 $hbox{mA}/muhbox{m}$ at 27 $hbox{pA}/muhbox{m}$ and PMOS: 1.52 $hbox{mA}/muhbox{m}$ at 38 $hbox{pA}/muhbox{m}$). A gate capacitance $C_{rm gg}$ reduction of 32% is measured, thanks to $S$-parameter extraction. Moreover, a significant improvement of the analogical figure of merit is measured compared with optimized fully depleted silicon-on-insulator planar reference; the voltage gain $A_{rm VI}(= g_{m}/g_{rm ds})$ is improved by 92%.      

An Analytical Method to Extract the Physical Parameters of a Solar Cell From Four Points on the Illuminated $J{-}V$ Curve

For a variety of solar cells, it is shown that the single exponential $J{-}V$ model parameters, namely—ideality factor $eta$ , parasitic series resistance $R_{s}$, parasitic shunt resistance $R_{rm sh}$, dark current $J_{0}$, and photogenerated current $J_{rm ph}$ can be extracted simultaneously from just four simple measurements of the bias points corresponding to $V_{rm oc}$, $sim!hbox{0.6}V_{rm oc}$, $J_{rm sc}$, and $sim! hbox{0.6}J_{rm sc}$ on the illuminated $J{-}V$ curve, using closed-form expressions. The extraction method avoids the measurements of the peak power point and any $dJ/dV$ (i.e., slope). The method is based on the power law $J{-}V$ model proposed recently by us.      

N-Channel MOSFETs With Embedded Silicon–Carbon Source/Drain Stressors Formed Using Cluster-Carbon Implant and Excimer-Laser-Induced Solid Phase Epitaxy

In this letter, we report the use of a novel cluster-carbon $(hbox{C}_{7} hbox{H}_{7}^{+})$ implant and pulsed-excimer-laser-induced solid-phase-epitaxy technique to form embedded silicon–carbon (Si:C) source/drain (S/D) stressors. A substitutional carbon concentration $C_{rm sub}$ of $sim$ 1.1% was obtained in this letter. N-channel MOSFETs (n-FETs) integrated with embedded silicon–carbon (Si:C) S/D stressors formed using the novel cluster-carbon implant and pulsed-laser-anneal technique demonstrate improvement in current drive of 14% over control n-FETs formed with Si preamorphization implant. $I_{rm OFF}{-}I_{rm DSAT}$ comparison shows a 15% $I_{rm DSAT}$ enhancement for n-FETs with embedded Si:C S/D at an $I_{rm OFF} = hbox{1} hbox{nA}/muhbox{m}$ despite a slightly higher series resistance.      

Q-Band pHEMT and mHEMT Subharmonic Gilbert Upconversion Mixers

This letter makes a comparison between Q-band 0.15 $mu{rm m}$ pseudomorphic high electron mobility transistor (pHEMT) and metamorphic high electron mobility transistor (mHEMT) stacked-LO subharmonic upconversion mixers in terms of gain, isolation and linearity. In general, a 0.15 $mu{rm m}$ mHEMT device has a higher transconductance and cutoff frequency than a 0.15 $mu{rm m}$ pHEMT does. Thus, the conversion gain of the mHEMT is higher than that of the pHEMT in the active Gilbert mixer design. The Q-band stacked-LO subharmonic upconversion mixers using the pHEMT and mHEMT technologies have conversion gain of $-$7.1 dB and $-$0.2 dB, respectively. The pHEMT upconversion mixer has an ${rm OIP}_{3}$ of $-$12 dBm and an ${rm OP}_{1 {rm dB}}$ of $-$24 dBm, while the mHEMT one shows a 4 dB improvement on linearity for the difference between the ${rm OIP}_{3}$ and ${rm OP}_{1 {rm dB}}$. Both the chip sizes are the same at 1.3 mm $times$ 0.9 mm.      

Demonstration of Tunneling FETs Based on Highly Scalable Vertical Silicon Nanowires

This letter demonstrates a vertical silicon-nanowire (SiNW)-based tunneling field-effect transistor (TFET) using CMOS-compatible technology. With a $hbox{Si} hbox{p}^{+}{-}hbox{i}{-} hbox{n}^{+}$ tunneling junction, the TFET with a gate length of $sim$200 nm exhibits good subthreshold swing of $sim$ 70 mV/dec, superior drain-induced-barrier-lowering of $sim$ 17 mV/V, and excellent $I_{rm on} {-} I_{rm off}$ ratio of $sim!!hbox{10}^{7}$ with a low $I_{rm off} (sim!!hbox{7} hbox{pA}/muhbox{m})$. The obtained 53 $muhbox{A}/muhbox{m} I_{rm on}$ can be further enhanced with heterostructures at the tunneling interface. The vertical SiNW-based TFET is proposed to be an excellent candidate for ultralow power and high-density applications.      

Schottky Barrier Height Modulation of Nickel–Dysprosium-Alloy Germanosilicide Contacts for Strained P-FinFETs

This letter reports on the fabrication and hole Schottky barrier $(Phi_{ rm B}^{rm p})$ modulation of a novel nickel (Ni)–dysprosium (Dy)-alloy germanosilicide (NiDySiGe) on silicon–germanium (SiGe). Aluminum (Al) implant is utilized to lower the $Phi_{rm B}^{rm p}$ of NiDySiGe from $sim$0.5 to $sim$ 0.12 eV, with a correspondingly increasing Al dose in the range of $ hbox{0}$–$hbox{2}timeshbox{10}^{15} hbox{atoms}/ hbox{cm}^{2}$. When integrated as the contact silicide in p-FinFETs (with SiGe source/drain), NiDySiGe with an Al implant dose of $hbox{2}timeshbox{10}^{14} hbox{atoms}/ hbox{cm}^{2}$ leads to 32% enhancement in $I_{rm DSAT}$ over p-FinFETs with conventional NiSiGe contacts. Ni–Dy-alloy silicide is a promising single silicide solution for series-resistance reduction in CMOS FinFETs.      

High Microwave-Noise Performance of AlGaN/GaN MISHEMTs on Silicon With Gate Insulator Grown by ALD

High microwave-noise performance is realized in AlGaN/GaN metal–insulator semiconductor high-electron mobility transistors (MISHEMTs) on high-resistivity silicon substrate using atomic-layer-deposited (ALD) $hbox{Al}_{2}hbox{O}_{3}$ as gate insulator. The ALD $hbox{Al}_{2}hbox{O}_{3}/hbox{AlGaN/GaN}$ MISHEMT with a 0.25- $muhbox{m}$ gate length shows excellent microwave small signal and noise performance. A high current-gain cutoff frequency $f_{T}$ of 40 GHz and maximum oscillation frequency $f_{max}$ of 76 GHz were achieved. At 10 GHz, the device exhibits low minimum-noise figure $(hbox{NF}_{min})$ of 1.0 dB together with high associate gain $(G_{a})$ of 10.5 dB and low equivalent noise resistance $(R_{n})$ of 29.2 $Omega$. This is believed to be the first report of a 0.25-$muhbox{m}$ gate-length GaN MISHEMT on silicon with such microwave-noise performance. These results indicate that the AlGaN/GaN MISHEMT with ALD $hbox{Al}_{2}hbox{O}_{3}$ gate insulator on high-resistivity Si substrate is suitable for microwave low-noise applications.      

A Light-Impact Model for p-Type and n-Type Poly-Si TFTs

This paper introduces and verifies a new light-impact model (LIM) for both p-type and n-type polycrystalline thin-film transistors (poly-Si TFTs). The ratio of the produced current under a specific light intensity $(I_{d})$ over the dark current $(I_{rm dark})$ is calculated. The new model has been also implemented in the circuit simulation program HSPICE. Comparative results between measurements and simulated characteristics are presented for different sizes of widths/lengths, different values of the $V_{rm ds}$ and $V_{rm gs}$ voltages and of light intensities.      

2 MHz AO $Q$ -switched ${rm TEM}_{00}$ Grazing Incidence Laser With 3 at.% Neodymium Doped Nd:YVO$_{4}$

We present a detailed experimental and theoretical study of the ultrahigh repetition rate AO $Q$ -switched ${rm TEM}_{00}$ grazing incidence laser. Up to 2.1 MHz $Q$-switching with ${rm TEM}_{00}$ output of 8.6 W and 2.2 MHz $Q$ -switching with multimode output of 10 W were achieved by using an acousto-optics $Q$ -switched grazing-incidence laser with optimum grazing-incidence angle and cavity configuration. The crystal was 3 at.% neodymium doped Nd:YVO$_{4}$ slab. The pulse duration at 2 MHz repetition rate was about 31 ns. The instabilities of pulse energy at 2 MHz repetition rate were less than ${pm}6.7hbox{%}$ with ${rm TEM}_{00}$ operation and ${pm}3.3hbox{%}$ with multimode operation respectively. The modeling of high repetition rate $Q$-switched operation is presented based on the rate equation, and with the solution of the modeling, higher pump power, smaller section area of laser mode, and larger stimulated emission cross section of the gain medium are beneficial to the $Q$-switched operation with ultrahigh repetition rate, which is in consistent with the experimental results.      

Integrated Hydrogen-Sensing Amplifier With GaAs Schottky-Type Diode and InGaP–GaAs Heterojunction Bipolar Transistor

New hydrogen-sensing amplifiers are fabricated by integrating a GaAs Schottky-type hydrogen sensor and an InGaP–GaAs heterojunction bipolar transistor. Sensing collector currents ( $I_{rm CN}$ and $I_{rm CH}$) reflecting to $hbox{N}_{2}$ and hydrogen-containing gases are employed as output signals in common-emitter characteristics. Gummel-plot sensing characteristics with testing gases as inputs show a high sensing-collector-current gain $(I_{rm CH}/I_{rm CN})$ of $≫hbox{3000}$. When operating in standby mode for in situ long-term detection, power consumption is smaller than 0.4 $muhbox{W}$. Furthermore, the room-temperature response time is 85 s for the integrated hydrogen-sensing amplifier fabricated with a bipolar-type structure.      

Impacts of $hbox{N}_{2}$ and $hbox{NH}_{3}$ Plasma Surface Treatments on High-Performance LTPS-TFT With High-$kappa$ Gate Dielectric

Low-temperature polycrystalline-silicon thin-film transistors (LTPS-TFTs) with high- $kappa$ gate dielectrics and plasma surface treatments are demonstrated for the first time. Significant field-effect mobility $mu_{rm FE}$ improvements of $sim$86.0% and 112.5% are observed for LTPS-TFTs with $hbox{HfO}_{2}$ gate dielectric after $hbox{N}_{2}$ and $ hbox{NH}_{3}$ plasma surface treatments, respectively. In addition, the $hbox{N}_{2}$ and $ hbox{NH}_{3}$ plasma surface treatments can also reduce surface roughness scattering to enhance the field-effect mobility $mu_{rm FE}$ at high gate bias voltage $V_{G}$, resulting in 217.0% and 219.6% improvements in driving current, respectively. As a result, high-performance LTPS-TFT with low threshold voltage $V_{rm TH} sim hbox{0.33} hbox{V}$, excellent subthreshold swing S.S. $sim$0.156 V/decade, and high field-effect mobility $mu_{rm FE} sim hbox{62.02} hbox{cm}^{2}/hbox{V} cdot hbox{s}$ would be suitable for the application of system-on-panel.      

Work-Function Engineering for 32-nm-Node pMOS Devices: High-Performance TaCNO-Gated Films

We have demonstrated p-type field effect transistors (p-FETs) devices using a TaCNO metal gate for the first time. These p-FETs have threshold voltage values of $-$ 0.4 and $-$ 0.25 V for HfSiON and HfSiO gate dielectrics, respectively, with equivalent oxide thickness of 1.6–1.7 nm. The TaCNO metal shows a high effective work function (eWF) of 4.89 eV on thick $hbox{SiO}_{2}$ interface layer, although the eWF rolls off with reducing EOT. Excellent transistor characteristics are achieved, with $I_{rm on}$ of $hbox{375} muhbox{A}/muhbox{m}$ at $I_{rm off} = hbox{60 nA}$, for $V_{rm dd} = hbox{1.1} hbox{V}$ .