一种基于偏移源的频率合成技术分析

针对一种基于偏移源的频率合成技术,建立了锁相环(PLL)线性模型,对相位噪声和杂散信号性能进行分析。从分析结果看,在锁相环反馈支路中使用一个偏移源将压控振荡器(VCO)输出信号下混频至一个较低的中频,从而将锁相环的环路分频比大大降低,使改善后的锁相环噪底达到-135 dBc/Hz。介绍了偏移源和主环的关键合成技术,结合工程应用设计的基于偏移源的C频段频率合成器,相位噪声偏离载波10 kHz处≤-99 dBc/Hz,偏离载波100 kHz处≤-116 dBc/Hz,杂散小于-70 dBc。     

Phase Noise in Millimeter Wave Phase-Locked Loop with Mixer

In order to estimate the phase noise of millimetre wave (MMW) phase-locked oscillator (PLO), the phase noise relation of signals in MMW phase-locked loop (PLL) with frequency conversion is analyzed. The signals include output of MMW PLO, intermediate frequency (IF) output of harmonic mixer and output of microwave oscillator serving as local oscillator (LO). A method to estimate the phase noise of MMW PLO is presented, which is based on the phase noise of LO and IF. At the same time, a W-band PLO is achieved, and the phase noise values of the three signals are measured. It is shown that the experimental result is well coincident with the analysis of phase noise relation.     

Novel multireceiver communication systems configurations based onoptimal estimation theory

A multireceiver configuration for the purpose of carrier arraying and/or signal arraying is presented. The configuration is arrived at by formulating the carrier and/or signal arraying problem as an optimal estimation problem and consists of two stages. The first stage optimally estimates various phase processes received at different receivers with coupled phase-locked loops, (PLL) wherein the individual PLLs acquire and track their respective receivers' phase processes but are aided by each other in an optimal manner via low-frequency error signals. The coupled PLL estimator is followed by a linear or nonlinear combining of the quadrature-phase components of the mixers from various receivers for the purpose of data detection. The proposed configuration results in the minimization of the effective radio loss as the combiner output and thus maximization of energy per bit to noise power spectral density ratio is achieved. An adaptive algorithm for the estimator of the signal model parameters when these are not known a priori is also presented     

双音频率合成器的设计与实现

研究了一种输出双音信号、低相位噪声、低杂散的频率合成方法.该方法首先利用锁相环路分别产生两路信号,并通过优化设计环路滤波器改善输出信号相位噪声,进而利用设计的Wilkinson功率合成器将两路信号进行功率合成,并通过衰减和放大来控制双音信号功率.基于本方法研制实现的输出双音频率为2 015和2 020 MHz的频率合成器,输出功率范围-12～18 dBm,且连续可调,输出信号相位噪声优于-93 dBc/Hz@1 kHz,在输出功率4 dBm以下时,双音互调成分低于-50 dBc,可用于各种测试系统频率源,尤其便于对非线性系统的测试.     

The Theory of Operation of an Equal-Gain Predetection Regenerative Diversity Combiner with Rayleigh Fading Channels

The theory of operation of an equal-gain predetection diversity combiner employing the Granlund technique of utilizing a combination of feedback and feedforward is presented. It is shown that the time delays of the filters and the loop phase shifts uniquely determine the operating frequencies within the system. The random FM at the discriminator output is shown to be a weighted sum of that on the input signals, and an upper limit for additional random FM caused by phase-shift error between the loops is derived. At the combiner output, the noise is found to be the sum of the uncorrelated noise from each input channel while the carrier amplitude of the diversity signal is the sum of the carrier amplitudes of the input signals after being cophased.     

脉冲射频调制器的工程实现

介绍了锁相调频的基本原理,用锁相调频的射频直接调制方法实现了脉冲信号的低抖动传输。用ADI公司的ADF4360-2产生载波,将脉冲信号预调后输入到VCO的调谐端,以实现对载波的调制;用Si Lab的Si4133产生本振信号,与调频波进行混频,混频后的低中频信号经过滤波、放大后输出到室外设备。实验结果表明,这种方法可以实现对脉冲信号的低抖动调制,解调后的脉冲信号3σ抖动小于20 ns,满足了设计要求。     

一种新的多通道扩频接收机中频噪声模拟算法

该文提出了一种新的多通道直接序列扩频接收机中频回波噪声模拟算法。该算法将通道间扩频信号互相关的影响等效为噪声叠加,由此提出了一种新的适用于多通道直接序列扩频信号合成并保证输出功率恒定的比例因子计算方法,并将该方法成功应用于某多通道直接序列扩频接收机的中频回波噪声模拟中。实验结果表明利用该方法产生的中频信号信噪比模拟精度远优于传统的实现方法。     

Estimating and interpreting the instantaneous frequency of asignal. II. Algorithms and applications

For pt.I see ibid., vol.80, no.4, p.520-38 (1992). The concept of instantaneous frequency (IF) is extended to discrete-time signals. The specific problem explored is that of estimating the IF of frequency-modulated (FM) discrete-time signals embedded in Gaussian noise. Well-established methods for estimating the IF include differentiation of the phase and smoothing thereof, adaptive frequency estimation techniques such as the phase locked loop (PLL), and extraction of the peak from time-varying spectral representations. More recently, methods based on a modeling of the signal phase as a polynomial have been introduced. These methods are reviewed, and their performance compared on both simulated and real data. Guidelines are given as to which estimation method should be used for a given signal class and signal-to-noise ratio (SNR)     

超宽带信号的产生及光纤传输的研究

提出了一种新的超宽带(UWB)脉冲产生的方法,并对其产生的数学原理进行了分析和实验验证。经过高斯信号调制的偏振控制器(PC)可以产生两个相位互补的相位调制信号,先通过PC调节两个正交的相位调制信号的静态相移,再经过偏振分束器(DBS)检偏后可以得到两路相位互补的高斯信号或二阶高斯信号,最后将这两路信号延时然后再经过偏振合路器(PBC)就可以分别得到一阶或三阶高斯信号。由于这3种脉冲的产生方式不同,频带宽度不同,在光纤中传输时对色散的容忍度也不一样,因此仿真分析了色散对这3种UWB信号传输特性的影响,得出了三阶高斯信号最适合UWB传输。     

Impact of phase noise in weakly coherent systems: a new andaccurate approach

Coherent optical systems for future broadband local loops may use lasers with significant phase noise, manifest as broad linewidths. This phase noise can be accommodated if the receiver is correctly designed, i.e. if nonsynchronous (envelope or square-law) IF demodulation is used and sufficient IF bandwidth is provided. It is difficult to analyze the performance of a coherent optical receiver when the signals are corrupted by phase noise. The central theoretical problem arising from filtering a signal with phase noise is defined in a particular form which permits the derivation of the forward or Fokker-Planck partial differential equation for probability density of the output voltage of the receiver. The results are used to discuss the IF bandwidth required for optical heterodyne receivers for amplitude-shift-keying (ASK) signals     

锁相环设计中的功率分配与分频器配置方法

针对锁相环频率合成器工程设计中的问题,对锁相环参考频率输入端的馈电电路提出改进措施,增强了锁相环参考频率信号的输入功率,为提高相位噪声性能创造了有利条件。对传统的VCO输出T型电阻功率分配网络进行改进,减小了因功率过多分配给锁相环反馈支路所造成的损失,最大限度地把VCO的功率分配给端口负载。并给出了锁相环频率合成器在多频点和单频点信号输出时分频器的通用配置方法。实验验证该理论分析和设计方法的正确性。     

Comprehensive Behavioral Modeling of Conventional and Dual-Tuning PLLs

This paper presents a modular and comprehensive nonlinear time-domain behavioral model for phase-locked loops (PLLs) that are suitable for analyzing the impact on the output signal of the noise contribution and nonidealities of the constituent building blocks. The model building blocks are described by Simulink submodels and can be configured to implement different PLL topologies. Postprocessing of the PLL output provides the PLL phase noise and spur-to-carrier-ratio performances. The calculated phase-noise spectra are compared with those obtained with the well-known linear model and with measurements. To show the flexibility of this approach, many case studies are reported; among them, the analysis of the spurs due to charge pump mismatch and the transient phase noise, and spurs performances of a PLL featuring a dual control of the voltage-controlled oscillator.      

Phase-Lock Loop Characteristics in the Presence of Nonwhite Noise for Bandpass Types of Modulating Spectra

In this concise paper the phase-lock loop (PLL) steady state characteristics for bandpass types of modulating spectra are determined. The usual assumption that the intermediate frequency (IF) bandwidth is wide compared with PLL bandwidth is not made. The characteristics are determined from measurements on an experimental system and from theoretical calculations using a quasi-linear model (QLM) of the PLL. Experimental data are compared to theoretical data to determine the accuracy of the QLM over the PLL parameter space. The experimental results are used to provide design data and to arrive at conclusions concerning threshold, multiplier output variance, phase error variance, output signal-to-noise ratio, and signal distortion.     

Noise performance of frequency- and phase-locked CW magnetrons operated as current-controlled oscillators

Low-power continuous wave "cooker" magnetrons driven from industrial-quality switch-mode power supplies have been frequency locked by driving them as current-controlled oscillators in a phase-lock loop (PLL). The noise performance of these frequency-locked oscillators is reported as a function of heater power. The injection of -30- to -40dB signals derived from the reference oscillator of the PLL into the magnetron's output waveguide while the anode current is controlled by the PLL is shown to phase lock the magnetron's output. Results for locking performance are presented.     

基于ADF4360-7的宽带雷达信号源设计

通过分析数字直接合成技术(DDS)和锁相环技术(PLL)的各自性能特点,介绍了一种采用DDS输出的低频段线性调频信号作为PLL激励源的方案来产生高频段线性调频信号,并指出了设计中需要注意的事项。在该系统中采用AD I公司新推出的芯片ADF4360-7芯片设计锁相环路,ADF4360系列芯片内部集成了VCO,这是ADF4360的一大新的特点。通过该系统实现的宽带雷达信号作为UHF雷达的信号源,其输出频率范围为590.769 MHz~609.231 MHz。     

A fully integrated V-band PLL MMIC using 0.15-/spl mu/m GaAs pHEMT technology

A fully integrated V-band phase-locked loop (PLL) MMIC with good phase noise and low-power consumption is developed using 0.15-/spl mu/m GaAs pHEMTs. For V-band frequency division,a wideband divide-by-3 frequency divider is proposed using cascode FET-based harmonic injection locking. The fourth subharmonic mixer using anti-parallel diode pair is employed as a high-frequency phase detector. In this way, the required frequency of the reference oscillator is lowered to one twelfth of V-band output signal. An RC low-pass filter and DC amplifier are also integrated to effectively suppress the spurious and harmonic signals, and to increase the loop gain. To reduce the circuit interactions and frequency pulling effect, buffer amplifiers are used at the output of VCO and frequency divider. The fabricated V-band PLL MMIC shows the locking range of 840 MHz around 60.1GHz under a very low power dissipation of 370 mW. Good phase noise of -95.5 dBc/Hz is measured at 100 kHz offset. The chip size is as small as 2.35/spl times/1.80 mm/sup 2/. To the best of our knowledge, the PLL MMIC of this work is one of the highest frequency monolithic PLLs that integrates all the required elements on a single chip.     

Partially coherent DS-SS performance in frequency selectivemultipath fading

The bit-error rate (BER) performance of a direct sequence spread spectrum (DS-SS) signal, operating over a multipath Rayleigh fading channel, is investigated when corrupted by phase noise as well as additive white Gaussian noise (AWGN). The phase noise arises from phase locked loop (PLL) dynamics and results in imperfect receiver phase estimates whereby the phase errors assume Tikhonov densities. The phase estimates are used by a multipath-combining RAKE receiver for demodulation. Approximate upper-bounds on the bit error probability are obtained and evaluated for different combinations of channel parameters and for various values of the average loop signal-to-noise ratio (SNR). Results indicate that for a PLL with loop SNR 10 dB above the system E _b/η₀, the degradation is less than 3 dB, and for a loop SNR of 20 dB above E_b/η₀, the degradation is less than 1 dB     

Sensor-array data processing for multiple-signal sources

Techniques are considered for processing the outputs of a sensor array that is observingJdistinct signal sources. Three types of wideband signals are discussed: unknown, stochastic, and parameterized. Narrowband signals are a special case. Four types of random errors are discussed: additive sensor noise, sensor gain errors, sensor time-delay errors, and "beam-pointing' errors. It is concluded that the so-called decoupled-beam data processor is a very promising technique, which can be implemented by passing the output ofJindividual "beams" through aJ-input,J-output linear system. When sensor gain-delay and beam-pointing errors are not present, the decoupled-beam data processor provides "infinite sidelobe rejection."     

一种新型非线性PLL模型及其在毫米波集成防撞雷达中的应用

提出了一种新的非线性PLL用于VCO的非线性补偿,利用声表面波延迟线来实现延时混频,并将混频后的中频信号锁定PLL结构,深入分析了这种PLL的环路相位模型,使用Agilent ADS软件对锁相环路进行了仿真,验证了所提出的环路相位模型的准确性,所有的理论推导和仿真结果表明,建立的PLL环路相位模型可以用来实现防撞雷达中VCO(电压控制振荡器)的线性化,准确可靠,利于雷达系统的集成化和高精度。