EMI滤波器特性分析

文中给出了一般EMI滤波器的拓扑结构,分别指出其共模和差模等效电路,并对共模和差模等效电路进行化简。且分别对共模和差模电路中电容大小与插损的关系以及共模,差模电路两端输入输出阻抗与插损的关系作了仿真分析。结果表明,共模电容越大,插入损耗越大;共模滤波器两端的阻抗越小,插入损耗越大;差模电容越大,插入损耗越大;差模滤波器两端阻抗越大,插入损耗越大。     

EMI电源滤波器的插入损耗分析

在一般EMI滤波器的共模和差模等效电路的基础上,分析了源阻抗和负载阻抗对滤波器插入损耗的影响.提出了共模插入损耗和差模插入损耗的计算方法,推导了滤波器插入损耗与阻抗关系的表达式,并且对这一关系作了仿真分析,仿真结果验证了理论计算和分析的正确性.     

2013 IEEE EMC国际学术研讨会——最佳学生论文

描述了混合动力车高压牵引系统内部线路滤波器的阻抗特性,并确定了逆变器的共模和差模输入阻抗。将受试设备与逆变器组合用电压源建模,对集总元件网络进行仿真。最终给出了阻抗变化对一阶低通滤波器衰减作用的影响。     

传导噪声分析技术在滤波器中的应用

传导发射是电磁兼容设计中的重要问题之一。为了满足标准中对传导发射限制的要求,通常使用EMI滤波器来抑制电子产品产生的传导噪声。快速选择或者设计一个满足需要的滤波器是解决问题的关键。传导噪声分析技术包括共模噪声、差模噪声分析,共模阻抗、差模阻抗分析,这是滤波器设计的基础。     

基于自组织迁移算法的共模扼流圈高频特性建模

共模扼流圈是EMI滤波器的关键组件，主要用于传导干扰中的共模电流抑制。为了便于EMI滤波器抗干扰特性的仿真研究，提出了一种共模扼流圈的高频特性建模方法。首先，利用矢量网络分析仪测量共模扼流圈的共模与差模阻抗数据。然后，使用自组织迁移算法分频段处理共模扼流圈的阻抗数据，提取出仿真模型的RLC参数，结果表明利用算法分频段处理阻抗数据的方法，既使得所建立高频模型具有较高的精确度，也降低了对高性能计算机需求。最后，对一款共模扼流圈高频特性进行了建模，并通过仿真与实测的阻抗数据对比，验证了建模方法的有效性，为EMI滤波器的仿真与设计提供了参考。     

互连线上的浪涌抗扰度测试试验介绍及分析

简要介绍了互连线浪涌抗扰度试验的过程,针对有关标准中介绍的测试方法及试验中耦合去耦网络类型的选择进行了说明。最后从实际测试的角度出发,对互连线浪涌抗扰度试验中共模与差模的选择及阻抗配置提出了一些建议。     

一种具有可重构陷波功能的差分宽带带通滤波器

文章提出了一种具有陷波可重构功能的差分宽带带通滤波器,具有良好的差模响应与共模抑制效果。所设计的差分带通滤波器通过采用对称的四阶分支线结构,在差模激励下可等效出电壁,在共模激励下可等效出磁壁。同时,该滤波器通过对称地耦合两个1/4波长的阶梯阻抗谐振器来产生所需频段的陷波特性,并通过改变阶梯阻抗谐振器上变容二极管两端的直流偏置电压来改变阶梯阻抗谐振器的电长度,从而调整陷波的频段。仿真和测试结果表明该差分带通滤波器的工作频带为2.7~7.3 GHz,相对阻抗带宽为92%。在工作频段中,差模回波损耗均大于10 dB,共模抑制大于15 dB。随着变容二极管两端直流控制电压从10.3 V变化到3.6 V,陷波的中心频率从5.6 GHz移动到6.1 GHz,同时滤波器宽带带通特性基本保持不变。     

强耦合发射阵的电磁兼容分析

对于强耦合有源相控阵,其阵中单元存在共模和差模两种辐射模式,为减小共模辐射对发射系统的 干扰,本文从奇偶模理论出发,对阵中单元天线的辐射模式进行分解,得到与发射系统输出相关的奇模阻抗和奇模 辐射功率,其意义在于实现了强耦合阵列端口两种有源阻抗分离,从而为单元端口匹配提供了理论支持;本文最终 以3伊3 强耦合阵为例,用一种180毅混合巴伦对耦合天线奇、偶模进行物理分解,并进行了阻抗匹配设计,实验结果表 明,该方法有效降低了系统中的共模干扰,对一般有源阵列电磁兼容分析及工程应用具有参考意义。     

一种新的基于共模扼流圈传导干扰模态分离网络

测试传导性干扰的模态噪声,是设计电磁干扰(EMI)滤波器的前提条件。共模扼流圈能够抑制共模模态,而不影响差模电流的输出。根据共模扼流圈这一特点,设计一种由两个共模扼流圈为核心的共模/差模分离网络,实现共模电压和差模电压的同时输出。仿真结果表明,在150 kHz³0 MHz的测试频带,输入端口阻抗基本在50Ω,并且共模传递比(CMTR)、差模抑制比(DMRR)、差模传递比(DMTR)及共模抑制比(CMRR)四个结果显示了该分离网络的良好模态分离效果。     

反射式低通EMI滤波器工程制造

介绍了各种电源的反射式低通EMI滤波器源阻抗和各种负载阻抗的技术构成和性能特点,对共模滤波器元件和差模滤波器元件工程制造分别提出了要求,并给出了实例。     

Spice equivalent circuit of a two-parallel-wires shielded cable for evaluation of the RF induced Voltages at the terminations

A SPICE circuit model is developed for the evaluation in frequency and time domain, of the common and differential mode voltages at the terminals of a two-parallel-wires shielded cable during a current injection test. The proposed circuit is an exact equivalent of the model's governing multiconductor transmission line equations without the need of any subdivision in elementary cells and takes into account the presence of both transfer impedance and admittance.     

Analysis of crosstalk and field coupling to lossy MTLs in a SPICEenvironment

This paper proposes a circuit model for lossy multiconductor transmission lines (MTLs) suitable for implementation in modern SPICE simulators, as well as in any simulator supporting differential operators. The model includes the effects of a uniform or nonuniform disturbing field illuminating the line and is especially devised for the transient simulation of electrically long wideband interconnects with frequency dependent per-unit-length parameters. The MTL is characterized by its transient matched scattering responses, which are computed including both dc and skin losses by means of a specific algorithm for the inversion of the Laplace transform. The line characteristics are then represented in terms of differential operators and ideal delays to improve the numerical efficiency and to simplify the coding of the model in existing simulators. The model can be successfully applied to many kinds of interconnects ranging from micrometric high-resistivity metallizations to low-loss PCBs and cables, and can be considered a practical extension of the widely appreciated lossless MTL SPICE model, which maintains the simplicity and efficiency     

Power distribution system design methodology and capacitorselection for modern CMOS technology

Power systems for modern complementary metal-oxide-semiconductor (CMOS) technology are becoming harder to design. One design methodology is to identify a target impedance to be met across a broad frequency range and specify components to meet that impedance. The impedance versus frequency profiles of the power distribution system components including the voltage regulator module, bulk decoupling capacitors and high frequency ceramic capacitors are defined and reduced to simulation program with integrated circuit emphasis (SPICE) models. A sufficient number of capacitors are placed in parallel to meet the target impedance. Ceramic capacitor equivalent series resistance (ESR) and ESL are extremely important parameters in determining how many capacitors are required. SPICE models are then analyzed in the time domain to find the response to load transients     

一种改进的开关电源传导EMI源阻抗测试方法

对典型的开关电源传导EMI噪声源的产生机理进行了分析,指出了噪声源（包括共模和差模）特性阻抗的测试方法,重点介绍了插入损耗法,并提出了对该方法的改进;初步仿真结果验证了其正确性。     

Current-controlled translinear impedance converter

A current-controlled impedance converter is described which is implemented using two translinear active devices: a current conveyor with unity gain and an adjustable differential current-mode amplifier. It has low parasitic input impedance and useful properties when the amplifier gain is near unity. To characterize the circuit, SPICE simulation results are given and discussed.     

A novel COA-based electronically adjustable current-mode instrumentation amplifier topology

In this paper a new topology for implementing Current-Mode Instrumentation Amplifiers (CMIA) is presented. The proposed CMIA is based on two single input-multiple output (SI-MO) current operational amplifiers (COAs) as basic building blocks and 2 resistors. To electronically control the differential-mode gain, a transistor operating in triode region is used which acts as a variable resistor. The significant feature of the proposed CMIA is that the active building blocks operate in closed loop configuration. Therefore it exhibits numerous remarkable features such as improved frequency performance, low THD and very low input impedance. In addition, it has fully differential output which reduces the output noise and increases its application. The proposed CMIA is analyzed and simulated with SPICE program using parameters of 0.18 µm CMOS technology and supply voltage of ±0.9 V.     

Application of VSI‐EBG Structure to High‐Speed Differential Signals for Wideband Suppression of Common‐Mode Noise

In this paper, we present wideband common‐mode (CM) noise suppression using a vertical stepped impedance electromagnetic bandgap (VSI‐EBG) structure for high‐speed differential signals in multilayer printed circuit boards. This technique is an original design that enables us to apply the VSI‐EBG structure to differential signals without sacrificing the differential characteristics. In addition, the analytical dispersion equations for the bandgap prediction of the CM propagation in the VSI‐EBG structure are extracted, and the closed‐form expressions for the bandgap cutoff frequencies are derived. Based on the dispersion equations, the effects of the impedance ratio, the EBG patch length, and via inductances on the bandgap of the VSI‐EBG structure for differential signals are thoroughly examined. The proposed dispersion equations are verified through agreement with the full‐wave simulation results. It is experimentally demonstrated that the proposed VSI‐EBG structure for differential signaling suppresses the CM noise in the wideband frequency range without degrading the differential characteristics.     

An Improved Physics-Based Formulation of the Microwave p-i-n Diode Impedance

An improved formulation of the frequency-dependent impedance for p-i-n diodes from physical and geometrical parameters is presented. This work is addressed to diode designers and allows them to evaluate quickly and accurately the diode impedance. It comes in parallel with existing SPICE p-i-n diode model used in CAD software. Under forward bias conditions, important recombinations occur in the heavily doped end regions of thin p-i-n diodes that seriously affects the diode impedance. This effect is taken into account to increase the accuracy of existing numerical models and to extend their validity domain to any I-region thicknesses. This improvement has been validated by measurement results on a 5-mum I-region width silicon p-i-n diode     

基于CMI及差分电流的紫外读出集成电路的研究

本文提出了一种基于电流镜镜像积分(CMI)及差分电流结构的GaN紫外探测器读出电路结构,分析了该读出电路结构的工作原理及特点.通过SPICE对电路结构进行了仿真验证,结果显示该读出电路结构可以对探测器的光响应电流信号进行有效的读取.     

A comparison of substrate noise coupling in lightly and heavily doped CMOS processes for 2.4-GHz LNAs

This paper examines the substrate noise injected into three different types of 2.4-GHz low-noise amplifiers for both heavily and lightly doped CMOS substrates. The amplifiers include the commonly used single-ended and differential topologies as well as a new quasi-differential amplifier. For the single-ended amplifier, the noise coupling modeled in SPICE is in good agreement with measurements. Using these models and simulations, the major noise coupling mechanisms are identified and methods of noise mitigation are evaluated. In the differential amplifier, it is shown that even though the substrate noise is common mode, the intermodulation noise is not reduced. The quasi-differential amplifier performance is comparable to the differential amplifier for lightly doped substrates.