基于DDS的岸防雷达频率合成器

本文介绍了一种针对于岸防应用背景,基于DDS技术的低相噪、低杂散、宽频带、捷变频X波段频率合成器的具体实现方法。文中利用DDS技术,替代了以往倍频、分频、混频等的常规方法,产生出P波段中频频标信号,以及时宽/带宽多种可变的线性调频信号。     

一种新颖的捷变频频率合成器设计

提出了一种新颖的直接频率合成器方案,实现了优于3μs的捷变频指标.采用直接数字频率合成器(DDS)实现细步进跳频,通过切换混频本振、分段开关滤波、直接倍频方式拓展输出带宽.分析了关键指标和技术难点,给出了解决措施.该频率合成器实测结果满足指标要求,具有工程应用价值.     

小步进捷变频率合成器设计技术

捷变频率合成技术在雷达、电子对抗等设备中具有极为重要的作用。利用DDS可以实现高速度、小步进跳频。对于捷变频率合成,首先系统地阐述了倍频、混频等各种提升和扩展频段的基本方式的特性,详细分析了它们的优缺点和可行性。提出了根据指标特点进行设计的一种通用方法,说明了设计中需要注意的细节。针对宽带合成器的特殊性做出了分析。最后作为实例,给出了一种捷变频率合成器的详细设计方案。     

S 波段捷变频频率源研究

快捷变频率源在军事上用途广泛,其指标变频时间在瞬息万变的战场上起着关键作用。该文提出一种较新的捷变频方案,并设计出了S 波段捷变频频率源,其输出信号范围为2.349～2.954GHz。该频率源将直接数字式频率合成器（DDS）产生的信号直接上变频,利用选频组件抑制杂散并选择输出信号。该方案中的DDS 采用Analog Device 公司高 端的AD9912,其具有频率分辨率高,输出信号杂散低,控制接口简单的特点。控制部分采用FPGA 芯片EP2C5Q208C8。测试结果表明,系统变频时间小于1.5μs,输出信号杂散抑制最好为69.8dBc,最差为40dBc 左右。     

Ka 波段应用的捷变频高频率分辨率频率合成器

传统基于锁相环(PLL)实现带宽信号输出的频率合成方案,常常为了获得高输出频率而降低频率分辨率和缩短跳频时间。相较而言,基于直接数字频率合成器(DDS)实现带宽信号输出的频率合成方案,其频率分辨率更高,跳频时间更快。然而,DDS 输出频率低,须经多次混频或倍频操作以提升输出频率,对频率源中的滤波器设计造成极大压力,并且这种压力随着频率源输出频率的升高而不断上升。对此,基于高性能、小型化无源滤波器的设计能力,实现了基于DDS 变频的34-35GHz 捷变频、高频率分辨率频率源。实验结果表明,其工作相位噪声优于-85dBc/Hz@1kHz,杂散和谐波抑制优于45 dBc,频率分辨率达到1.86Hz,跳频时间最快4ns。     

DDS+PLL宽带频率合成器的设计与实现

采用DDS PLL技术实现频率合成器,其特点是宽频带(3～6 CHz)、小步进(1 kHz)、低相位噪声,频率捷变.对其进行了理论分析,描述了宽频带和小步进的实现方式,相位噪声以及频率捷变的确定问题.频率合成器由DDS、锁相环路、压控振荡器、放大电路、参考信号和数据处理等电路组成.压控振荡器的信号经过功分、分频、下混频,滤波后和晶振信号在锁相环路进行鉴相,生成误差电压来控制VCO的频率,同时通过改变DDS的频率得到小步进、低相位噪声的输出信号.     

Galileo E1/GPS L1波段载波频率的设计与实现

Galileo/GPS伪卫星系统对载波频率的性能有着很高的要求,提出了采用PLL技术和DDS技术结合应用的方法来设计Galileo/GPS高精度伪卫星频率合成器的设计方案,E1/L1波段载波频率经过二次混频后输出。混频模块通过ADS仿真,输出的载波频率能满足系统杂散抑制指标。最后基于此频率合成器方案制作PCB板且经过调试,E1/L1波段载波频率的各项指标符合设计要求。     

基于DDS的低杂散捷变频合成器设计

为了对抗有源干扰,雷达系统要求频率合成器具有频率捷变功能;同时要求其杂散抑制越高越好,特别是在输出信号带宽较宽的情况下更是如此。受体积和成本的限制,目前的捷变频频率合成器广泛采用基于直接数字合成（DDS）技术的变频方法。本文基于低杂散,对采用DDS的捷变频频率合成器技术进行了研究,并介绍一种采用时钟频率高达3．2GHz的新型DDS集成电路的低杂散捷变频频率合成器的设计与实现方法,设计得到的捷变频频率合成器带宽为250MHz,其杂散抑制指标可满足全频段优于-65dBc。     

基于DDS技术的多普勒频移模拟器

DDS技术具有捷变频、输出相位连续的特性。在工程应用时通过采用DDS+PLL相结合的方式,可有效克服DDS因直接倍频引入的高输出杂散,同时也可有效提高频率合成器的输出频率。使用该方式解决了小频率间隔与低相位噪声输出之间的矛盾,同时将DDS输出相位连续的特性搬移到了射频频段。基于该技术实现的多普勒频移模拟器通过采用相关算法在L频段上仿真实现了动态的多普勒频移变化,其最大多普勒频移误差小于1Hz。     

基于DDS的宽带捷变频综的设计及其应用

介绍了基于DDS的宽带捷变频综的设计过程,通过对DDS杂散产生机理的深入分析和ADS中建模,选用1 024 MHz作为参考时钟,选择75~150 MHz的DDS信号经过倍频、梳谱、混频,产生1 250~2 500 MHz的射频基带信号,在保证杂散60 dBc的前提下,最大限度的扩展了DDS的可使用频率。射频基带经过3次倍频扩展到10 000~20 000 MHz,最终合成为75~20 000 MHz的信号。通过DDS实现的数字调制方式,可以实现AWG功能,扩展了宽带捷变频综的用途,在电子对抗领域有广泛的应用前景。     

A frequency multiplier for reference frequency in frequency synthesizer systems

A low jitter frequency multiplier, which requires less power, area, and design complexity than reference multiplying PLL or DLL circuits can be used to generate the reference frequency for a low phase noise frequency synthesizer. This paper proposes a mixed signal solution based on the fact that the average DC value of a signal is proportional to its duty cycle. The solution uses a feedback loop with coarse and fine delay resolution to generate a \(90^{\circ }\) phase shifted clock that is used to produce a doubled frequency signal with 50% duty cycle. This method can be used to multiply the input frequency of 40 MHz by multiples of 2, up to 16. The design is implemented in 65 nm UMC CMOS process. Operating from 1.2-V supply, it dissipates 0.46 to 1.2 mA at output frequencies 80–640 MHz, achieving ? 162.3 and ? 139 dBc/Hz phase noise at 1 MHz offset, respectively.     

Wideband frequency modulation of frequency synthesisers

Two-point frequency modulation gives a flat frequency response irrespective of the loop cutoff frequency of a p.l.l. digital frequency synthesiser. The spurious modulation components otherwise generated are also then suppressed. The modulation index is typically limited to N? where N is the divider ratio.     

GHz band frequency hopping PLL-based frequency synthesizers

In this paper we describe a full-integrated circuit containing all building blocks of a completed PLL-based synthesizer except for low pass filter（LPF）. The frequency synthesizer is designed for a frequency hopping （FH） transceiver operating up to 1.5 GHz as a local oscillator. The architecture of Voltage Controlled Oscillator （VCO） is optimized to get better performance, and a phase noise of -111.85-dBc/Hz @ 1 MHz and a tuning range of 250 MHz are gained at a centre frequency of 1.35 GHz. A novel Dual-Modulus Prescaler（DMP） is designed to achieve a very low jitter and a lower power. The settling time of PLL is 80 μs while the reference frequency is 400 KHz. This monolithic frequency synthesizer is to integrate all main building blocks of PLL except for the low pass filter, with a maximum VCO output frequency of 1.5 GHz, and is fabricated with a 0.18 μm mixed signal CMOS process. Low power dissipation, low phase noise, large tuning range and fast settling time are gained in this design.     

Dual-polarization frequency reuse with frequency band shiftingallocation

Spectrum is a limited and precious resource in wireless communications. Effective spectrum utilization becomes more and more important because of the expeditious increase of demand for wireless communications. In principle, the dual-polarization frequency reuse system, which employs two orthogonally polarized electromagnetic waves to carry information, can double the system capacity. However, the system performance degrades seriously and sometimes becomes unacceptable due to cross polarization and fading. In this paper, a new linear-polarized dual-polarization frequency reuse system that utilizes the concept of orthogonal frequency allocation to increase spectrum utilization is proposed. We analyze the performance of the dual-polarization system modulated by the quadrature phase-shift keying in the multipath fading channel with cross-polarization interference and Doppler effect. Because of the orthogonality of the polarized carriers and frequency spacing, the effect of cross polarization, which defeats the performance of the dual-polarization system severely, can be ignored. The proposed system has a bit error rate around 10^-7 at the bit energy-to-noise ratio of 14 dB, while the bit error rates of the dual-polarization cancellation with bootstrap system and the conventional orthogonal frequency-division multiplexing system are about 10^-4     

High frequency electronic ballast provides line frequency lampcurrent

Most electronic ballasts for fluorescent lamps provide a sinusoidal lamp current at the switching frequency. The high-frequency current flowing through the lamp can generate significant radiated noise, which is unacceptable in noise-sensitive applications, such as fluorescent lights in airplanes. Using shielded enclosures for the lamps may solve the problem, but it is expensive. A discontinuous conduction mode (DCM) electronic ballast topology is presented which drives the lamp with line frequency current, just like a magnetic ballast. However, compared to a magnetic ballast, its weight is substantially reduced due to operation at 40 kHz switching frequency. The topology also ensures unity power factor at the input and stable lamp operation at the output     

Precise all-digital frequency detector for high frequency signals

A fully digital and simple to implement frequency detector for use with high frequency signals is presented. The new frequency detector can detect small phase movements of much less than one cycle, even though the frequency detector is clocked at a low rate. Existing digital techniques can only detect phase movements of more than one cycle, or require clock rates much higher than the frequency of the signal. The operating limits of the new frequency detector are derived. Examples of the application of the new frequency detector are also given.     

Improvement of natural frequency extraction in frequency domain

Natural frequency extraction in the frequency domain using measured frequency responses is an ill-conditioned problem. A method is proposed to improve the accuracy of the previously extracted natural frequencies. It is shown from results that the method can improve the accuracy of the natural frequencies extracted from synthetic and measured frequency response samples     

频率估计的时频分析方法研究

时间和频率是信号处理与分析中最重要的两个变量,时频分析技术力求在计算复杂性和时频分辨率之间找到最佳平衡点,利用时频分析研究瞬时频率估计及各种方法的性能具有重要意义。本文阐述了瞬时频率时频分析理论研究和应用发展概况,并给出了几种典型的瞬时频率估计算法及其性能评价。     

抽样频率转换在数字下变频中的应用

数字下变频技术是软件无线电中的关键技术之一。从信号中去除高频信息，降低抽样频率而不导致频谱混叠的过程称之为抽取。若信号不进行滤波就抽取，信号将出现混叠，那么其关键问题就是抽取前的滤波。现以软件无线电的基本知识为基础，分析了单级和多级抽样频率转换，并进行了比较。     

可控频率差的双频激光器的研究

传统的可控频率差的双频激光器是基于双折射效应来实现的,研究了S偏振光和P偏振光在全内反射和减反射薄膜的相位特性,提出基于双全内反射和倾斜减反射膜的相移之间的差别来实现可控双频激光。通过调节入射角的大小或设计不同的薄膜结构来控制双频激光器的频率差。最后在实验中发现,氦氖激光器的硬封接的透射窗存在较大的残余热应力双折射,可产生不可控却稳定的残余热应力双折射,用于制作频率差为中频的双频激光器。