Number of information symbols in polynomial codes

Polynomial codes and their dual codes as introduced by Kasami, Lin, and Peterson have considerable algebraic and geometric structure. It has been shown that these codes contain many well-known classes of cyclic codes as subclasses, such as BCH codes, projective geometry codes (PG codes), Euclidean geometry codes (EG codes), and generalized Reed-Muller codes (GRM codes). In this paper, combinatorial expressions for the number of information symbols and parity-check symbols in polynomial codes are derived. The results are applied to two important subclasses of codes, the PG codes and EG codes.     

Note on majority-logic decoding of finite geometry codes (Corresp.)

In a recent paper [1], techniques for reducing the number of majority-logic decoding steps for finite geometry codes have been proposed. However, the lower bound of [1, lemma 4] is incorrect; finite geometry codes, in general, cannot be decoded in less than or equal to three steps of orthogonalization, as was claimed. This correspondence presents a decoding procedure for finite geometry codes that requires as few decoding steps as possible. It is shown that the minimum number of steps is a logarithmic function of the dimension of the associated geometry.     

Memory Access Optimized Implementation of Cyclic and Quasi-Cyclic LDPC Codes on a GPGPU

Software based decoding of low-density parity-check (LDPC) codes frequently takes very long time, thus the general purpose graphics processing units (GPGPUs) that support massively parallel processing can be very useful for speeding up the simulation. In LDPC decoding, the parity-check matrix H needs to be accessed at every node updating process, and the size of the matrix is often larger than that of GPU on-chip memory especially when the code length is long or the weight is high. In this work, the parity-check matrix of cyclic or quasi-cyclic (QC) LDPC codes is greatly compressed by exploiting the periodic property of the matrix. Also, vacant elements are eliminated from the sparse message arrays to utilize the coalesced access of global memory supported by GPGPUs. Regular projective geometry (PG) and irregular QC LDPC codes are used for sum-product algorithm based decoding with the GTX-285 NVIDIA graphics processing unit (GPU), and considerable speed-up results are obtained.     

Shortened finite geometry codes (Corresp.)

A method of shortening finite analytic geometry codes, projective-geometry (PG) codes, Euclidean-geometry (EG) codes, and 2-fold EG codes is presented. The shortened codes preserve the feature of being majority-logic decodable and they have the same error-correcting capability as the original codes. Combinatorial expressions for the parity-check symbols of the shortened codes are derived.     

A novel construction of quantum ldpc codes based on cyclic classes of lines in euclidean geometries

The dual-containing (or self-orthogonal) formalism of Calderbank-Shor-Steane (CSS) codes provides a universal connection between a classical linear code and a Quantum Error-Correcting Code (QECC). We propose a novel class of quantum Low Density Parity Check (LDPC) codes constructed from cyclic classes of lines in Euclidean Geometry (EG). The corresponding constructed parity check matrix has quasi-cyclic structure that can be encoded flexibility, and satisfies the requirement of dual-containing quantum code. Taking the advantage of quasi-cyclic structure, we use a structured approach to construct Generalized Parity Check Matrix (GPCM). This new class of quantum codes has higher code rate, more sparse check matrix, and exactly one four-cycle in each pair of two rows. Experimental results show that the proposed quantum codes, such as EG(2,q)II-QECC, EG(3,q)II-QECC, have better performance than that of other methods based on EG, over the depolarizing channel and decoded with iterative decoding based on the sum-product decoding algorithm.     

BEAST decoding of block codes obtained via convolutional codes

BEAST is a bidirectional efficient algorithm for searching trees. In this correspondence, BEAST is extended to maximum-likelihood (ML) decoding of block codes obtained via convolutional codes. First it is shown by simulations that the decoding complexity of BEAST is significantly less than that of the Viterbi algorithm. Then asymptotic upper bounds on the BEAST decoding complexity for three important ensembles of codes are derived. They verify BEAST's high efficiency compared to other algorithms. For high rates, the new asymptotic bound for the best ensemble is in fact better than previously known bounds.     

Iterative decoding of one-step majority logic deductible codesbased on belief propagation

Previously, the belief propagation (BP) algorithm has received a lot of attention in the coding community, mostly due to its near-optimum decoding for low-density parity check (LDPC) codes and its connection to turbo decoding. In this paper, we investigate the performance achieved by the BP algorithm for decoding one-step majority logic decodable (OSMLD) codes. The BP algorithm is expressed in terms of likelihood ratios rather than probabilities, as conventionally presented. The proposed algorithm fits better the decoding of OSMLD codes with respect to its numerical stability due to the fact that the weights of their check sums are often much higher than that of the corresponding LDPC codes. Although it has been believed that OSMLD codes are far inferior to LDPC codes, we show that for medium code lengths (say between 200-1000 bits), the BP decoding of OSMLD codes can significantly outperform BP decoding of their equivalent LDPC codes. The reasons for this behavior are elaborated     

关于Justesen代数几何码

本文通过建立保持Hamming距离的同构,给出了研究Justesen等(1989)所构造的代数几何码的一般方法,并取得一些新的结果。本文在进行译码研究时,首次把同类型的较小的代数几何码的码字与错误位置多项式的值相对应,从而清晰地揭示了译码过程,以及纠错能力。本文还得到一般代数几何码维数的上界和下界。最后给出了一个容易理解的译码算法。此算法类似于RS码的Peterson译码算法。     

Hybrid Iterative Decoding for Low-Density Parity-Check Codes Based on Finite Geometries

In this letter, a two-stage hybrid iterative decoding algorithm which combines two iterative decoding algorithms is proposed to reduce the computational complexity of finite geometry low-density parity-check (FG-LDPC) codes. We introduce a fast weighted bit-flipping (WBF) decoding algorithm for the first stage decoding. If the first stage decoding fails, the decoding is continued by the powerful belief propagation (BP) algorithm. The proposed hybrid decoding algorithm greatly reduces the computational complexity while maintains the same performance compared to that of using the BP algorithm only.     

Construction and decoding of a class of algebraic geometry codes

A class of codes derived from algebraic plane curves is constructed. The concepts and results from algebraic geometry that were used are explained in detail; no further knowledge of algebraic geometry is needed. Parameters, generator and parity-check matrices are given. The main result is a decoding algorithm which turns out to be a generalization of the Peterson algorithm for decoding BCH decoder codes     

On Justesen’s algebraic geometry codes

An isomorphism preserving Hamming distance between two algebraic geometry (AG) codes is presented to obtain the main parameters of Justesen’s algebraic geometry (JAG) codes. To deduce a simple approach to the decoding algorithm, a code word in a “small” JAG code is used to correspond to error-locator polynomial. By this means, a simple decoding procedure and its ability of error correcting are explored obviously. The lower and upper bounds of the dimension of AG codes are also obtained.     

The max-log list algorithm (MLLA)-a list-sequence decoding algorithm that provides soft-symbol output

We present a soft decoding algorithm for convolutional codes that simultaneously yields soft-sequence output, i.e., list sequence (LS) decoding, and soft-symbol output. The max-log list algorithm (MLLA) introduced in this paper provides near-optimum soft-symbol output equal to that of the max-log maximum a posteriori (MAP) probability algorithm. Simultaneously, the algorithm produces an ordered list containing LS-MAP estimates. The MLLA exists in an optimum and a suboptimum version that are different in that the optimum version produces optimum LS-MAP decoding for arbitrary list lengths, while the suboptimum low-complexity version only provides the MAP, the second-order MAP, and the third-order MAP sequence estimates. For lists with more than three elements, MAP decoding is not guaranteed, but the LS decoding is close to the optimal. It is demonstrated that the suboptimum/optimum MLLA can be used to obtain the combination of soft-symbol and soft-sequence outputs at lower complexity than a previously published algorithm. Furthermore, the suboptimum MLLA is well suited for operation in an iterative list (turbo) decoder, since it is obtained by only minor modifications of the well-known Max-Log-MAP algorithm frequently used for decoding of the component codes of turbo codes. Another potential area of application for the suboptimum/optimum MLLA is joint source-channel LS decoding. Estimates of complexity and memory use, as well as performance evaluations of the suboptimum/optimum MLLA, are provided in this paper.     

一种改进的二阶Reed-Muller译码算法

研究了一种改进的RM译码算法—改进的Sidel,nikov-Pershakov算法(简称SP算法),详细叙述了原始算法的原理以及改进算法的译码步骤,并对两种算法进行了仿真实现,对它们的译码性能和算法复杂度进行了比较。改进的译码算法复杂度略优于原始算法,而改进后的算法的译码性能明显优于原始算法。     

On algebraic soft-decision decoding algorithms for BCH codes

Three algebraic soft-decision decoding algorithms are presented for binary Bose-Chaudhuri-Hocquengham (BCH) codes. Two of these algorithms are based on the bounded distance (BD)+1 generalized minimum-distance (GMD) decoding presented by Berlekamp (1984), and the other is based on Chase (1972) decoding. A simple algebraic algorithm is first introduced, and it forms a common basis for the decoding algorithms presented. Next, efficient BD+1 GMD and BD+2 GMD decoding algorithms are presented. It is shown that, for binary BCH codes with odd designed-minimum-distance d and length n, both the BD+1 GMD and the BD+2 GMD decoding algorithms can be performed with complexity O(nd). The error performance of these decoding algorithms is shown to be significantly superior to that of conventional GMD decoding by computer simulation. Finally, an efficient algorithm is presented for Chase decoding of binary BCH codes. Like a one-pass GMD decoding algorithm, this algorithm produces all necessary error-locator polynomials for Chase decoding in one run     

Recursive decoding and its performance for low-rate Reed-Muller codes

Recursive decoding techniques are considered for Reed-Muller (RM) codes of growing length n and fixed order r. An algorithm is designed that has complexity of order nlogn and corrects most error patterns of weight up to n(1/2-/spl epsiv/) given that /spl epsiv/ exceeds n/sup -1/2r/. This improves the asymptotic bounds known for decoding RM codes with nonexponential complexity. To evaluate decoding capability, we develop a probabilistic technique that disintegrates decoding into a sequence of recursive steps. Although dependent, subsequent outputs can be tightly evaluated under the assumption that all preceding decodings are correct. In turn, this allows us to employ second-order analysis and find the error weights for which the decoding error probability vanishes on the entire sequence of decoding steps as the code length n grows.     

基于串行消息传递机制的QC-LDPC码快速译码算法研究

针对准循环LDPC(QC-LDPC)码基于洪水消息传递机制译码算法的不足,该文提出了一种快速的分组串行译码算法。该算法通过将LDPC码的校验节点(或变量节点)按一定规则划分成若干个子集,在每一轮迭代过程中,依次对各个子集中的校验节点(或变量节点)并行地进行消息更新,提高了译码速度。同时根据分组规则,提出了一种有效的分组方法,并通过分析发现基于循环置换阵的准循环LDPC码非常适合采用这种分组译码算法进行译码。通过对不同消息传递机制下准循环LDPC码译码算法性能的仿真比较,验证了在复杂度不增加的情况下,该译码算法在继承了串行译码算法性能优异和迭代收敛快等优点的同时,极大地提高了准循环LDPC码的译码速度。分析表明,分组串行译码算法译码速度至少为串行译码算法的p倍(p为准循环LDPC码校验矩阵中循环置换阵的行数或列数)。     

Efficient VLSI Architecture for Soft-Decision Decoding of Reed–Solomon Codes

Reed–Solomon (RS) codes have very broad applications in digital communication and storage systems. The recently developed algebraic soft-decision decoding (ASD) algorithms of RS codes can achieve substantial coding gain with polynomial complexity. Among the ASD algorithms with practical multiplicity assignment schemes, the bit-level generalized minimum distance (BGMD) decoding algorithm can achieve similar or higher coding gain with lower complexity. ASD algorithms consist of two major steps: the interpolation and the factorization. In this paper, novel architectures for both steps are proposed for the BGMD decoder. The interpolation architecture is based on the newly proposed Lee-O'Sullivan (LO) algorithm. By exploiting the characteristics of the LO algorithm and the multiplicity assignment scheme in the BGMD decoder, the proposed interpolation architecture for a (255, 239) RS code can achieve 25% higher efficiency in terms of speed/area ratio than prior efforts. Root computation over finite fields and polynomial updating are the two main steps of the factorization. A low-latency and prediction-free scheme is introduced in this paper for the root computation in the BGMD decoder. In addition, novel coefficient storage schemes and parallel processing architectures are developed to reduce the latency of the polynomial updating. The proposed factorization architecture is 126% more efficient than the previous direct root computation factorization architecture.      

On acceptance criterion for efficient successiveerrors-and-erasures decoding of Reed-Solomon and BCH codes

We describe an efficient algorithm for successive errors-and-erasures decoding of BCH codes. The decoding algorithm consists of finding all necessary error locator polynomials and errata evaluator polynomials, choosing the most appropriate error locator polynomial and errata evaluator polynomial, using these two polynomials to compute a candidate codeword for the decoder output, and testing the candidate for optimality via an originally developed acceptance criterion. Even in the most stringent case possible, the acceptance criterion is only a little more stringent than Forney's (1966) criterion for generalised minimum distance (GMD) decoding. We present simulation results on the error performance of our decoding algorithm for binary antipodal signals over an AWGN channel and a Rayleigh fading channel. The number of calculations of elements in a finite field that are required by our algorithm is only slightly greater than that required by hard-decision decoding, while the error performance is almost as good as that achieved with GMD decoding. The presented algorithm is also applicable to efficient decoding of product RS codes     

A Dynamic Hybrid Decoder Apprroach Using EG-LDPC Codes for Signal Processing Applications

The Low-Density Parity Check (LDPC) codes of Euclidean Geometry (EG) are encrypted and decrypted in numerous ways, namely Soft Bit Flipping (SBF), Sequential Peeling Decoder (SPD), Belief Propagation Decoder (BPD), Majority Logic Decoder/Detector (MLDD), and Parallel Peeling Decoder (PPD) decoding algorithms. These algorithms provide aextensive range of trade-offs between latency decoding, power consumption, hardware complexity-required resources, and error rate performance. Therefore, the problem is to communicate a sophisticated technique specifying the both soft and burst errors for effective information transmission. In this research, projected a technique named as Hybrid SBF (HSBF) decoder for EG-LDPC codes, which reduces the decoding complexity and maximizes the signal transmission and reception. In this paper, HSBF is also known as Self Reliability based Weighted Soft Bit Flipping (SRWSBF) Decoder. It is obvious from the outcomes that the proposed technique is better than the decoding algorithms SBF, MLDD, BPD, SPD and PPD. Using Xilinx synthesis and SPARTAN 3e, a simulation model is designed to investigate latency, hardware utilization and power consumption. Average latency of 16.65 percent is found to be reduced. It is observed that in considered synthesis parameters such as number of 4-input LUTs, number of slices, and number of bonded IOBs, excluding number of slice Flip-Flops, hardware utilization is minimized to an average of 4.25 percent. The number of slices Flip-Flops resource use in the proposed HSBF decoding algorithm is slightly higher than other decoding algorithms, i.e. 1.85%. It is noted that, over the decoding algorithms considered in this study, the proposed research study minimizes power consumption by an average of 41.68%. These algorithms are used in multimedia applications, processing systems for security and information.