A 160-GHz f/sub T/ and 140-GHz f/sub MAX/ submicrometer InP DHBT in MBE regrown-emitter technology

We report a 0.7/spl times/8 /spl mu/m/sup 2/ InAlAs-InGaAs-InP double heterojunction bipolar transistor, fabricated in a molecular-beam epitaxy (MBE) regrown-emitter technology, exhibiting 160 GHz f/sub T/ and 140 GHz f/sub MAX/. These initial results are the first known RF results for a nonselective regrown-emitter heterojunction bipolar transistor, and the fastest ever reported using a regrown base-emitter heterojunction. The maximum current density is J/sub E/=8/spl times/10/sup 5/ A/cm/sup 2/ and the collector breakdown voltage V/sub CEO/ is 6 V for a 1500-/spl Aring/ collector. In this technology, the dimension of base-emitter junction has been scaled to an area as low as 0.3/spl times/4 /spl mu/m/sup 2/ while a larger-area extrinsic emitter maintains lower emitter access resistance. Furthermore, the application of a refractory metal (Ti-W) base contact beneath the extrinsic emitter regrowth achieves a fully self-aligned device topology.     

Ultra high-speed InP-InGaAs SHBTs with f/sub max/ of 478 GHz

InP-based single heterojunction bipolar transistors (SHBTs) for high-speed circuit applications were developed. Typical common emitter DC current gain (/spl beta/) and BV/sub CEO/ were about 17 and 10 V, respectively. Maximum extrapolated f/sub max/ of 478 GHz with f/sub T/ of 154 GHz was achieved for 0.5 /spl times/ 10 /spl mu/m/sup 2/ emitter size devices at 300 kA/cm/sup 2/ collector current density and 1.5 V collector bias. This is the highest f/sub max/ ever reported for any nontransferred substrate HBTs, as far as the authors know. This paper highlights the optimized conventional process, and the authors have great hopes for the process that offers inherent advantages for the direct implementation to high-speed electronic circuit fabrication.     

A submicrometer 252 GHz f/sub T/ and 283 GHz f/sub MAX/ InP DHBT with reduced C/sub BC/ using selectively implanted buried subcollector (SIBS)

The selectively implanted buried subcollector (SIBS) is a method to decouple the intrinsic and extrinsic C/sub BC/ of InP-based double-heterojunction bipolar transistors (DHBTs). Similar to the selectively implanted collector (SIC) used in Si-based bipolar junction transistors (BJTs) and HBTs, ion implantation is used to create a N+ region in the collector directly under the emitter. By moving the subcollector boundary closer to the BC junction, SIBS allows the intrinsic collector to be thin, reducing /spl tau//sub C/, while simultaneously allowing the extrinsic collector to be thick, reducing C/sub BC/. For a 0.35 /spl times/ 6 /spl mu/m/sup 2/ emitter InP-based DHBT with a SIBS, 6 fF total C/sub BC/ and >6 V BV/sub CBO/ were obtained with a 110-nm intrinsic collector thickness. A maximum f/sub T/ of 252 GHz and f/sub MAX/ of 283 GHz were obtained at a V/sub CE/ of 1.6 V and I/sub C/ of 7.52 mA. Despite ion implantation and materials regrowth during device fabrication, a base and collector current ideality factor of /spl sim/2.0 and /spl sim/1.4, respectively, at an I/sub C/ of 100 /spl mu/A, and a peak dc /spl beta/ of 36 were measured.     

Graded base type-II InP/GaAsSb DHBT with f/sub T/=475 GHz

The first demonstration of a type-II InP/GaAsSb double heterojunction bipolar transistor (DHBT) with a compositionally graded InGaAsSb to GaAsSb base layer is presented. A device with a 0.4/spl times/6 /spl mu/m/sup 2/ emitter dimensions achieves peak f/sub T/ of 475 GHz (f/sub MAX/=265 GHz) with current density at peak f/sub T/ exceeding 12 mA//spl mu/m/sup 2/. The structure consists of a 25-nm InGaAsSb/GaAsSb graded base layer and 65-nm InP collector grown by MBE with breakdown voltage /spl sim/4 V which demonstrates the vertical scaling versus breakdown advantage over type-I DHBTs.     

InGaAs/InP DHBTs with 120-nm collector having simultaneously high f/sub /spl tau//, f/sub max//spl ges/450 GHz

InP/In/sub 0.53/Ga/sub 0.47/As/InP double heterojunction bipolar transistors (DHBT) have been designed for increased bandwidth digital and analog circuits, and fabricated using a conventional mesa structure. These devices exhibit a maximum 450 GHz f/sub /spl tau// and 490 GHz f/sub max/, which is the highest simultaneous f/sub /spl tau// and f/sub max/ for any HBT. The devices have been scaled vertically for reduced electron collector transit time and aggressively scaled laterally to minimize the base-collector capacitance associated with thinner collectors. The dc current gain /spl beta/ is /spl ap/ 40 and V/sub BR,CEO/=3.9 V. The devices operate up to 25 mW//spl mu/m/sup 2/ dissipation (failing at J/sub e/=10 mA//spl mu/m/sup 2/, V/sub ce/=2.5 V, /spl Delta/T/sub failure/=301 K) and there is no evidence of current blocking up to J/sub e//spl ges/12 mA//spl mu/m/sup 2/ at V/sub ce/=2.0 V from the base-collector grade. The devices reported here employ a 30-nm highly doped InGaAs base, and a 120-nm collector containing an InGaAs/InAlAs superlattice grade at the base-collector junction.     

15-nm base type-II InP/GaAsSb/InP DHBTs with F/sub T/=384 GHz and a 6-V BV/sub CEO/

Type-II InP/GaAsSb/InP double heterojunction bipolar transistors (DHBTs) with a 15-nm base were fabricated by contact lithography: 0.73/spl times/11 /spl mu/m/sup 2/ emitter devices feature f/sub T/=384GHz (f/sub MAX/=262GHz) and BV/sub CEO/=6V. This is the highest f/sub T/ ever reported for InP/GaAsSb DHBTs, and an "all-technology" record f/sub T//spl times/BV/sub CEO/ product of 2304 GHz/spl middot/V. This result is credited to the favorable scaling of InP/GaAsSb/InP DHBT breakdown voltages (BV/sub CEO/) in thin collector structures.     

InGaAs-InP metamorphic DHBTs grown on GaAs with lattice-matched device performance and f/sub /spl tau//, f/sub max/>268 GHz

InP-In/sub 0.53/Ga/sub 0.47/As-InP double heterojunction bipolar transistors (DHBTs) were grown on a GaAs substrate using a metamorphic buffer layer and then fabricated. The metamorphic buffer layer is InP - employed because of its high thermal conductivity to minimize device heating. An f/sub /spl tau// and f/sub max/ of 268 and 339 GHz were measured, respectively - both records for metamorphic DHBTs. A 70-nm SiO/sub 2/ dielectric sidewall was deposited on the emitter contact to permit a longer InP emitter wet etch for increased device yield and reduced base leakage current. The dc current gain /spl beta/ is /spl ap/35 and V/sub BR,CEO/=5.7 V. The collector leakage current I/sub cbo/ is 90 pA at V/sub cb/=0.3 V. These values of f/sub /spl tau//, f/sub max/, I/sub cbo/, and /spl beta/ are consistent with InP based DHBTs of the same layer structure grown on a lattice-matched InP substrate.     

A novel InGaP/Al/sub x/Ga/sub 1-x/As/GaAs CEHBT

A new and interesting InGaP/Al/sub x/Ga/sub 1-x/As/GaAs composite-emitter heterojunction bipolar transistor (CEHBT) is fabricated and studied. Based on the insertion of a compositionally linear graded Al/sub x/Ga/sub 1-x/As layer, a near-continuous conduction band structure between the InGaP emitter and the GaAs base is developed. Simulation results reveal that a potential spike at the emitter/base heterointerface is completely eliminated. Experimental results show that the CEHBT exhibits good dc performances with dc current gain of 280 and greater than unity at collector current densities of J/sub C/=21kA/cm/sup 2/ and 2.70/spl times/10/sup -5/ A/cm/sup 2/, respectively. A small collector/emitter offset voltage /spl Delta/V/sub CE/ of 80 meV is also obtained. The studied CEHBT exhibits transistor action under an extremely low collector current density (2.7/spl times/10/sup -5/ A/cm/sup 2/) and useful current gains over nine decades of magnitude of collector current density. In microwave characteristics, the unity current gain cutoff frequency f/sub T/=43.2GHz and the maximum oscillation frequency f/sub max/=35.1GHz are achieved for a 3/spl times/20 /spl mu/m/sup 2/ device. Consequently, the studied device shows promise for low supply voltage and low-power circuit applications.     

InGaAs-InP mesa DHBTs with simultaneously high f/sub /spl tau// and f/sub max/ and low C/sub cb//I/sub c/ ratio

We report an InP-InGaAs-InP double heterojunction bipolar transistor (DHBT), fabricated using a conventional triple mesa structure, exhibiting a 370-GHz f/sub /spl tau// and 459-GHz f/sub max/, which is to our knowledge the highest f/sub /spl tau// reported for a mesa InP DHBT-as well as the highest simultaneous f/sub /spl tau// and f/sub max/ for any mesa HBT. The collector semiconductor was undercut to reduce the base-collector capacitance, producing a C/sub cb//I/sub c/ ratio of 0.28 ps/V at V/sub cb/=0.5 V. The V/sub BR,CEO/ is 5.6 V and the devices fail thermally only at >18 mW//spl mu/m/sup 2/, allowing dc bias from J/sub e/=4.8 mA//spl mu/m/sup 2/ at V/sub ce/=3.9 V to J/sub e/=12.5 mA//spl mu/m/sup 2/ at V/sub ce/=1.5 V. The device employs a 30 nm carbon-doped InGaAs base with graded base doping, and an InGaAs-InAlAs superlattice grade in the base-collector junction that contributes to a total depleted collector thickness of 150 nm.     

InGaAs-InP DHBTs for increased digital IC bandwidth having a 391-GHz f/sub /spl tau// and 505-GHz f/sub max/

InP-In/sub 0.53/Ga/sub 0.47/As-InP double heterojunction bipolar transistors (DHBT) have been designed for use in high bandwidth digital and analog circuits, and fabricated using a conventional mesa structure. These devices exhibit a maximum 391-GHz f/sub /spl tau// and 505-GHz f/sub max/, which is the highest f/sub /spl tau// reported for an InP DHBT-as well as the highest simultaneous f/sub /spl tau// and f/sub max/ for any mesa HBT. The devices have been aggressively scaled laterally for reduced base-collector capacitance C/sub cb/. In addition, the base sheet resistance /spl rho//sub s/ along with the base and emitter contact resistivities /spl rho//sub c/ have been lowered. The dc current gain /spl beta/ is /spl ap/36 and V/sub BR,CEO/=5.1 V. The devices reported here employ a 30-nm highly doped InGaAs base, and a 150-nm collector containing an InGaAs-InAlAs superlattice grade at the base-collector junction. From this device design we also report a 142-GHz static frequency divider (a digital figure of merit for a device technology) fabricated on the same wafer. The divider operation is fully static, operating from f/sub clk/=3 to 142.0 GHz while dissipating /spl ap/800 mW of power in the circuit core. The circuit employs single-buffered emitter coupled logic (ECL) and inductive peaking. A microstrip wiring environment is employed for high interconnect density, and to minimize loss and impedance mismatch at frequencies >100 GHz.     

Vertical scaling of 0.25-/spl mu/m emitter InP/InGaAs single heterojunction bipolar transistors with f/sub T/ of 452 GHz

Vertical scaling of the epitaxial structure has allowed submicron InP/InGaAs-based single heterojunction bipolar transistors (SHBTs) to achieve record high-frequency performance. The 0.25/spl times/16 /spl mu/m/sup 2/ transistors, featuring a 25-nm base and a 100-nm collector, display current gain cut-off frequencies f/sub T/ of 452 GHz. The devices operate at current densities above 1000 kA/cm/sup 2/ and have BV/sub CEO/ breakdowns of 2.1 V. A detailed analysis of device radio frequency (RF) parameters, and delay components with respect to scaling of the collector thickness is presented.     

Submicron InP-InGaAs single heterojunction bipolar transistors with f/sub T/ of 377 GHz

Submicron InP-InGaAs-based single heterojunction bipolar transistors (SHBTs) are fabricated to achieve record-breaking speed performance using an aggressively scaled epitaxial structure coupled with a submicron emitter process. SHBTs with dimensions of 0.35 /spl times/16 /spl mu/m have demonstrated a maximum current gain cutoff frequency f/sub T/ of 377 GHz with a simultaneous maximum power gain cutoff frequency f/sub MAX/ of 230 GHz at the current density Jc of 650 kA/cm/sup 2/. Typical BV/sub CEO/ values exceed 3.7 V.     

Over 300 GHz f/sub T/ and f/sub max/ InP/InGaAs double heterojunction bipolar transistors with a thin pseudomorphic base

Describes 150-nm-thick collector InP-based double heterojunction bipolar transistors with two types of thin pseudomorphic bases for achieving high f/sub T/ and f/sub max/. The collector current blocking is suppressed by the compositionally step-graded collector structure even at J/sub C/ of over 1000 kA/cm/sup 2/ with practical breakdown characteristics. An HBT with a 20-nm-thick base achieves a record f/sub T/ of 351 GHz at high J/sub C/ of 667 kA/cm/sup 2/, and a 30-nm-base HBT achieves a high value of 329 GHz for both f/sub T/ and f/sub max/. An equivalent circuit analysis suggests that the extremely small carrier-transit-delay contributes to the ultrahigh f/sub T/.     

10-GHz power performance of a type II InP/GaAsSb DHBT

Type-II InP/GaAsSb double heterojunction bipolar transistors (DHBTs) were fabricated and microwave power performance was measured. For an InP collector thickness of 150 nm, the DHBTs show a current gain of 24, low offset voltages, and a BV/sub CEO/>6V. The 1.2/spl times/16 /spl mu/m/sup 2/ devices show f/sub T/=205GHz and f/sub MAX/=106GHz at J/sub C/=304 kA/cm/sup 2/. These devices delivered 12.6 dBm to the load at P/sub AVS/=3.3 dBm operating at 10 GHz, yielding a power-added efficiency of 41% and G/sub T/=9.3 dB.     

Transistor and circuit design for 100-200-GHz ICs

Compared to SiGe, InP HBTs offer superior electron transport properties but inferior scaling and parasitic reduction. Figures of merit for mixed-signal ICs are developed and HBT scaling laws introduced. Device and circuit results are summarized, including a simultaneous 450 GHz f/sub /spl tau// and 490 GHz f/sub max/ DHBT, 172-GHz amplifiers with 8.3-dBm output power and 4.5-dB associated power gain, and 150-GHz static frequency dividers (a digital circuit figure-of-merit for a device technology). To compete with advanced 100-nm SiGe processes, InP HBTs must be similarly scaled and high process yields are imperative. Described are several process modules in development: these include an emitter-base dielectric sidewall spacer for increased yield, a collector pedestal implant for reduced extrinsic C/sub cb/, and emitter junction regrowth for reduced base and emitter resistances.     

Collector-pedestal InGaAs/InP DHBTs fabricated in a single-growth, triple-implant process

This letter reports InP/In/sub 0.53/Ga/sub 0.47/As/InP double heterojunction bipolar transistors (DHBTs) employing an N/sup +/ subcollector and N/sup +/ collector pedestal-formed by blanket Fe and patterned Si ion implants, intended to reduce the extrinsic collector-base capacitance C/sub cb/ associated with the device footprint. The Fe implant is used to compensate Si within the upper 130 nm of the N/sup +/ subcollector that lies underneath the base ohmic contact, as well as compensate the /spl sim/1-7/spl times/10/sup -7/ C/cm/sup 2/ surface charge at the interface between the indium phosphide (InP) substrate and the N/sup $/collector drift layer. By implanting the subcollector, C/sub cb/ associated with the base interconnect pad is eliminated, and when combined with the Fe implant and selective Si pedestal implant, further reduces C/sub cb/ by creating a thick extrinsic collector region underneath the base contact. Unlike previous InP heterojunction bipolar transistor collector pedestal processes, multiple epitaxial growths are not required. The InP DHBTs here have simultaneous 352-GHz f/sub /spl tau// and 403-GHz f/sub max/. The dc current gain /spl beta//spl ap/38, BV/sub ceo/=6.0 V, BV/sub cbo/=5.4 V, and I/sub cbo/<50 pA at V/sub cb/=0.3 V.     

Wideband DHBTs using a graded carbon-doped InGaAs base

We report an InP/InGaAs/InP double heterojunction bipolar transistor (DHBT), fabricated using a mesa structure, exhibiting 282 GHz f/sub /spl tau// and 400 GHz f/sub max/. The DHBT employs a 30 nm InGaAs base with carbon doping graded from 8/spl middot/10/sup 19//cm/sup 3/ to 5/spl middot/10/sup 19//cm/sup 3/, an InP collector, and an InGaAs/InAlAs base-collector superlattice grade, with a total 217 nm collector depletion layer thickness. The low base sheet (580 /spl Omega/) and contact (<10 /spl Omega/-/spl mu/m/sup 2/) resistivities are in part responsible for the high f/sub max/ observed.     

AlGaN/GaN HEMTs on SiC with f/sub T/ of over 120 GHz

AlGaN/GaN high electron mobility transistors (HEMTs) grown on semi-insulating SiC substrates with a 0.12 /spl mu/m gate length have been fabricated. These 0.12-/spl mu/m gate-length devices exhibited maximum drain current density as high as 1.23 A/mm and peak extrinsic transconductance of 314 mS/mm. The threshold voltage was -5.2 V. A unity current gain cutoff frequency (f/sub T/) of 121 GHz and maximum frequency of oscillation (f/sub max/) of 162 GHz were measured on these devices. These f/sub T/ and f/sub max/ values are the highest ever reported values for GaN-based HEMTs.     

InAlAs/InGaAs HBTs with simultaneously high values of F/sub /spl tau// and F/sub max/ for mixed analog/digital applications

We report the design, fabrication, and measurement of InAlAs/InGaAs heterostructure bipolar transistors (HBTs) designed for high speed digital circuits. At 0.96 V V/sub CE/ the current gain cutoff frequency, f/sub /spl tau//, is 300 GHz and the maximum frequency of oscillation, f/sub max/, is 235 GHz. This value of f/sub /spl tau//, is the highest reported for bipolar transistors. At a slightly higher V/sub CE/ bias, a high value of 295 GHz for f/sub /spl tau// and f/sub max/ were obtained simultaneously.     

Diamond FET using high-quality polycrystalline diamond with f/sub T/ of 45 GHz and f/sub max/ of 120 GHz

Using high-quality polycrystalline chemical-vapor-deposited diamond films with large grains (/spl sim/100 /spl mu/m), field effect transistors (FETs) with gate lengths of 0.1 /spl mu/m were fabricated. From the RF characteristics, the maximum transition frequency f/sub T/ and the maximum frequency of oscillation f/sub max/ were /spl sim/ 45 and /spl sim/ 120 GHz, respectively. The f/sub T/ and f/sub max/ values are much higher than the highest values for single-crystalline diamond FETs. The dc characteristics of the FET showed a drain-current density I/sub DS/ of 550 mA/mm at gate-source voltage V/sub GS/ of -3.5 V and a maximum transconductance g/sub m/ of 143 mS/mm at drain voltage V/sub DS/ of -8 V. These results indicate that the high-quality polycrystalline diamond film, whose maximum size is 4 in at present, is a most promising substrate for diamond electronic devices.