基于最小二乘法的对称分数延迟滤波器设计

针对现有分数延迟滤波器在应用过程中对于硬件资源消耗巨大的问题,提出一种优化设计可变分数延时(VFD)有限脉冲响应(FIR)数字滤波器的方法,优化后的滤波器在实现滤波器系数对称性的同时,其滤波性能也不弱于使用非对称系数的传统最小二乘法(WLS)加权滤波器。对称系数可变分数延时滤波器在滤波时仅需要总阶数的一半抽头系数进行计算,大大减少了运算资源,有效降低了实现成本。     

基于改进的Tustin算子的分数阶数字积分器设计

根据传统的Tustin积分算子的积分原理,改变Tustin积分算子的采样间隔,提高积分精度,以此得到了改进的新算子,然后通过Lagrange FIR分数阶延迟滤波器把新积分算子中的分数阶项转换为整数阶,最后采用连续分数展开(CFE)的方法实现了分数阶数字积分器设计.实验证明,设计的分数阶数字积分器在幅频特性上面明显优于传统方法设计的分数阶数字积分器.     

分数导数与数字微分器设计

从信号处理角度来考察分数阶导数和微分问题.首先论述分数阶微积分的基本概念,评论分数阶导数的几种典型定义,并重点探讨分数阶导数的频域定义及其基本性质.紧接着详细研究分数阶微分的实现:理想分数阶数字微分滤波器和FIR分数阶数字微分滤波的基本性质和设计问题,并提出分数阶微分滤波器设计中遇到的新问题以及奇对称微分滤波器、偶对称微分滤波器等新概念.最后给出一些值得进一步探讨的有趣问题.     

一种Farrow结构数字延时滤波器的设计

普通数字延时滤波器虽然结构简单,但系数计算过程复杂,在延时参数快速变化时,系数更新速度无法满足实时性要求,在工程应用上受限制。采用Farrow结构数字延时滤波器能够更加灵活高效地进行分数延时滤波,延时参数改变时,无需重新计算滤波器系数,更容易在现场可编程门阵列(FPGA)上实现。介绍了一种Farrow结构数字延时滤波器,提出采用基于对称结构的滤波器系数求解方法,并经过加权优化,获得最终Farrow滤波器的系数。系数计算过程中,通过对设计所得Farrow滤波器延时精度和误差的分析,调整加权因子的取值和滤波器阶数,进而提高延时精度。计算机仿真结果证明了加权对称系数求解Farrow滤波器系数方法的有效性和实用性。     

春秋视讯专栏

FIR滤波器—先进的FPGA技术对模拟电压信号进行滤波是一种消除非期望信号(如噪声)的方法,并且这种滤波突出感兴趣的滤波。传统的模拟滤波器通常仅用于比较简单的方法中,如高通、低通和带通滤波器。而今,Gage公司的14位数字信号采集卡可以实现复杂的滤波。这种新的FIR滤波器技术允许用户实时处理复杂的数字信号滤波。特性如下:●使FIR滤波器的阶数可以达到20阶,通过软件可以扩展带同步的39阶。●通过调节FIR滤波器的系数可以使其可以和特定波形的信号脉冲适配。●FIR滤波器可以通过Gage公司提供的硬件执行,允许主机并行运行其他程序…     

一种具有频率选择特性的加权伪中值滤波算法

相对于中值滤波而言,伪中值滤波具有计算快速等特点.通过引入负加权系数并使滤波窗口大小无奇偶限制,该文将原有的伪中值滤波扩展为具有负系数的加权伪中值滤波.基于Mallows样本选择概率理论,由FIR滤波器的脉冲响应来获得伪中值滤波器加权系数,使其具有和FIR滤波器一样的频率选择特性.仿真结果表明,本文提出的滤波方法在赋予了伪中值滤波频率选择特性的基础上,减小了计算量,保持了中值滤波所具有的优点,并且能够去除信号中高频的周期性干扰噪声.     

一种分数阶微分IIR滤波器的设计方法和改进

提出一种在不增加分数阶微分滤波器复杂度的前提下,能有效提高分数阶微分滤波器性能的方法.该方法利用几种基于典型微分算子的分数阶微分滤波器之间的互补性,通过相互内插结合的方式,用于提高IIR分数阶数字滤波器的性能.改进后的分数阶微分滤波器频率响应更接近理想分数阶微分滤波器,表明所提方法的有效性.     

小抽取倍数的FIR高效实现

对采样信号进行抽取是软件无线电中的一个重要环节,小抽取率时通常使用有限冲击响应(FIR)滤波器.当FIR滤波器的阶数较高时,将会对信号处理的速度产生较大的影响.针对级联-积分-梳状(CIC)滤波器系数少且全为"1"的特点,提出了在小抽取率时采用单级CIC滤波器和FIR滤波器级联的方式来减少FIR滤波器的阶数,从理论上给出了FIR滤波器减少的阶数和CIC滤波器的阶数之间的关系.在此基础上,借助多相滤波结构还可进一步降低FIR滤波器阶数.计算机模拟验证了方法的有效性.     

LFM信号的一种最优滤波算法

本文提出了一种基于分数阶傅立叶变换的LFM信号的最优滤波算法.首先由线性最小均方误差估计的正交条件出发,得到了连续分数阶傅立叶域上的等效Wiener滤波算子的求解方法;在此基础上,进一步给出了滤波算子的离散化算法.分析及数值仿真的结果表明,这一算法不仅在性能上接近普通的Wiener滤波器,而且计算简单,便于实现.     

一种基于时域滤波的BOC无模糊捕获算法设计

针对二进制偏移载波(BOC)信号进行相关运算时存在多峰的特殊性,设计了一种基于时域滤波的BOC无模糊捕获算法。通过频域分析得到时域滤波器的频率响应,再反推出时域滤波器的系数,构建有限脉冲响应(FIR)滤波器。对不同算法进行仿真,结果证明该时域滤波器能很好地消除BOC信号自相关副峰。降低滤波器阶数,并设计可实现的基于时域滤波和多段匹配滤波器(MMF)－傅里叶变化(FFT)的BOC无模糊捕获算法,仿真分析表明该算法能很好地消除副峰,正确捕获信号。     

基于IFFT的Lubich数字分数微分器系数的快速算法

从信号处理角度考察Lubich系数,分析了Lubich系数的频域特性。设计了一种基于快速傅里叶逆变换(IFFT)的Lubich系数的快速算法。IFFT算法直接求解的Lubich系数不准确,在甚低阶运算时频域存在吉布斯效应,新算法利用零频赋值可有效减弱该效应。数值仿真结果表明,与Lubich准确系数相比,在一定真分数运算阶范围内,新算法求得的Lubich近似系数构建数字分数微分器有更好的效果,且新算法计算复杂度低,运算效率高。     

Approximate realization of digital fractional forward operator using digital IIR filter

In this paper, a simple and an efficient approach for approximating the digital fractional forward operator z ^m (0?<?m?<?1) using digital infinite impulse response (IIR) filter is proposed. In this method, the coefficients of the closed form digital IIR filter derived for the approximation of the fractional forward operator, in a given frequency band, are based on approximation of fractional order systems. First, analog rational function approximation, in a given frequency band, of the fractional power zero (FPZ) is given. Then, the forward difference generating function is used to obtain a closed form IIR digital filter equivalent of the continuous FPZ, which approximates the digital fractional forward operator. Finally, illustrative examples have been presented to illustrate the effectiveness of the proposed design technique of the fractional forward operator z ^m approximation and its use in performing a fractional m-step prediction.     

Design of digital FIR variable fractional order integrator and differentiator

This paper presents an easy and simple method to design variable fractional order digital FIR integrators and differentiators based on fractional order systems. First, closed-form digital IIR fractional order integrators and differentiators have been obtained from the analog rational functions approximations, in a given frequency band, of the fractional order integrator s ^?m and differentiator s ^m (0?<?m?<?1) through the Tustin generating function. Then, closed-form digital FIR fractional order integrators and differentiators by truncation of the digital IIR ones have been derived. Next, polynomial interpolation has been used to design digital FIR variable fractional order integrators and differentiators that can be implemented by the Farrow structure. The main feature of variable fractional order operator is that its order can be changed without re-designing a new fractional order operator. Some examples have been presented through the paper to illustrate the performance and the effectiveness of the proposed design method. The results obtained have been discussed and have been compared to one of the most recent works in the literature using the same design parameters.     

Splitting the unit delay [FIR/all pass filters design]

A fractional delay filter is a device for bandlimited interpolation between samples. It finds applications in numerous fields of signal processing, including communications, array processing, speech processing, and music technology. We present a comprehensive review of FIR and allpass filter design techniques for bandlimited approximation of a fractional digital delay. Emphasis is on simple and efficient methods that are well suited for fast coefficient update or continuous control of the delay value. Various new approaches are proposed and several examples are provided to illustrate the performance of the methods. We also discuss the implementation complexity of the algorithms. We focus on four applications where fractional delay filters are needed: synchronization of digital modems, incommensurate sampling rate conversion, high-resolution pitch prediction, and sound synthesis of musical instruments     

1D and 2D economical FIR filters generated by Chebyshev polynomials of the first kind

Christoffel–Darboux formula for Chebyshev continual orthogonal polynomials of the first kind is proposed to find a mathematical solution of approximation problem of a one-dimensional (1D) filter function in the z domain. Such an approach allows for the generation of a linear phase selective 1D low-pass digital finite impulse response (FIR) filter function in compact explicit form by using an analytical method. A new difference equation and structure of corresponding linear phase 1D low-pass digital FIR filter are given here. As an example, one extremely economic 1D FIR filter (with four adders and without multipliers) is designed by the proposed technique and its characteristics are presented. Global Christoffel–Darboux formula for orthonormal Chebyshev polynomials of the first kind and for two independent variables for generating linear phase symmetric two-dimensional (2D) FIR digital filter functions in a compact explicit representative form, by using an analytical method, is proposed in this paper. The formula can be most directly applied for mathematically solving the approximation problem of a filter function of even and odd order. Examples of a new class of extremely economic linear phase symmetric selective 2D FIR digital filters obtained by the proposed approximation technique are presented.     

Design techniques for high-speed multirate multistage FIR digital filters

This paper presents architecture design techniques for implementing both single-rate and multirate high-speed finite impulse response (FIR) digital filters, with emphasis on the multirate multistage interpolated FIR (IFIR) digital filters. Well-known techniques to achieve high-speed and low-power applications for the single-rate digital FIR architecture are summarized, followed by the introduction of variable filter order selection, optimal filter decomposition, memory-saving and mirror symmetric filter pairs techniques which offer further gains in both performance and complexity reduction for the multirate multistage digital FIR architecture. A filter design example with TSMC 0.25?µm standard cell for 64-QAM baseband demodulator shows that the area is reduced by 39% for low-complexity application. Moreover, for high-speed application, the chip can operate at 714?MHz. Finally, a designed decimator which is used in the CDMA cellular shows that the area is reduced by 70% as compared with conventional approach.     

基于DCR标准调制解调器的设计及仿真

目前国内数字对讲机发展相对于欧美国家比较落后,具体的数字对讲机标准没有出台。为了研发出符合中国数字对讲机标准的调制解调芯片,本文研究日本DCR[1]（digital convenience radio）数字对讲机标准,设计调制解调器。主要包括均方根余弦滚降滤波器、Inverse sinc（Isinc）滤波器和帧同步检测器的设计及仿真。整个系统经过matlab测试,结果显示仿真误码率接近理论值,满足DCR标准。     

Complex coefficient fir digital filters

The complex FIR digital filter is a filter that has complex coefficients in itsZ-domain transfer function. The set of coefficients is determined, based on some criterion, to meet predefined requirements. On this basis, an algorithm is proposed for designing FIR digital filters with asymmetric amplitude response in conjunction with linear phase. Minimax approximation has been adopted for determining the set of coefficients, where the associated set of overdetermined linear equations is solved by using an efficient linear programming algorithm. Computer simulations show that, to meet prescribed specifications, the proposed design algorithm yields a complex FIR digital filter with the lowest order.