Lifetime and drift velocity analysis for electromigration in sputtered Al films,multilayers, and alloys

Besides high lifetimes and a low standard deviation of failure times, the electromigration drift velocity is an important parameter for metallization reliability. Here, lifetimes should be high and drift velocity low. For pure Al films, only properly chosen and optimized sputter conditions yield good film quality and electromigration data comparable to evaporated stripes. Annealing and oxide covering improve lifetime and reduce drift velocity of pure Al structures. For redundant AlTiAl multilayers, annealing yielded an enormous lifetime enhancement of 3 orders of magnitude. However, these stripes are not suited for practical applications because of whisker formation and of an increased drift velocity! These disadvantages do not appear for a lifetime-improving TiN intermediate layer instead of Ti. A further method of lifetime enhancement is Cu-addition which reduces the drift of stripes. Finally, for (Al + Cu)TiN(Al + Cu)-structures, lifetime is improved even further in combination with low drift velocity.     

Investigation of the thermal stress field in a multilevel aluminium metallisation in VLSI systems

A residual thermal stress field in a multilevel aluminium metallisation in VLSI systems is investigated in this paper. Using finite element technique different structures (interconnecting stud, and metallisation systems containing two, three and six aluminium lines) were modelled. It is confirmed that residual stress in these more complex structures significantly differs from the one that residues in single metal line. Finally, it is shown that in a multi-layer metallisation, the upper aluminium layer relieves stress in the lower metal lines (and vice versa), adding an extra compressive stress term to the final tensile stress field.     

Wear out failure mechanisms in aluminium and gold based LDMOS RF power applications

In this paper we will compare the electromigration and hot carrier properties of the old (gold based) and new (aluminium based) metallisation schemes as used in RF base station power amplifiers manufactured by Philips Semiconductors. We will show that the latest generation shows excellent reliability performance while the RF performance has been strongly enhanced. This has been obtained by optimizing the process and device architecture. Both results of electromigration measurements on test structures and electromigration degradation of full devices will be shown. It is concluded that the latest generation LDMOS RF amplifiers shows excellent RF and reliability performance while using an aluminium based metallisation scheme.     

Electromigration in the presence of a temperature gradient: Experimental study and modelling

Electromigration has reappeared as an important failure mechanism in integrated circuits as metallisation linewidths have decreased. Electromigration damage forms at sites of atom-flux divergence, of which the two main sources are microstructural inhomogeneities and local temperature variations (caused for example by track width changes or by nearby active circuits). We present a study of electromigration in sputter-deposited aluminum test structures with imposed temperature gradients using two test geometries. One enables the electromigration behaviour of the metallisation to be quickly characterised as a function of temperature, giving an activation energy; the other allows investigation of the changes in electromigration behaviour for different imposed temperature gradients. The results obtained are compared with computer modelling of the stress build-up during electromigration.     

A novel gate insulator for flexible electronics

Field effect transistors using a poly(triaryl amine) p-channel organic semiconductor in conjunction with anodised aluminium oxide as the gate insulator (Al₂O₃ on Al) are demonstrated. Anodised films are pinhole-free, homogenous oxide layers of precisely controlled thickness. The anodisation process requires no vacuum steps; anodised Al₂O₃ is insoluble in organic solvents, and Al films are cheaply available as laminates on flexible substrates. Anodised Al₂O₃ is confirmed to have high gate capacitance (≈60 nF/cm²) and electric breakdown strength (>3 MV/cm in the working device). This property profile answers to the demands on gate insulators for flexible electronics applications.     

Electromigration mechanisms in aluminum lines

Special test structures were used for investigating electromigration mechanisms. Large-grained Al lines of different lengths and widths were interconnected by varying TiN auxiliary layers. Test current densities lay between 4 × 10⁵ A/cm² and 6 × 10⁵ A/cm² at 200°C. Considering electromigration threshold, grain boundary electromigration was eliminated and interface electromigration appeared, affecting the conductive Al/TiN interface. Interface electromigration clearly contributes to the mass flow of Al lines, and thus can be detrimental for the reliability of metallization. The interface diffusion activation energy is comparable to the grain boundary activation energy. Contrary to a conductive interface, the technical Al surface does not contribute to mass flow. The elimination of interface effects finally brings out homogeneous bulk electromigration. The drift velocity was directly measured after a stress period of 8300 hours at 200°C. For a current density of 4 × 10⁵ A/cm² bulk drift velocity was 7 × 10^?12 cm/s, while grain boundary electromigration surpassed this value by a factor of 300. Electromigration threshold was ascertained for grain boundary as well as for interface and bulk diffusion.     

A direct measurement of electromigration induced drift velocity in Cu dual damascene interconnects

A dual damascene structure with an additional 25 nm Ta diffusion barrier embedded into the upper Cu layer was fabricated to measure the drift velocity of electromigration. The embedded diffusion barrier layer successfully confined void growth into a long and regular shape between the SiN layer and embedded Ta layer. Edge depletion was observed to initiate from the cathode end and elongate into a long and regular shape due to the confinement of the intermediate Ta diffusion barrier layer. With this test structure, electromigration induced drift displacement can be accurately measured with a linear dependence on time. Measurement was conducted at a series of temperatures to obtain the Cu/capping interface diffusion controlled activation energy.     

Localized monitoring of electromigration with early resistance change measurements

A new approach is presented in order to study the local effects of electromigration in metallisations. So-called localized electrical resistance measurements allow us to detect and localize the formation of individual voids and hillocks in metallisation lines submitted to current and temperature stress. Localized electrical resistance measurements are performed by adding a number of voltage terminals at equal distances on the test structure and by measuring the resistance drift of each line segment. Through the use of such a multi-voltage probe (MVP) test structure, the sensitivity of the electrical resistance to the presence of defects is strongly increased. By comparing the observed electrical resistance drift results with the corresponding SEM micrographs, important conclusions can be drawn concerning the nature of the resistance changes. With finite element calculations a quantitative interpretation is obtained of the observed local resistance changes. An additional feature of localized electrical resistance measurements is the possibility to determine the actual temperature profile present in a test strip at the beginning of a current stress experiment, i.e. prior to failure formation.     

Electromigration in Double-Layer Metallization

The electromigration of the top stripe in aluminum double-layer metallization systems was investigated. The current density dependence and the activation energy characterization are important in double-layer metallization. The step-coverage and coating effects of SiN is better than that of Si02. New phenomena associated with electromigration have been observed as follows: 1. The mean lifetime is affected by the material of the dielectric layer. This material effect might be related to the hardness of layer. 2. The mean lifetime due to electromigration depends on the magnitude and polarity of the electric field applied between adjacent stripes. Ordinary stress tests for electromigratfon are done where current is conducted only in the top stripe and not in the bottom stripe. Our results show that this situation is realistic under conditions existing in microelectronic circuits. The proposed method for stress testing should be used to simulate actual condition in microelectronic circuits. We emphasize that the stress test method used to disclose this electric field effect is important for accelerated stress testing, especially for metallization in VLSI circuits and multi-layer systems. The failure mechanism due to the electric field effect can be explained in terms of the applied electric field deflecting current-carrying electrons in the metal stripe, and is independent of leakage current between stripes.     

Prediction of crack growth in IC passivation layers

The aluminium interconnect structures of ICs consists of materials with a large difference in the coefficient of thermal expansion (CTE). The IC backend and packaging processes are characterized by many temperature differences that will generate thermo-mechanical stresses in these interconnect structures. The resulting stress levels can lead to crack propagation in the brittle dielectric and passivation layers. To investigate the sensitivity to crack propagation in these materials, finite element simulations are performed using a J-integral approach. The J-integral approach is used to predict the crack stability for different crack lengths, positions and directions. The obtained results with respect to critical initial cracks match with field observations in actual IC interconnect structures.     

Study of Cu diffusion in an Al–1 wt.%Si–0.5 wt.%Cu bond pad with an Al–1 wt.%Si bond wire attached using scanning electron microscopy

A study with scanning electron microscopy (SEM) and scanning transmission electron microscopy (STEM) of the Al–1 wt.%Si–0.5 wt.%Cu bond pad metallisation with Al–1 wt.%Si wires bonded to it revealed Cu diffusion from the bond pad into the Al wire after an annealing process. Investigation at different annealing times showed a Cu depletion zone which indicates that the radius R is consistent with a behaviour. The diffusion velocity, as determined experimentally, is close to the velocity of grain boundary diffusion. This observation has important consequences with respect to electromigration testing of Al(Si)Cu metallisations bonded with Al wires. The electromigration (EM) process can be influenced by a bad placement of the Al bond wire with regard to the test lines. If bonded too close to the test line, Cu diffusion out of the test line is possible during annealing, thereby changing the microstructure locally and thus the EM process.     

集成电路互连线电迁移测试方法与评价

介绍了研究集成电路互连线电迁移的两种方法：加速寿命试验和移动速度试验。对加速寿命试验进行了分析和评价。分析表明,加速寿命试验方法存在高应力条件与正常工作条件下互连线电迁移中金属离子扩散机制不同、BLACK方程的使用范围有限、受试件特殊结构影响和电阻温度系数TCR随温度变化等问题。介绍了一种改进方法。详细介绍了移动速度试验,指出了其在互连线电迁移研究中的应用。     

Stress evolution and drift kinetics in confined metal lines

A model describing stresses and vacancy system evolution and also drift phenomena caused by electromigration (EM) in metal interconnectors has been proposed. It is shown that the drift kinetics has three main stages, i.e., induction period, quasi-stationary and stationary state. Induction period is characterised by an increase in the stress at the ends of a conductor; drift is absent. Drift begins when the yield limit is achieved at the cathode edge of the conductor. Drift rate increases, reaches a maximum and then decreases down to the stationary value. Characteristic times for all the stages are determined. Also, the effect of the length of the conductor on drift kinetics is analysed.     

Monte Carlo simulation for improving electromigration lifetime by balancing temperature and structural gradients

It has been established that the prime cause for electromigration damage in metallisation lines is the ionic flux divergence, which is mainly associated with temperature and microstructural gradients along the lines. Monte Carlo simulation for electromigration failure has been performed using a model including the above effects. The median time to failure is found to be increased about 100% by employing an imposed grain size distribution to balance the influence of temperature variations. This work demonstrates the possibility and importance of film microstructural control in the presence of a temperature gradient for metallisation reliability improvement.     

Thermomechanical Stress and Strain in Solder Joints During Electromigration

Thermomechanical stress and strain in the solder joints of a dummy area array package were studied as electromigration occurred. A current density of 0.4 × 10⁴ A/cm² was applied to this package, constructed with 9 × 9 solder joints in a daisy chain, to perform the electromigration test. After 37 h, the first joint on the path of the electron flow broke off at the cathode, and the first three solder joints all exhibited a typical accumulation of intermetallic compounds at the anode. Different solder joints exhibited dissimilar electromigration states, such as steady state and nonsteady state. Finite element analysis indicated that during steady-state electromigration, although the symmetrical structure produced uniform distributions of current density and Joule heating in all solder joints, the distribution of temperature was nonuniform. This was due to the imbalanced heat dissipation, which in turn affected the distribution of thermomechanical stress and strain in the solder joints. The maximum thermomechanical stress and strain, as well the highest temperature and current crowding, appeared in the Ni/Cu layer of each joint. The strain in the Ni/Cu layer was significant along the z-axis, but was constrained in the x–y plane. The thermomechanical stress and strain increased with advancing electromigration; thus, a potential delamination between the Ni/Cu layer and the printed circuit board could occur.     

Numerical simulations of buried emitter back‐junction solar cells

We recently introduced the buried emitter back‐junction solar cell, featuring large area fractions of overlap between n⁺‐type and p⁺‐type regions at the rear side of the device. In this paper we analyse the performance of the buried emitter solar cell (BESC) and its generalisations by one‐dimensional device simulations and analytical model calculations. A key finding is that the generalised versions of the BESC structure allows achieving very high efficiencies by passivating virtually the entire surface of p‐type emitters by an oxidised n‐type surface layer. A disadvantage of this type of full‐area emitter passivation in the generalised back‐junction BESC is the need for an insulating layer between the metallisation of the emitter and the contact to the base, which is technologically difficult to achieve. Copyright © 2009 John Wiley & Sons, Ltd.     

Curing of polyimide and the effect of the TEOS SiO2 barrier layer on the electromigration of sputtered Cu with polyimide passivation

The curing process of polyimide and the electromigration of copper films with polyimide (PI) passivation are studied. Thermal analysis of polyimide suggests that imidization completes at ∼200°C with an endothermic reaction associated with the breaking of the C-OH and N-H bonds as revealed by Fourier transformation infrared spectroscopy (FTIR). Although there is 89.8% weight loss when PI is heated from 20°C to 200°C, outgassing of PI passivation is still observed at higher temperatures. Carbon, nitrogen, and oxygen atoms diffuse into Cu during thermal processing of PI/Cu films. The tetraethyl orthosilicate (TEOS) SiO₂ films are used as the barrier layer between PI and Cu to retard the poisoning of Cu. The effect of TEOS SiO₂ film on electromigration of Cu is investigated.     

Surface passivation of high‐efficiency silicon solar cells by atomic‐layer‐deposited Al2O3

Atomic‐layer‐deposited aluminium oxide (Al₂O₃) is applied as rear‐surface‐passivating dielectric layer to passivated emitter and rear cell (PERC)‐type crystalline silicon (c‐Si) solar cells. The excellent passivation of low‐resistivity p‐type silicon by the negative‐charge‐dielectric Al₂O₃ is confirmed on the device level by an independently confirmed energy conversion efficiency of 20·6%. The best results are obtained for a stack consisting of a 30 nm Al₂O₃ film covered by a 200 nm plasma‐enhanced‐chemical‐vapour‐deposited silicon oxide (SiO_x) layer, resulting in a rear surface recombination velocity (SRV) of 70 cm/s. Comparable results are obtained for a 130 nm single‐layer of Al₂O₃, resulting in a rear SRV of 90 cm/s. Copyright © 2008 John Wiley & Sons, Ltd.     

A novel micromachining technique for the formation of extrusions

A novel micro-extrusion process (MEP) has been developed for micromachining applications. Extrusions on the micrometer scale were realized using the compressive stresses resulting from electromigration-induced mass transport in planarized conductors. Electromigration produced compressive stresses at the anodes of passivated metallic interconnects that exceeded the plastic deformation stress, and allowed extrusions to form through simple die patterns etched through the passivation at the anode ends of edge-displacement conductor segments     

Thermal oxidation for crystalline silicon solar cells exceeding 19% efficiency applying industrially feasible process technology

Thermal oxides are commonly used for the surface passivation of high‐efficiency silicon solar cells from mono‐ and multicrystalline silicon and have led to the highest conversion efficiencies reported so far. In order to improve the cost‐effectiveness of the oxidation process, a wet oxidation in steam ambience is applied and experimentally compared to a standard dry oxidation. The processes yield identical physical properties of the oxide. The front contact is created using a screen‐printing process of a hotmelt silver paste in combination with light‐induced silver plating. The contact formation on the front requires a short high‐temperature firing process, therefore the thermal stability of the rear surface passivation is very important. The surface recombination velocity of the fired oxide is experimentally determined to be below S ≤ 38 cm/s after annealing with a thin layer of evaporated aluminium on top. Monocrystalline solar cells are produced and 19·3% efficiency is obtained as best value on 4 cm² cell area. Simulations show the potential of the developed process to approach 20% efficiency. Copyright © 2008 John Wiley & Sons, Ltd.