多元位置相移键控的相干相关解调器

多元位置相移键控(MPPSK)是一种新型单载波调制技术。为提高解调性能,采用窄带滤波器提取相干载波对MPPSK信号的冲击滤波输出进行相干检波,得到信号包络;根据包络信号与本地模板序列的相关性,联合幅度-位置检测法和相关函数检测法,设计出相干相关解调器;基于Matlab仿真对传统的幅度门限解调器和相干相关解调器的性能进行了对比。结果表明,在强噪声环境下两者性能趋于一致;在弱噪声环境下,相干相关解调器提升了系统解调性能且简化了相干接收机结构。分析和实验表明了所提MPPSK解调器的有效性。      

基于MMSE准则的最佳相干FSK解调器

 本文提出用MMSE准则 设计最佳相干FSK解调器.在信道噪声分布未知条件下,导出了该解调器的结构.并给出了分析和计算机模拟实验结果,证明了该解调器在AWGN信道条件下与普通FSK解调器误码性能相同,在信号各个频率振幅受到的衰减不一致,并且为ACGN信道条件下误码性能优于普通FSK解调器,与文献[2]基于MAP准则的改进型FSK解调器的误码性能十分接近;在信道中的噪声为其它分布(如均匀分布)情况下,也有类似上述的结果.     

基于FPGA的QPSK高速解调器的设计与实现

根据无人机系统对数据链路的高速率、低误码的需求,分析比较了QPSK数字中频解调与零中频解调2种方案。针对本系统的特点,采用FPGA及DSP设计实现了一种高速QPSK数字零中频解调器,同时简要分析了高速数字解调器的工作原理,并介绍了高速解调器的硬件与软件实现。     

高码速率遥感卫星LDPC译码模块设计

随着遥感技术的飞速发展,遥感数据的传输速率和编码性能要求越来越高。在高码速率、复杂编码的条件下,设计符合国际空间数据系统咨询委员会(CCSDS)标准的高码速率解调器成为解决遥感卫星数据解调的关键。在软件无线电平台的解调器结构下,分析低密度奇偶校验码(LDPC)译码特点,完成译码模块结构、解调速率、存储规则的设计。设计结果满足高码速率遥感卫星解调器要求,提高了数据的下传效率和空间资源的利用效率。     

全数字BPSK/QPSK解调器原理和应用

详细阐述了全数字BPSK/QPSK调制解调器的原理。对实现数字锁相环(DPLL)所面临的各种问题:误差信号提取、相位跟踪及环路滤波等进行了详尽的说明。由于这种技术可以使解调器省去硬件VCO,解调器大部分都是用软件实现的,因此采用该技术实现的解调器不仅设计灵活、可靠性高、性能好,而且还可以降低对接收机本振精度的要求,很适合于小容量数字通信。目前该技术在国外通信系统中广泛应用。     

基于FPGA的8PSK解调器设计

8PSK是一种高带宽效率的多相位键控调制解调技术,在高速数据传输领域具有广阔的应用前景。对Gardner算法和PFD频相联合检测算法进行了仿真研究,给出了实现8PSK全数字解调器符号同步和载波同步的完整结构。在XILINX公司的ISE环境下,用Verilog语言设计实现了8PSK全数字解调器。对该8PSK解调器的解调性能进行了测试,在误码率为10^-6时,解调损失小于1 dB。     

基于FPGA的低资源低功耗星载解调器实现

星载解调器功能的日趋复杂带来了FPGA资源及功耗的大幅增加,这将对星载系统的可靠性造成不利影响。为了解决这个问题,提出了一种从算法选择及FPGA实现两方面来节约资源降低功耗的方法。首先对FPGA的资源及功耗特点进行了分析,然后以星载解调器设计为例,具体论述了开发过程中在算法选择以及具体实现过程中进行的低资源及低功耗设计方法。并对采用该方法设计的解调器进行了资源统计以及功耗测试,结果表明,该方法对解调器的资源及功耗进行了较好的缩减,提高了其可靠性。     

浅谈智能卡系统中的探测传感器设计

随着科学技术的不断发展,智能卡已逐渐应用于人们生活中的各个领域。对于智能卡,其安全的重要性是不言而喻的,探测芯片传感器可以对智能卡起到保护作用,因此在系统设计中灵活有效的应用探测传感器至关重要。本文通过对智能卡和探测传感器进行介绍,了解了智能卡系统中探测传感器的设计方法和设计思路。芯片、探测传感器和工艺之间互相起到制约的作用,这就给智能卡系统对探测传感器的设计提供了指导方法。文章最后还强调了探测传感器在智能卡安全设计中的重要作用。     

一种用于无线植入式神经控制信号传输的低功耗BPSK解调器的CMOS实现

本文提出了一种新的BPSK解调器。在这个解调器中,设计了一种结构非常简单的时钟倍频器电路来代替传统BPSK解调器中的模拟乘法器,使得所设计的解调器电路结构简单、功耗较低,从而更适合于无线植入式神经记录系统中体内部分的单芯片设计。所提出的BPSK解调器采用Global Foundries 0.35 ?m 3.3 V标准CMOS工艺实现,芯片面积仅0.07 mm2,功耗只有0.5 mW。芯片测试结果证明它能正常工作。     

基于FPGA的全新数字化PCM中频解调器设计

为了对中频PCM信号进行直接解调,提出一种全新的数字化PCM中频解调器的设计方法。在实现过程中,采用大规模的FPGA芯片对位帧同步器进行了融合,便于设备的集成化和小型化。这种新型的中频解调器比传统的基带解调器具有硬件成本低和误码率低等优点。     

非相干解扩解调器频偏影响分析

频偏的存在相当于对带限信号的频谱进行了搬移，使解扩信号经过带限滤波器后能量受到损失，从而降低了系统的误码性能。本文首先详细分析了零中频非相干解扩解调器误码性能的影响，推导出误码率表达式，然后提出了改进型非相干解扩解调器，并分析了它的误码性能，最后对这两种解扩解调器误码特性进行了比较。     

GMSK Demodulator Implementation for ESA Deep-Space Missions

This paper discusses a new implementation of a Gaussian minimum-shift keying (GMSK) modulator and demodulator on the European Space Agency (ESA)'s common deep-space receiver-the Intermediate Frequency Modem System (IFMS), which is a software radio based platform. The GMSK demodulator is needed for ESA's deep-space and near-Earth missions, starting with the Herschel-Planck satellites in 2008. The implementation requirements and hardware restrictions from the IFMS lead to the need for a significant simplification versus the optimum demodulation approach. In part, this can be achieved by using a demodulator based on the Laurent decomposition, yet further simplifications and changes to obtain a feasible implementation were necessary. The presented GMSK demodulator was directly implemented on the existing IFMS receiver without requiring any hardware changes. Measurements with the demodulator showed only a marginal technical degradation in the order of 0.1-0.3 dB for the chosen approach. Furthermore, for testing purposes, a GMSK modulator was implemented on the same platform.     

Novel 2?4 PSK differential demodulator for satellite broadcast receivers using SAW technology

A novel 2?4 PSK differential demodulator based on a three-port SAW delay line is described. A method for optimising the performance by tuning the carrier frequency using the DC output of the demodulator is outlined. The optimum performance of the demodulator was within 0.4 dB of theory for a bit error ratio of 10?3.     

A comparative study of higher-order differential phase shift keying schemes over AWGN and Rayleigh fading channels

Double differential phase shift keying (DDPSK) is known to be immune to Doppler shift, a property that is valuable in mobile communication systems. The present paper is about DDPSK and analyzes its two variations, the adjacent DDPSK and the nonadjacent DDPSK. The performance is evaluated for the case of slow Rayleigh fading with and without frequency offset using the three receiver structures: the IQ demodulator, the autocorrelation demodulator, and the multiphase autocorrelation demodulator. In additive white Gaussian noise channels (AWGN), the performance of both schemes is evaluated in the presence of a frequency offset with the above demodulators. The obtained analytical results are verified via Monte Carlo simulations. The obvious disadvantage of DDPSK is its power requirements when compared to the conventional DPSK. In order to overcome this shortcoming, a demodulator structure is proposed in this paper. The performance of this demodulator is found to yield a lower probability of error when compared to the other demodulators for DDPSK as well as for DPSK. Results obtained using computer simulation of the proposed demodulator was found to be in good agreement with the analytical results derived in this paper.     

一种可用于DVB-T的OFDM全数字解调器

OFDM是一种高效的数据调制方式，被广泛地应用于宽带数字通信领域。DVB-T就将它作为物理层的传输制式。本文提出了一种可用于DVB-T的OFDM全数字解调器。文章首先分析了各种因素对解调的影响，提出了全数字解调器的结构，然后介绍了符号同步、载波同步、时钟同步和信道补偿等模块在解调器中的全数字实现，最后给出了解调器的误码性能。结果表明，本文提出的全数字解调器具有较好的性能。     

Likelihood-Based Demodulation in Multi-User Chaos Shift Keying Communication

This paper deals with the theory of multi-user chaos shift keying communication systems in the coherent case and in particular with bit error performance under near optimal demodulation. The new approximated likelihood and near optimal demodulator is based on the statistical likelihood of the received signal and is a theoretical generalization of the conventional correlation demodulator involving autocorrelations of the spreading. Near optimal theoretical results beginning from an exact analysis are derived for the bit error rate of a typical user; there is emphasis on their structure in regard to separating the effects of channel noise and interference from other users, and in comparison with single-user results. The new demodulator is shown under particular assumptions to be a form of rake demodulator in the sense that it involves autocorrelation-like terms at various lags. The results are illustrated by theoretical calculations and numerical simulations which point out the enhanced performance of the near optimal demodulator relative to the correlation demodulator.     

一种FSK反正切差分解调方法

针对频移键控在通信系统应用中其调制解调技术在一定程度上直接影响通信系统的性能,提出了一种FSK数字解调方法,称作反正切差分解调.该方法基于正交反正切算法,正交信号直接相除消除了幅度调制成分.新的方法适用于窄带和宽带的FSK信号并适合于数字接收机.仿真结果表明,该技术能有效解调FSK信号,并适合于多种制式的FSK信号.     

Novel Optical Phase Demodulator Based on a Sampling Phase-Locked Loop

A novel phase-locked coherent demodulator, based on a sampling phase-locked loop, is presented and investigated theoretically. The demodulator is capable of operating at high frequencies, by using optical sampling to downconvert the high-frequency input radio-frequency signal to the frequency range of the baseband loop. We develop a detailed theoretical model of the (sampling) phase-locked coherent demodulator and perform detailed numerical simulations. The simulation results show that the operation of the sampling demodulator resembles the operation of the baseband demodulator for very short optical pulses (<2 ps). Furthermore, we investigate how the signal-to-noise ratio of the demodulator is affected by timing and amplitude jitter of the pulsed optical source     

Reduction of AM-induced penalty in DPSK receivers by sum-squaredemodulation

A DPSK (differential phase shift keying) demodulator which is insensitive to the amplitude modulation induced by semiconductor optical amplifier phase modulators is proposed. The demodulator consists of only two additional power dividers/combiners, compared to a traditional DPSK demodulator. Analysis shows that the receiver penalty caused by amplitude modulation can be reduced from 2-4 dB to zero. The demodulator is demonstrated in a 2.5-Gb/s DPSK system experiment using an optical amplifier as phase modulator     

Demodulator for pal television signals with delay lines after the synchronous demodulator

A PAL demodulator which has a delay line after each synchronous demodulator is described. The error of the delay lines can be much greater, and their bandwidth can be smaller, than in the existing PAL demodulator.