蛇形防护线降低非平行传输线中串扰的研究

非平行传输线之间的耦合(串扰)是非常复杂且难以预测的,但是在高速电路中,这种串扰影响又必须考虑在内.文中针对非平行传输线问题,在其间加入蛇形防护线以降低串扰,同时根据非平行结构的特殊性,又对蛇形防护线的一般结构进行改进,将非平行传输线单元下的规则蛇形线改用间隔较小的不规则蛇形线,并在蛇形线上加入短路过孔,以进一步减小远端串扰.结果表明,我们的设计能有效抑制线间的串扰,具有实际的应用价值.     

声频工程的综合布线及安全设计

声频工程的综合布线及安全设计主要是指综合布线及音响系统与电网合理连接,控制室内的静电防护,模拟系统抑制干扰噪声,数字系统防止数码信号遭受破坏。它关系着人身安全,应该放在首位。     

车载电子设备方舱布线工艺

布线工艺对电子设备方舱电气性能有着重要的影响,针对布线所要考虑的走线轨迹、电缆长度和电缆布设绑扎防护问题,结合工程实践提出了电缆布设"定长定轨"工艺设计方法,并介绍了电缆布设绑扎防护工艺,改变了传统的布线生产工艺方式电缆制作的滞后性,有效提高了布线施工效率和布线质量。     

PCB布线设计(之二)

工程领域中的数字设计人员和数字电路板设计专家在不断增加,这反映了行业的发展趋势。尽管对数字设计的重视带来了电子产品的重大发展,但仍然存在,而且还会一直存在一部分与模拟或现实环境接口的电路设计。模拟和数字领域的布线策略有一些类似之处,但要获得更好的结果时,由于其布线策略不同,简单电路布线设计就不再是最优方案了。本文就旁路电容、电源、地线设计、电压误差和由PCB布线引起的电磁干扰(EMI)等几个方面,讨论模拟和数字布线的基本相似之处及差别。模拟和数字布线策略的相似之处旁路或去耦电容在布线时,模拟器件和数字器件都…     

多端互连线网络布线时延的研究

互连线时延是集成电路设计中非常重要的影响因素。本文根据Elmore延迟模型推导出多端互连线的延迟估算公式，得出了在满足设计规则的前提下，多端互连线网络应尽量遵守的布线规则，即互连线之间不要有重叠，且从源点到每个终点都要走最短的曼哈顿路径。这种布线规则可以在不增加芯片面积的基础上使互连线时延减少，这对指导高速IC芯片的版图设计有重要的理论和实践指导意义。     

使用防护布线减小差分传输线间的高频串扰噪声

随着高速电路的不断发展,差分传输线得到了越来越广泛的应用。它具有低辐射和较好的抗共模噪声能力。但是传统的差分线结构不能有效的降低邻近差分对之间的串扰噪声,这将影响到高速系统的信号完整性。文章针对使用防护布线的方法,讨论了三种不同结构的防护布线,在全波电磁仿真软件HFSS中建立了三维物理模型,利用混模S参数分析了它们对于减小串扰噪声的作用,从场的角度对比了它们的电磁屏蔽效果,并对如何使用防护布线提出了一些建议。     

机动车驾驶人考试中心雷电防护探讨

本文从湘西州机动车驾驶人考试中心的地理特征和自然条件出发,充分利用地勘和实际测量数据,经过计算确定各建筑物的防雷类别和雷电防护等级,并对考试中心综合雷电防护措施进行探讨,从直击雷、接地、等电位连接、屏蔽、合理布线以及浪涌保护器等多个方面进行阐述。     

浅谈现代综合防雷防护措施

本文介绍了雷电的产生和雷击破坏的主要形式，并从接闪、等电位连接、接地、屏蔽、过电压保护、合理布线等六个方面介绍了现代综合防雷防护措施。     

砷化镓超高速集成电路布线设计——基于门阵的宏元胞方式

文章研究了在ＧａＡｓ工艺，双层金属布线，基于门阵的宏元胞模式下，采用时间驱动算法布局设计（ＴｉｍｉｎｇＤｒｉｖｅｎＰｌａｃｅｍｅｎｔ）的布线算法，算法以芯片性能得到最大限度的改善，包括芯片关键路径时延最短，互连线总长最短，最长互连线最甜，布线密度均匀等为目标，从而达到超高速的目的。     

使用Prote199se设计印制电路板

随着设计自动化、网络化水平的进一步提高，印割电路板设计由原来有手工贴线的印制板设计方法到计算机辅助画板、计算机自动布线，随之而来的是设计工具的越来越庞大，要高效合理的使用成为技术改造中的关键问题，本文结合我厂广泛使用的线路设计工具Prote199se，讨论使用该工具如何设计印制电路板的问题。     

A Serpentine Guard Trace to Reduce the Far-End Crosstalk Voltage and the Crosstalk Induced Timing Jitter of Parallel Microstrip Lines

A serpentine guard trace is proposed to reduce the peak far-end crosstalk voltage and the crosstalk induced timing jitter of parallel microstrip lines on printed circuit boards. The vertical sections of the serpentine guard increase the mutual capacitance without much changing the mutual inductance between the aggressor and victim lines. This reduces the difference between the capacitive and inductive couplings and hence the far-end crosstalk. Comparison with the no guard, the conventional guard, and the via-stitch guard shows that the serpentine guard gives the smallest values in both the peak far-end crosstalk voltage and the timing jitter. The time domain reflectometer (TDR) measurement shows that the peak far-end crosstalk voltage of serpentine guard is reduced to 44% of that of no guard. The eye diagram measurement of pseudo random binary sequence (PRBS) data shows that the timing jitter is also reduced to 40% of that of no guard.      

防护线减小微带线间串扰的FDTD分析

随着信号转换速度日益提高,高速电路设计中的串扰问题也日趋严重。该文分析了使用防护线减小PCB微带线间串扰的效果,并运用FDTD对长耦合微带线进行了仿真验证。仿真结果表明,只要:(1) 添加有接地过孔的防护线并使过孔间距小于信号在RT/2(RT:传输信号的上升时间)时段内的传输距离;(2) 在满足线间距布线规则的前提下,将防护线适当加宽而又维持三条线(防护线和两条微带线)中两两之间的中心距不变,就能够有效减小线间的远端和近端串扰。     

一种600V VDMOS终端保护环结构的设计

本文详细讨论了VDMOS终端保护环结构各部分,即保护环、保护环间隙和场板的作用及设计方法。结合600VVDMOS的外延电阻率和厚度,一种600VVDMOS终端保护环结构被成功设计出来。     

Common-mode current due to a trace near a PCB edge and its suppression by a guard band

The common-mode (CM) current due to a trace near a printed circuit board (PCB) edge, and its suppression by a guard band have been studied experimentally and with finite-difference time-domain (FDTD) modeling. As the guard band, copper tape is connected along the entire edge of the ground plane. First, a PCB electromagnetic interference (EMI) coupling path that results from the nonzero impedance of the PCB ground plane is discussed. As the trace is moved closer to the PCB edge, the CM current increases. Then, the effect of the guard band on the CM current is detailed. A guard band parallel to and near a trace is most effective in suppressing the CM current. The cross-sectional magnetic field distribution at center of the PCB with and without the guard band is also calculated with FDTD modeling. The guard band decreases the magnetic field distributed on the reverse side of a PCB. These results indicate the guard band is effective in suppressing CM current. Finally, an empirical formula to quantify the relationship between the position of a trace and CM current for the case with a guard band is proposed. Calculated results using the empirical formula and FDTD modeling are in good agreement, which indicates this empirical formula should be useful for developing EMI design guidelines.     

一种新型4H-SiC BJT结终端结构研究

设计了一种应用于4H-SiC BJT的新型结终端结构。该新型结终端结构通过对基区外围进行刻蚀形成单层刻蚀型外延终端,辅助耐压的p+环位于刻蚀型外延终端的表面,采用离子注入的方式,与基极接触的p+区同时形成。借助半导体数值分析软件SILVACO,对基区外围的刻蚀厚度和p+环的间距进行了优化。仿真分析结果表明,当刻蚀厚度为0.8μm,环间距分别为8,10和9μm时,能获得最高击穿电压。新结构与传统保护环(GR)和传统结终端外延(JTE)相比,BVCEO分别提高了34%和15%。利用该新型终端结构,得到共发射极电流增益β>47、共发射极击穿电压BVCEO为1 570V的4H-SiC BJT器件。     

Accurate design methodology to prevent crosstalk

Presented are the effects of a guard trace with the optimal number of grounded vias that gives maximum efficiency for preventing crosstalk in parallel double micro-strip lines in a high-speed printed circuit board layout. Compared to a guard trace with two terminal grounded vias, the near-end crosstalk is reduced from 95 to 30 mV and the far-end crosstalk is reduced from 121 to 56 mV     

Analysis of a hierarchical cellular system with reneging anddropping for waiting new and handoff calls

We analyze a hierarchical cellular system with finite queues for new and handoff calls. Both the effect of the reneging of waiting new calls because of the callers' impatience and the effect of the dropping of queued handoff calls as the callers move out of the handoff area are considered, besides the effect of the guard channel scheme. We successfully solve the system by adopting the multidimensional Markovian chain and using the transition-probability matrix and the signal-flow graph to obtain the average new-call blocking probability, the forced termination probability, and the average waiting time of queued new and handoff calls. We further investigate how the design parameters of the buffer sizes and guard channel numbers in macrocell and microcells affect the performance of the hierarchical cellular system. The results show that provision of a buffering scheme and guard channel scheme can effectively reduce the new call blocking probability and the forced termination probability in the hierarchical cellular system, and the effectiveness is more significant in the macrocell than in the microcells     

On The Problem of Using Guard Traces for High Frequency Differential Lines Crosstalk Reduction

In this paper, the problem of using guard traces for reducing crosstalk between differential transmission line pairs is investigated, both experimentally and by full-wave electromagnetic (EM) simulations. Different cases of differential lines crosstalk are treated with and without guard trace separation between the differential line pairs. Coated microstrip printed circuit board test structures including thru-reflect-line calibration standards are designed and fabricated on a high frequency laminate material, allowing direct measurement of crosstalk between adjacent differential line pairs in the absence and in the presence of guard traces stitched with vias of regular spacing. The test structures are characterized with mixed-mode scattering parameters using a physical layer test system. Different configurations (of differential line pairs) without guard trace, with floating guard traces (which are terminated and nonterminated) and with a solid guard trace separation are investigated using a High Frequency Structure Simulator (a commercial full-wave 3-D EM simulation tool). The experimental data are compared with the simulation results, and some conclusions and guidelines on the effect of guard traces for alleviating crosstalk between differential transmission lines are presented     

Design and optimisation of suitable edge terminations for 6.5 kV IGBTs

This paper is addressed to the design and optimisation of junction termination extension and floating guard rings edge termination structures to integrate 6.5 kV IGBT devices. The developed edge termination structures are extensively analysed through numerical simulations, and experimental data on fabricated diode structures are correlated with simulation results.     

减小PCB微带线间串扰方法分析

为降低和控制耦合微带线问的串扰,在强信号线两边加入含接地孔的防护线,本文利用FDTD法对这一模型进行模拟,验证了该方法的有效性,仿真结果表明,防护线的性能与防护线的高度、宽度和防护线上孔径等几个因素有关.