Introducing VLSI computer-aided design into the EE curriculum: acase study

The authors describe a case study at Purdue University's School of Electrical Engineering in the successful integration of VLSI CAD (computer-aided design) into both the undergraduate and graduate curriculum. The courses in VLSI chip design use the Manassas VLSI Interactive System for Automation (MVISA), a CAD program that implements all stages in the VLSI design process including logic entry (schematic capture), logic simulation, timing analysis, design rule checking, placement of cells, and automatic and manual wiring. The successful integration was due to several factors, including university-industry-government cooperation; the development of a comprehensive set of interactive tutorials and notes describing the lab procedures and VLSI issues considered in the class; and a coherent, structured approach to teaching system design as well as the use of CAD tools in this process. Modern educational techniques, including computer-aided instruction and videotaped lectures on VLSI, also played a part in the development of the CAD courses     

A microprocessor design project in an introductory VLSI course

An introductory very large scale integration (VLSI) design course has been taught at the University of Michigan (USA) since 1980. In 1990, it was redesigned around a simple 8-bit microprocessor project in the format described in this paper; in 1996, the project was updated to a 16 bit reduced instruction set computer (RISC) processor. The authors describe the course philosophy, content, and the baseline architecture from which class projects begin. The key features of the course are: close coordination of lectures and project activity; prompt and regular feedback on design work; and a schedule which spreads the workload over the full term. In this course, students learn VLSI fundamentals and good design methodology that will be important throughout their careers     

Field programmable gate arrays. A cheaper way of customizingproduct prototypes

Advances in VLSI technology have brought very complex digital systems onto a very small area of silicon. However, the design cycle times associated with the conventional VLSI designs have called for a technology that will support very rapid system prototyping. Also, the non-recurring engineering (NRE) costs associated with existing VLSI technologies are very high. An ideal design style should support rapid prototyping at almost no or very nominal NRE costs. FPGA is an attempt in this direction. FPGAs have a potential for matching both speed and density of mask programmed gate arrays (MPGAs). It is expected that more and more digital designs will be built on FPGAs, and FPGA based designs will outnumber the MPGA based designs in the near future. The author begins by discussing the nature of FPGAs and their architecture (with design tools). The author goes on to discuss custom computing     

Design of high-speed,high-density CNNS in cmos technology

An analogue VLSI circuit architecture for the CMOS implementation of cellular neural networks (CNNs) is presented. It is based exclusively on the use of small capacitors and operational transconductance amplifiers operating in continuous time. Integrated circuit implementations of this architecture are very well suited for processing applications requiring large array size and high speed. We describe a systematic design approach for those circuits and present the design, fabrication and testing of two chips. These chips are used for connected component detection applications and are the first working integrated circuit implementation of a CNN. They contain 2000 transistors and have been fabricated using 2 μm CMOS technology. the density is 32 cells per square millimetre of silicon and the time constant of the processing is of the order of 10^?7 s. Experimental results of static and dynamic tests are given, including a complete image-processing example.     

Design and fabrication of a CMOS signal conversion integratedcircuit for remote control hobbyists

The availability of low-cost VLSI (very large scale integration) design software and fabrication services for design, simulation, and layout of integrated circuits has become readily accessible to universities for classroom instruction. The design and fabrication of a CMOS integrated circuit is described, which converts an eight-bit digital signal to a pulse-width modulated (PWM) signal and vice versa for radio control hobbyist transceivers and motor servos. This example design serves to describe a subset of VLSI design tools from the University of California, Berkeley, the University of Washington, and Microelectronics Center of North Carolina and MOSIS fabrication services available for classroom instruction     

A new course on supercomputers and parallel architectures

Parallel processing and distributed computing are two areas attracting a great deal of attention. Several universities and institutions are involved in the teaching of courses on parallel programming, distributed operating systems and parallel algorithms, but very few of them offer a course from the hardware point of view. The course structure presented in this paper gives a considerable emphasis on the hardware for parallel processing. Various topics such as the design of high speed computing devices, hardware design of multiple pipelines, design of a variety of memory configurations, design of an NXN interconnection network and the hardware for systolic architectures and neural network architectures are presented in this course. Students have the opportunity to actually design a distributed shared memory system using IBM PC machines and write software for them. The assignments for the course are in the form of both individual and group projects on the implementation of various schemes for parallel processing such as synchronization mechanisms (e.g., locks and barrier) in hardware. In addition, a group project deals with the design of a pipelined floating point unit. Further, a complementary course on VLSI provides the necessary skills for the students to implement the devices as a VLSI chip. Students also have the opportunity to do hands on work with transputers and develop hardware and software based around them. This course has received good feedback both from academia and industries within Australia     

The average capacitor current method for delay calculation in MOS circuits

The transient response of metal-oxide-semiconductor (MOS) gates is a topic covered in most textbooks on digital integrated circuits and very-large-scale-integration (VLSI) design. One method often used to calculate first-order estimates of gate delays is the average capacitor current method. Using this method, the delay is calculated assuming that the capacitor current is constant and equal to the average of the capacitor current values at the limits of the time interval of interest. In this paper, this method is discussed and compared with other methods of delay calculation using integration and curve-fitting techniques familiar to electrical and computer engineering students. Since the computation of the capacitor current is relatively complicated because it requires the calculation of the MOS transistor currents, for propagation delay calculation there is no benefit in calculating the capacitor current twice. A single current calculation, corresponding to the familiar midpoint integration method, is sufficient to get the same or better accuracy as that of the average capacitor current method. The two-point Gauss quadrature formula is shown to provide excellent results with two capacitor current evaluations.     

A digital signal processing laboratory for undergraduates

An undergraduate level laboratory on digital signal processing (DSP) is described. The equipment used and samples of student experiments are described in detail. The lab is based on the TMS320 digital signal processor and is equipped with spectral analysis and audio signal processing capabilities. The primary purpose of the lab is to supplement a course on digital filter design and implementation. However, it can also be used for senior design projects involving DSP applications     

Reflections on Teaching and Learning in an Advanced Undergraduate Course in Embedded Systems

An integrated series of courses on embedded systems has been developed at Iowa State University, Ames, spanning early undergraduate to graduate levels. The newest course in the series is CPRE 488: Embedded Systems Design, an advanced undergraduate course that fills a gap in the curriculum by providing system-level design experiences and incorporating new technology advancements. CPRE 488 development focused on lecture–lab integration and laboratory learning. Course and lab activities were designed using a learning model that captures lower-order and higher-order cognition levels of Bloom's taxonomy. The learning experience in the laboratory is characterized using a technique to assess cognitive behavior. Results of applying the Florida Taxonomy of Cognitive Behavior are presented to summarize the depth of student learning and the opportunities for students to progress to higher-order thinking in the laboratory. After two years of experience with the new course, the authors reflect on the course design and outcomes, from both disciplinary and pedagogical viewpoints.      

FFT Spectrum Analyzer Project for Teaching Digital Signal Processing With FPGA Devices

This paper presents a course on digital signal processing with field-programmable gate arrays (FPGA) devices. The course integrates two separate disciplines, digital signal processing (DSP) and very large scale integration (VLSI) design, and focuses on the development of a sophisticated DSP design from simulation to fixed-point implementation. The structure and methodology used in the proposed course are oriented to the design and implementation of an fast Fourier transform (FFT) spectrum analyzer. This application covers most topics included in a DSP course and gives better results that those obtained with typical courses performing independent multiple simple experiments. The project is divided into modules that show specific learning necessities and determine the course contents and organization. Each laboratory part is dedicated to design and implements the block of the analyzer related to the theoretical content presented in the class. At the end of the course the students have designed all the pieces in the DSP project and have completed and verified the system. The used methodology enables students and engineers to understand and develop complex fixed-point applications, looking for the best signal processing algorithms on hardware implementations, and also results in more motivated and active students.     

Integrating UAHPL-DA systems with VLSI design tools to support VLSIDA courses

A complete operational environment established with the help of state-of-the-art tools, to support courses in design automation (DA) of VLSI circuits, is described. It was accomplished with the integration of two systems: (1) a DA system which automatically produces VLSI layouts of digital systems modeled in Universal Hardware Programming Language (UAHPL); and (2) a set of VLSI tools, which in addition to several other functions can be used for simulation and verification of layout designs. Compared with other approaches, the integrated DA system provides a very simple user interface, fast turnaround time, no restriction on the final structure of the layout, and simulation and verification of all phases of design. The new environment, called UAHPL-based VLSI DA, is excellent for teaching and research at universities     

Analog CMOS integrated circuit design: research and undergraduateteaching

The authors describe the use of software that was developed as part of a research program in analog CMOS integrated circuit design for an undergraduate course on analog VLSI design. The software includes some unusual uses of readily available, inexpensive, and easy-to-use programs available for microcomputers such as Macintosh or IBM-PC clones. Although initially intended to help with the design of CMOS operational amplifiers, the IC design method used is very general; other possible applications are described. The flexibility of these programs also allows them to be used with other CAD (computer-aided design) software, including circuit simulators and programs for schematic entry and layout. The software tools allow undergraduate students to complete analog CMOS integrated circuit designs using advanced CAD techniques but without being overwhelmed or losing touch with the underlying circuit design principles. Details of the programs and their use are presented together with the resulting analog IC designs fabricated using MOSIS (MOS Implementation Service)     

Synthesis tools help teach systems concepts in VLSI design

The VLSI project class at Princeton University has been redesigned, using modern logic and layout synthesis tools, to emphasize system design issues. The design methodology taught in the class allows students to build larger designs; it also allows them to learn, by redesign, how to trade off layout, circuit, logic, and architectural design problems. Two synthesis tools were developed (based on the Oct tool set from UC Berkeley) to generate standard cell layouts: one which takes as input finite-state machine transition tables; and one which generates netlists using C programs. The author describes; what is important for students to learn in a VLSI design class; the design methodology developed to teach this curriculum through a design project; and the CAD tools used to support this design methodology     

High-speed optoelectronic VLSI switching chip with >4000 opticalI/O based on flip-chip bonding of MQW modulators and detectors tosilicon CMOS

We present the first high-speed optoelectronic very large scale integrated circuit (VLSI) switching chip using III-V optical modulators and detectors flip-chip bonded to silicon CMOS. The circuit, which consists of an array of 16×1 switching nodes, has 4096 optical detectors and 256 optical modulators and over 140K transistors. All but two of the 4352 multiple-quantum-well diodes generate photocurrent in response to light. Switching nodes have been tested at data rates above 400 Mb/s per channel, the delay variation across the chip is less than ±400 ps, and crosstalk from neighboring nodes is more than 45 dB below the desired signal. This circuit demonstrates the ability of this hybrid device technology to provide large numbers of high-speed optical I/O with complex electrical circuitry     

The AMOEBA switch: an optoelectronic switch for multiprocessornetworking using dense-WDM

We present a single-chip asynchronous multiprocessor optoelectronic bit-sliced arrayed (AMOEBA) crossbar switch. The AMOEBA switch addresses the challenge to produce a large-scale, nonblocking packet switch through dense integration of photonic devices directly onto silicon VLSI circuits. Optoelectronic-VLSI technology is used to integrate the switch fabric, routing controller, packet buffers, line interface circuits, and optoelectronic conversion devices on a single chip. We show how free-space optical interconnects and wavelength-and-space-division-multiplex networking on single-mode fibers can provide switched interconnection between multiple nodes in a distributed computing environment. An optomechanical transceiver package accomplishes the free-space-to-fiber interfacing. We report the implementation and testing of the key components of a 16-channel AMOEBA prototype switch with a potential capacity of 12.8 Gb/s (or 800 Mb/s/channel), and capable of switching 16 million packets per second     

高校虚拟实验室的构建

本文首先介绍了将虚拟仪器技术应用于实验室教学的背景,详细论述了构建虚拟实验室平台的方法.虚拟实验室的建立弥补了传统实验室的不足,使教学更为生动,实验的设计更加灵活.在教学实验的创新改革过程中,虚拟实验室减少了对硬件仪器的依赖,能紧跟当前科技发展的趋势.     

A new analytical/iterative approach to statistical delay characterization of cmos digital combinational circuits

This paper is believed to be one of the first attempts to statistically characterize signal delays of basic CMOS digital building blocks. Analytic expressions in terms of the transistor geometries and technological process variations are provided for fast delay computations, to be used for manufacturing yield optimization, delay variability reduction and general VLSI circuit design for quality. the proposed approach is novel in several ways: (1) It is a combination of an accurate, semi-empirical MOS transistor model with the use of an efficient interpolation technique to link the non-physical model parameters to the ‘designable’ and ‘noise’ factors. (2) It uses several newly developed analytical delay formulae where possible and simple iterative solutions where direct analytical solutions do not exist. (3) the resulting hybrid analytical/iterative models are tuned, if necessary, to enhance the overall statistical accuracy. (4) Local delays are combined together for the analysis of complex combinational VLSI circuits. (5) C-code is generated for specific delay paths to further increase efficiency (improvement in analysis times by two to four orders of magnitude with respect to SPICE, with about 5%-10% accuracy). Examples of statistical delay characterization are used to illustrate the high accuracy of the proposed approach in modelling the influence of the ‘noise’ parameters on circuit delay relative to direct SPICE-based Monte Carlo analysis. the important impact of the proposed approach is that statistical evaluation and optimization of delays in much larger VLSI circuits will become possible.     

A Senior-Level Course in Hardware–Software Codesign

Modern electronic system design makes extensive use of programmable architectures, and requires designers to consider hardware and software jointly in their design. A senior-level course named Hardware/Software Codesign provides a practical introduction to these complex system design issues. The challenge is to bring a subject, which is traditionally covered as a graduate-level course, to senior undergraduate students without overly narrowing down the scope, and without turning the course into an ad-hoc design project. The course combines an incremental, structured overview of hardware/software codesign with practical assignments that emphasize key concepts. This paper reviews the motivations for this course, the curriculum, the lab materials and tools used, and the results of the first offering of the course in fall 2006.