Extremely high packaging densities by operating integrated circuits with r.f. power

A binary circuit configuration in which the transistors operate with r.f. power is described. This mode of operation allows the use of very simple circuitry. I.C. configurations in which this principle is exploited to maximum advantage are proposed.     

High-power GaAs f.e.t. prepared by molecular-beam epitaxy

High-power GaAs field-effect transistors were fabricated on molecular-beam epitaxial GaAs crystals. Devices with a power output at 1 dB gain compression of 4.0 W, a corresponding linear gain of 5.4 dB and a power-added efficiency as high as 35% have been realised.     

Tunable X band GaAs f.e.t. amplifier

The design of a frequency-tunable X band amplifier using GaAs Schottky field-effect transistors is described. By using a broadband input matching circuit and a frequency-tunable output matching circuit, the gain of 7±0.5 dB obtained from a single-stage amplifier may be varied from 8 to 10 GHz, with corresponding terminal v.s.w.r.s, over any 600 MHz band width, better than 2:1. A single-stage amplifier gives a noise figure of 4.7 dB with a gain of 5.8 dB, and a 2-stage amplifier a 6.0 dB noise figure with 12.5 dB power gain.     

Full-wave rectifier using f.e.t. switches

A circuit is described which allows full-wave rectification of from 1.5mV to 5V in amplitude, and from 0 to 200 kHz in frequency. A bridge arrangement is used, with four field-effect transistors connected in the arms of the bridge and switched by the output of a comparator circuit which is used to detect the `zero crossing? point on the input-signal waveform.     

Propagation delay optimisation in multistage GaAs m.e.s.f.e.t. combinational logic circuits by use of dynamic programming

Propagation delays in multistage combinational logic circuits using GaAs metal-semiconductor field-effect transistors (m.e.s.f.e.t.s) are optimised subject to constraints on the overall power dissipation. Specific optimisation criteria are derived for 1-stage, 2-stage, and 3-stage combinational logic circuits. The results are evaluated with parameters of an existing process.     

Companding with junction f.e.t.

As companding elements, field-effect transistors have advantages over p?n diodes; they have suitably shaped i/v characteristics which are controllable by gate bias. Tests show that a departure from linearity of compressor and expander in cascade can be corrected to have an error of less than 1%.     

Power M.O.S. devices

In this paper, the major structures and electric properties of the relatively new power MOSFETs are presented. The basic concepts are dealt with first, with a view to increasing the current and voltage capabilities in M.O.S. transistors; and then the way in which they are applied to the so far most promising power structures i.e. V.MOS and VD.MOS transistors, is shown.The electric properties of these devices are then described i.e. threshold voltage, voltage current characteristics: ohmic, saturation and quasi-saturation ranges, first and second breakdown, safe operating area. Some dynamic behavior aspects are also considered. To conclude, one of the fundamental limitations of power MOSFETs is analyzed i.e. the on-state resistance vs. voltage handling capability trade-off and some data for comparison with other power devices is also provided.     

一种新的梳状基区RF功率晶体管

给出一种新的 RF功率器件结构 -梳状基区结构 .在不增加本征集电结面积的情况下 ,该结构能显著改善 RF功率晶体管散热特性 ,增大器件的耗散功率和输出功率 ,较好地缓解了传统结构中高工作频率与大输出功率之间的矛盾 .模拟分析表明 ,采用该结构 ,器件的雪崩击穿电压能提高到理想平行平面结的 90 %以上 ,器件的大电流特性和频率特性也有所改进 .采用该技术制作的试验样管 DCT375同传统结构器件相比 ,其热电特性得到显著的改善 .这种结构为新型超高频、微波大功率管的研制开辟了新途径 .     

Origin of 1/f noise in bipolar transistors

In planar n-p-n transistors fabricated in IC technology, the dependence of 1/fnoise on the base current density jB, the base width WB, and the emitter area FEwas measured. The power spectrumS_{iB}(f)of the base current fluctuations iBcan be represented by the empirical relationS_{iB} = const. jmin{B}max{gamma} cdot Fmin{E}max{beta} cdot wmin{B}max{-1} cdot f^{-1}where1 leq gamma leq 2and β has been found to be 1.3 or 2. The results of measurements on gate-controlled devices indicate that 1/fnoise cannot be explained by McWhorter's surface model. Therefore, a new model is proposed which assumes resistance fluctuations in the base region as the cause of 1/fnoise in bipolar transistors. The model establishes the relation forS_{iB}(f)as well as the magnitude of the coefficients β and γ.     

Electrical traps in GaAs microwave f.e.t.s

Described is a rapid, sensitive technique for determining the activation energies for electron traps present in the channel of GaAs microwave field-effect transistors. The measurements can be made directly on the f.e.t.s. Taken together with systematic variation of growth procedures, the method can be applied toward identification and elimination of the traps.     

Micrometre-gate m.e.s.f.e.t.s on laser-annealed polysilicon

Schottky-barrier field-effect transistors (m.e.s.f.e.t.s) have been fabricated on uniformly doped laser-annealed polycrystalline silicon deposited on a silicon nitride insulator. The devices, which had aluminium Schottky-barrier gates and diffused n+ sources and drains but nonoptimised channel profiles, had about 65% the gm values of similar but optimised devices made on s.o.s. layers. Performance of these devices is considered adequate for certain innovative integrated-circuit technologies.     

Subthreshold behaviour of e.s.f.i.-s.o.s. transistors

Theoretical and experimental results are presented which illustrate the influence of various parameters on the subthreshold behaviour of e.s.f.i.-s.o.s. transistors. The numerical analysis accounts for the thin silicon film and the existence of a second interface. A comparison is made with a corresponding bulk transistor, furthermore, between a two- and a one-dimensional analysis of e.s.f.i.-s.o.s. m.o.s.t. The agreement for real cases is found to be excellent.     

Location of 1/f noise sources in BJT's—II. Experiment

The exact location and magnitude of 1/f noise sources in silicon transistors was determined by a simple technique described in a previous publication [1]. This method, implementing the natural feedback action of actively biased devices, can generally be utilized to locate low-frequency noise generators in bipolar transistors. This paper presents measurements done on two silicon p⁺-n-p transistors. In the first device, the dominant noise source is due to generation-recombination, whereas the other less noisy device exhibits mainly diffusion noise.     

Analogue model for the signal-and-noise equivalent circuit of u.h.f. transistors

The noise behaviour of microwave transistors is computed by an analogue model of the noise equivalent circuit. A specific example is used to verify the accuracy of the computation, by comparison with measured values up to 1500 MHz, for a transistor.     

Temperature dependence of 1/f noise in polysilicon-emitter bipolar transistors

1/f noise was measured on polysilicon-emitter bipolar n-p-n and p-n-p transistors over a temperature range of 173K相似文献   

Circuit realisation of negative-impedance convertor at v.h.f.

A circuit realisation of a v.h.f. negative-impedance convertor (n.i.c.) is presented. Using simultaneous multiple negative feedback, a stable operation is obtained to approximately 15% of fT. Using transistors with an fT of 1.1 GHz, the realised n.i.c. circuit operates to 160 MHz.     

Etched Schottky-barrier m.o.s.f.e.t.s using a single mask

A simplified method for fabricating silicon m.o.s. transistors using a single photographic mask is described. The source and drain regions are etched; underetching the oxide results in autoregistration of the gate. The characteristics of both Schottky-barrier and p?n junction source and drain devices are presented.     

PWM Inverter Using High-Gain Pulse-Triggered Power Transistors and a New PWM Control Method

Rugged PWM transistor inverters are expected to be put into practical use for providing high reliability under adverse operating conditions. The bipolar power transistors are more common compared with MOSFET's power transistors in balance between power-handling capability and switching speed. High over current capability, low switching loss, high-speed switching, and high-current gain are requisite functions in the PWM inverter employing bipolar power transistors. These functions are of great concern in the power electronics field. A new PWM transistor inverter which can meet these requirements is presented in this paper. For this purpose, a concept of high-gain pulse-triggered power transistor (PTPT) with amorphous saturable current transformer (CT) is introduced.     

A better bipolar transistor for wireless ICs

As the world unwires, the market for wireless communication chips has begun to soar. Now, a breakthrough by IBM researchers promises to unleash a new generation of low power wireless communication ICs by solving a problem that has plagued semiconductor specialists for years. The problem revolves around the so-called mixed signal chips, which contains both ordinary field-effect transistors and bipolar transistors. This article presents a better bipolar transistor for wireless communications ICs. It also demonstrates the first structure to allow high-speed, low power bipolar transistor on the same chip with the fastest, lowest power CMOS circuits. The fastest bipolar transistors contain germanium in their bases, which lets them run in excess of 350 GHz, which is much faster than the ordinary silicon bipolar devices.     

Experimental results on fast surface states and 1/f noise in m.o.s. transistors

Experimental results for 1/f noise in m.o.s. transistors with very low surface state densities are presented. A direct relation between noise and surface state density is found, extending previously published data.