适用于子空间信号失配的参数可调多通道自适应检测器

针对存在信号失配时的子空间信号检测问题,该文提出一种具有恒虚警特性的参数可调检测器。根据系统设计需要,通过调节参数,参数可调检测器可实现对失配信号的灵活检测。与现有检测器相比,当不存在信号失配时,提出的可调检测器能提供更高的检测概率。该文推导了可调检测器解析的检测概率和虚警概率,并通过蒙特卡洛仿真进行了验证。     

Enhanced split-architecture delta–sigma ADCs

A split delta–sigma ADC topology is proposed, which provides enhanced noise shaping by cross-coupling the quantization errors of the two halves of the structure. Unlike the multi-stage noise shaping (MASH) architecture, the new structure is insensitive to mismatch errors, and it does not reduce the stability of the loops. Simulations confirm the effectiveness of the proposed scheme.     

Enhanced split-architecture /spl Delta/-/spl Sigma/ ADC

A split /spl Delta/-/spl Sigma/ ADC topology is proposed which provides enhanced noise shaping by cross-coupling the quantisation errors of the two halves of the structure. Unlike the multi-stage noise shaping architecture, the new structure is insensitive to mismatch errors and it does not reduce the stability of the loops. Simulations confirm the effectiveness of the proposed scheme.     

参数可调的联合子空间目标检测方法

基于Rao和Wald检验准则,本文推导了联合子空间（Union of Subspaces, UoS）检测器（UoS-Rao、UoS-Wald）,并通过引入一个可调参数提出一种可调检测器（UoS-Tunable）,从而实现联合子空间目标检测,通过调节参数来灵活调节检测器的检测性能、分类性能与选择性。当可调参数较小时,可以提高检测性能与分类性能,并提高其对信号失配的鲁棒性;当可调参数较大时,则会降低检测性能与分类性能,但会提高其对于信号失配的选择性。最后,仿真实验验证了所提方法的有效性。     

Cascaded Complex ADCs With Adaptive Digital Calibration for $I/Q$ Mismatch

A complex analog-to-digital converter (ADC) intended for digital intermediate frequency (IF) receiver applications digitizes analog signals at IFs with excellent power/bandwidth efficiency. However, it is vulnerable to mismatches between its in-phase and quadrature (I/Q) paths that can dramatically degrade its performance. The proposed solution mitigates I/Q mismatch effects using a complex sigma-delta (SigmaDelta) modulator cascaded with 9-bit pipeline converters in each of the I and Q paths. The quantization noise of the first stage complex modulator is eliminated using an adaptive scheme to calibrate finite-impulse response digital filters in the digital noise-cancellation logic block. Although low-pass SigmaDelta cascade ADCs are widely used because of their inherent stability and high-order noise shaping, the complex bandpass cascade architecture introduced herein maintains these advantages and doubles the noise shaping bandwidth. Digital calibration also reduces the effects of analog circuit limitations such as finite operational amplifier gain, which enables high performance and low power consumption with high-speed deep-submicrometer CMOS technology. Behavioral simulations of the complex SigmaDelta/pipeline cascade bandpass ADC using the adaptive digital calibration algorithm predict a signal-to-noise ratio (SNR) of 78 dB over a 20-MHz signal bandwidth at a sampling rate of 160 MHz in the presence of a 1% I/Q mismatch.     

Comparison of mismatch error shaping in multibit oversampledconverters

A number of mismatch error-shaping schemes for oversampled DACs are compared. Simulation results are presented to show that such a comparison should take account of the distribution of the mismatch errors, since the pattern of errors present affects different algorithms in different ways. A scheme for improving the error tolerance of one mismatch shaping architecture is presented     

一种基于向量反馈的新型动态失配整形算法

动态失配整形算法在多比特ΔΣ调制中应用广泛,介绍了一种新型的动态失配整形算法。它通过树状失配整形算法将输入信号分成几段,然后再通过向量反馈失配整形算法最终将信号分成0或1分配给各个通道,从而形成输出信号。仿真结果表明此算法可以在资源耗占量和噪声整形性能之间取得较好的平衡。     

数字扬声器中三阶动态失配整形技术的实现

为了进一步降低数字扬声器系统中由阵元通道之间的频响差异引入的噪声,在参考前人研究工作的基础上,给出了三阶动态失配整形算法的设计和实现方法,在全消声室内测试了此算法的信噪比性能,并与二阶动态失配整形算法做了比较。实验表明,三阶动态失配整形算法信噪比性能要优于二阶动态失配整形算法。     

A 13-bit, 2.2-MS/s, 55-mW multibit cascade ΣΔ modulatorin CMOS 0.7-μm single-poly technology

This paper presents a CMOS 0.7-μm ΣΔ modulator IC that achieves 13-bit dynamic range at 2.2 MS/s with an oversampling ratio of 16. It uses fully differential switched-capacitor circuits with a clock frequency of 35.2 MHz, and has a power consumption of 55 mW. Such a low oversampling ratio has been achieved through the combined usage of fourth-order filtering and multibit quantization. To guarantee stable operation for any input signal and/or initial condition, the fourth order shaping function has been realized using a cascade architecture with three stages; the first stage is a second-order modulator, while the others are first-order modulators-referred to as a 2-1-1_mb architecture. The quantizer of the last stage is 3 bits, while the other quantizers are single bit. The modulator architecture and coefficients have been optimized for reduced sensitivity to the errors in the 3-bit quantization process. Specifically, the 3-bit digital-to-analog converter tolerates 2.8% FS nonlinearity without significant degradation of the modulator performance. This makes the use of digital calibration unnecessary, which is a key point for reduced power consumption. We show that, for a given oversampling ratio and in the presence of 0.5% mismatch, the proposed modulator obtains a larger signal-to-noise-plus-distortion ratio than previous multibit cascade architectures. On the other hand, as compared to a 2.1.1_single-bit modulator previously designed for a mixed-signal asymmetrical digital subscriber line modem in the same technology, the modulator in this paper obtains one more bit resolution, enhances the operating frequency by a factor of two, and reduces the power consumption by a factor of four     

Scalable architectures for integrated traffic shaping and linkscheduling in high-speed ATM switches

Emerging broad-band switches must accommodate the diverse traffic parameters and quality-of-service requirements of voice, data, and video applications. End-to-end performance guarantees depend on connections complying with traffic contracts as their cells travel through the network. This paper presents a leaky-bucket shaper architecture that scales to a large number of connections with diverse burstiness and bandwidth parameters. In contrast to existing designs, the proposed architecture arbitrates fairly between connections with conforming cells by carefully integrating leaky-bucket traffic shaping with rate-based scheduling algorithms. Through a careful combination of per-connection queueing and approximate sorting, the shaper performs a small, bounded number of operations in response to each arrival and departure, independent of the number of connections and cells. When the shaper must handle a wide range of rate parameters, a hierarchical arbitration scheme can reduce the implementation overheads and further limit interference between competing connections. Through simulation experiments, we demonstrate that the architecture limits cell-shaping delay and traffic distortions, even in periods of heavy congestion. The efficient combination of traffic shaping and link scheduling results in an effective architecture for managing buffer and bandwidth resources in large, high-speed ATM switches     

A direct-digital synthesizer with improved spectral performance

The authors present a modified direct-digital synthesizer which uses noise shaping to reduce the effects of phase-accumulator truncation on the output spectrum. The discrete spectral disturbances associated with this truncation error are strongly reduced with the proposed method, making the synthesizer suitable for high-performance signal processing. The proposed architecture uses first-order noise shaping. Higher order noise shaping can also be used if required. The modified circuit offers considerable improvement in the synthesizer performance when the generated frequency is low with respect to the clock frequency     

Design and Performance Analysis of a Simple OXC

Optical cross-connects are expected to be the key element in future optical transport networks. In this paper, a simple OXC architecture is proposed and its performance evaluated by means of simulations. The main advantage of the proposed design in front of previously reported structures consists in the absence of any tunable component. Obtained results show that the proposed device performance is close to that given by an OXC with full wavelength conversion capability.     

Design and Analysis of a Synchronous Transmission WDMA Protocol

In this paper, we propose a synchronous WDMA protocol for a passive star topology and suggest a new architecture for the network interface of each station. The multichannel nature of WDM networks involves receiver collision phenomena at the destination. We develop an analytical model based on a finite number of tunable receivers and a finite number of stations to investigate the performance of the proposed protocol. Numerical results are showing the performance behaviour for various number of channels, stations, and tunable receivers. Also simulation results are presented for comparison with the results obtained by the performance analysis.     

A 10 bit 1 GSPS Nyquist DAC in 180 nm CMOS with high FOM

A new segmented architecture is presented to improve the dynamic and static performance of the current steering digital-to-analog converters (DACs). In the proposed architecture instead of a single binary DAC, distributed binary cells are used. So the effect of the mismatch and timing errors of the binary cells are not accumulated and are averaged out. For realization of the MSB unit cells those binary cells are reused to form the larger weighted unit cells. Realization of the MSB unit cells with smaller cells results in improved dynamic performances as the effects of gradient errors are minimized and the effects of nonlinear parasitic capacitances are reduced. The DAC has been designed in 180 nm five-metal nwell CMOS process. The simulation results show that the DAC can achieve a maximum spurious free dynamic range (SFDR) of 70.99 dB at 2.93 MHz signal for a sampling rate of 1 GSPS considering the mismatch effects. For 1 GSPS sampling rate the simulated Nyquist SFDR is >70 dB with mismatch. The simulated third order intermodulation distortion (IM3) of the DAC with mismatch effect is 71.40 dB, for a dual tone test with 491.21 and 495.12 MHz signals. The DAC is optimized for digital signal synthesis applications in wireless base stations and other communication applications. The power dissipation of the DAC is 78.21 mW at 498.05 MHz signal for a sampling rate of 1 GSPS with 1.8 V supply.     

Tunable OTDR Based on Direct Modulation of Self-Injection-Locked RSOA for In-Service Monitoring of WDM-PON

We propose a tunable optical time-domain reflectometer (OTDR) for in-service monitoring of wavelength- division- multiplexing passive optical networks (WDM-PONs). The proposed method uses a reflective semiconductor optical amplifier, which is self-injection-locked by a tunable fiber Bragg grating. The proposed tunable OTDR has a tuning range of 30 nm and a resolution of 50 m. The performance of the proposed scheme is experimentally evaluated to demonstrate the in-service monitoring of WDM-PON.     

基于石墨烯的网格型宽带可调谐太赫兹吸波器

该文提出了一种基于石墨烯的宽带可调谐吸波器,该器件是由网格型石墨烯结构、介质层及金属地板组成。采用CST软件对器件的性能进行了仿真分析,仿真结果显示,当石墨烯费米能级时,在2.97~3.74 THz内,器件对电磁波吸收率达90%。另一方面,器件的工作频率可通过改变石墨烯的费米能级进行动态调控。当石墨烯的费米能级从0.3 eV变到0.8 eV时,器件的工作频率在2.60~4.55 THz内调谐,相对调谐带宽为56%,且在整个调谐频率范围内,器件对电磁波的吸收率始终高于90%。此外,器件的工作性能对入射电磁波的偏振方向和入射角不敏感,因此,该器件在太赫兹成像、太赫兹检测和隐身技术等领域有潜在的应用价值。     

Oversampled pipeline A/D converters with mismatch shaping

This paper presents a pipeline analog-to-digital converter (ADC) with improved linearity. The linearity improvement is achieved through a combination of oversampling and mismatch shaping, which modulates the distortion energy out of band. Mismatch shaping can be realized in a traditional 1-bit/stage pipeline ADC, but the ADCs transfer characteristic properties limit its effectiveness at pushing the distortion out of band. These limitations can be alleviated by using a 1-bit/stage commutative feedback capacitor switching pipeline design. A test chip was fabricated in a 0.35-μm CMOS process to demonstrate mismatch shaping. Experimental results obtained indicate that the spurious-free dynamic range improves by 8.5 dB to 76 dB when mismatch shaping is used at an oversampling ratio of 4 and a sampling rate of 61 MHz. The signal-to-noise and distortion ratio improves by 3 dB and the maximum integral nonlinearity decreases from 1.8 to 0.6 LSB at the 12-bit level     

基于衍射MEMS的广播选择型ROADM设计与研究

设计了一种广播选择型的可重构光分插复用(ROADM)节点的体系结构,通过波长阻塞器和可调滤波器实现了动态的波长分插复用功能,讨论了基于衍射MEMS技术实现波长阻塞的原理,并对其结构进行了改进以增强系统功能。     

A covariance shaping framework for linear multiuser detection

A new class of linear multiuser receivers, referred to as the covariance shaping multiuser (CSMU) receiver, is proposed, for suppression of interference in multiuser wireless communication systems. This class of receivers is based on the recently proposed covariance shaping least-squares estimator, and is designed to minimize the total variance of the weighted error between the receiver output and the observed signal, subject to the constraint that the covariance of the noise component in the receiver output is proportional to a given covariance matrix, so that we control the dynamic range and spectral shape of the output noise. Some of the well-known linear multiuser receivers are shown to be special cases of the CSMU receiver. This allows us to interpret these receivers as the receivers that minimize the total error variance in the observations, among all linear receivers with the same output noise covariance, and to analyze their performance in a unified way. We derive exact and approximate expressions for the probability of bit error, as well as the asymptotic signal-to-interference+noise ratio in the large system limit. We also characterize the spectral efficiency versus energy-per-information bit of the CSMU receiver in the wideband regime. Finally, we consider a special case of the CSMU receiver, equivalent to a mismatched minimum mean-squared error (MMSE) receiver, in which the channel signal-to-noise ratio (SNR) is not known precisely. Using our general performance analysis results, we characterize the performance of the mismatched MMSE receiver. We then treat the case in which the SNR is known to lie in a given uncertainty range, and develop a robust mismatched MMSE receiver whose performance is very close to that of the MMSE receiver over the entire uncertainty range.     

测控通信系统射频资源可重组技术

测控通信系统的资源重组将是飞行器测控通信系统的发展方向。在中频实现测控终端重组的基础上,通过对射频重组构架的分析,得出了射频交换网络的性能和射频远距离传输的性能直接影响射频重组的可行性,提出了一种可行的全系统资源重组的测控体系构架,即采用微光电子射频交换网络与射频光波传输技术实现射频信号大规模交换及远距离传输,再结合中频重组以实现全系统资源重组,并对相关性能进行了分析。所提出的设计思路可供测控通信系统实现全体系的资源重组借鉴及参考。