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1.
Results of a study of electrically active defects induced in Sb-doped Ge crystals by implantations of hydrogen and helium ions (protons and alpha particles) with energies in the range from 500 keV to 1 MeV and doses in the range 1×1010–1×1014 cm−2 are presented in this work. Transformations of the defects upon post-implantation isochronal anneals in the temperature range 50–350 °C have also been studied. The results have been obtained by means of capacitance–voltage (CV) measurements and deep-level transient spectroscopy (DLTS).It was found from an analysis of DLTS spectra that low doses (<5×1010 cm−2) of H and He ion implantations resulted in the introduction of damage similar to that observed after MeV electron irradiation. The Sb–vacancy complex was the dominant deep-level defect in the lightly implanted samples. After implantations with doses higher than 5×1010 cm−2 peaks due to more complex defects were observed in the DLTS spectra. Implantations with heavy (5×1013 cm−2) doses of both H and He ions caused the formation of a sub-surface layer with a high (up to 1×1017 cm−3) concentration of donors. These donors were eliminated by anneals at temperatures in the range 100–200 °C. Heat treatments of the heavy proton-implanted Ge samples in the temperature range 250–300 °C resulted in the formation of shallow hydrogen-related donors, the concentration of which was the highest in a region close to the projected depth of implanted protons. The maximum peak concentration of the H-related donors was higher than 1×1015 cm−3 for a proton implantation dose of 1×1014 cm−2.  相似文献   

2.
This paper presents the Monte Carlo studies of inversion mobility in Ge MOSFETs covering a wide range of bulk-impurity concentrations (1014 cm−3–1017 cm−3), and substrate bias (0–10 V). Carrier mobilities in Ge MOSFETs have obviously increased compared with those in Si MOSFETs. At low effective field, both electron and hole mobilities have increased over 100%; while at high effective field the increase is reduced due to the effect of surface roughness. Similar to Si MOSFETs, the carrier effective mobilities in Ge MOSFETs also have a universal behavior. The universality of both electron and hole mobilities holds up to a bulk-impurity concentration of 1017 cm−3. On substrates with higher bulk-impurity concentrations, the carrier effective mobilities significantly deviate from the universal curves under low effective field because of Coulomb scattering by the bulk impurity.  相似文献   

3.
We hereby present a non-destructive method for extracting the activation level on boron-doped germanium-on-insulator (GeOI) wafers, with a discussion on the impact of the hole mobility model. This method combines Monte Carlo boron profile simulations with optical Ge layer thickness TGe and electrical sheet resistance Rsh measurements. As B atoms are known not to diffuse in Ge for the usual activation temperatures (<800 °C), we can assume that the as-implanted dopant profile remains unchanged after annealing (no modelling of boron diffusion required). We highlight that the knowledge of the hole mobility dependence on activated impurities concentration in Ge is of paramount importance. Several experimental and theoretical models are available in the literature. After relative validity assessments, all of them have been implemented for extraction and unfortunately yield different values scattered over nearly one decade. Still, the lower-bound concentration 2.7×1019 cm−3 is in the range of the state-of-the-art values for B-implanted crystalline Ge and has proven suitable for functional GeOI pMOSFET demonstration.  相似文献   

4.
A simple technique leading to the measurement of minority carrier lifetimes of UHV compatible LPCVD Si and SiGe by Ct depth profiling of Metal:Oxide:Si:SiGe:Si structures is reported. A high quality gate oxide is realised by low temperature (<100°C) plasma anodisation thereby reducing any oxidation effects on the underlying epitaxial layer quality. Capacitance response times were observed for an impurity concentration of 2.5×1017 cm−3, giving rise to generation lifetimes of the Si and Si0.9Ge0.1 of >0.55 and 2.6 μs respectively, reflective of very high quality epitaxial semiconductor material.  相似文献   

5.
Metal–oxide–semiconductor (MOS) capacitors based on HfO2 gate stacks with Al and TiN gates are compared to study the effect of the gate electrode material to the properties of insulator–semiconductor interface. The structures under study were shown to contain interface trap densities of around 2 × 1011 cm−2 eV−1 for Al gate and up to 5.5 × 1012 cm−2 eV−1 for TiN gate. The peak in the surface state distribution was found at 0.19 eV above the valence band edge for Al electrode. The respective capture cross-section is 6 × 10−17 cm2 at 200 K.The charge injection experiments have revealed the presence of hole traps inside the dielectric layer. The Al-gate structure contains traps with effective capture cross-section of 1 × 10−20 cm2, and there are two types of traps in the TiN-gate structure with cross-sections of 3.5 × 10−19 and 1 × 10−20 cm2. Trap concentration in the structure with Al electrode was considerably lower than in the structure with TiN electrode.  相似文献   

6.
We report on the phase separation of Ga-doped MgZnO layers grown by plasma-assisted molecular-beam epitaxy. Based on X-ray diffraction, low-temperature (10 K) photoluminescence, and reflection high-energy electron diffraction observations, it is possible to classify the phase of Ga-doped MgZnO layers into three regions depending on the incorporated Ga concentration ([Ga]). Single-phase Mg0.1Zn0.9O layers are grown when [Ga] is less than 1×1018 cm−3. For [Ga] between 1×1018 cm−3 and 1×1020 cm−3, ZnO and Mg0.2Zn0.8O coexist, where electron transport is considered to be via two-channel conduction. When [Ga] exceeds 1×1020 cm−3, the Ga-doped MgZnO layers become polycrystalline, where carrier compensation takes place presumably due to grain boundaries.  相似文献   

7.
The defects induced by inductively coupled plasma reactive ion etching (ICP-RIE) on a Si-doped gallium nitride (GaN:Si) surface have been analyzed. According to the capacitance analysis, the interfacial states density after the ICP-etching process may be higher than 5.4 × 1012 eV−1 cm−2, compared to around 1.5 × 1011 eV−1 cm−2 of non-ICP-treated samples. After the ICP-etching process, three kinds of interfacial states density are observed and characterized at different annealing parameters. After the annealing process, the ICP-induced defects could be reduced more than one order of magnitude in both N2 and H2 ambient. The H2 ambient shows a better behavior in removing ICP-induced defects at a temperature around 500 °C, and the interfacial states density around 2.2 × 1011 eV−1 cm−2can be achieved. At a temperature higher than 600 °C, the N2 ambient provides a much more stable interfacial states behavior than the H2 ambient.  相似文献   

8.
3-9 MeV electrons were used to introduce impurity Ge atoms into Si wafers from Ge sheets, which are in contact with a Si surface at 20-60‡C in water bath. Concentration-dependent diffusivities of ∼10-18-10-14 cm2sec-1 for Ge in Si were measured. Activation energies of sputtering yield for Ge and of the diffusivity of Ge in Si are estimated to be ∼0.3 eV and ∼0.58 eV, respectively. In a case of hot (∼250‡C) irradiation in ∼1x10-3 Torr vacuum, also the similar concentration profiles of impurity atoms in the substrates were observed.  相似文献   

9.
ZrO2 thin films with a smooth surface were synthesized on silicon by atomic vapor deposition™ using Zr[OC(CH3)3]4 as precursor. The maximum growth rate (7 nm min−1) and strongest crystalline phase were obtained at 400 °C. The increase of the deposition temperature reduced the deposition rate to 0.5 nm min−1 and changed the crystalline ZrO2 phase from cubic/tetragonal to monoclinic. These films showed no enhancement of the dominating monoclinic phase by annealing. The values of the dielectric constant (up to 32) and leakage current density (down to 1.2×10−6 A cm−2 at 1×106 V cm−1) varied depending on the deposition temperature and film thickness. The midgap density of interface states was Nit=5×1011 eV−1 cm−2. The leakage current and the density of interface states were lowered by the annealing to 10−7 A cm−2 at 1×106 V cm−1 and to 1010 eV−1 cm−2, respectively. However, this also led to a decrease of the dielectric constant.  相似文献   

10.
The InAs quantum well heterostructure was successfully grown on a semi-insulating GaAs substrate by MBE. On the GaAs substrate, the semi-insulating AlGaAsSb was grown to a thickness of 600 nm as the buffer layer, followed by a 15 nm InAs channel layer and a 35 nm AlGaAsSb doped layer together with 10 nm GaAsSb cap layer successively. The electron mobility and the sheet carrier concentration of the 15 nm InAs heterostructure was about 1 m2 V−1 s−1 and 4.5×1012 cm−2, respectively, at room temperature. This heterostructure is equivalent to the heavily doped InAs substrate with little change of the electron mobility on temperature. This device has typical 1/f noise characteristics without any large bulge throughout the frequency and the temperature ranges observed. The Hooge parameter was αH=1×10−3 at room temperature, decreasing monotonically with the decreasing temperature down to 5×10−4 at 50 K, indicating characteristics of the virtually constant mobility and constant carrier concentration device.  相似文献   

11.
Bias-temperature stress examinations of self-aligned 0.1 μm length gate GaAs MESFETs have revealed a shift of threshold voltage related to Si doping concentration near the gate sides next to the channel region. With lower doping concentration, the increase in threshold voltage in FETs was faster and a 100 mV increase leads to a 20% reduction of operation speed in digital ICs after forward-biased storage at 200°C. The recovery of the performance under reverse-biased stresses was observed. The degradation is released by increasing Si doping concentration and thus we obtained the prediction of a median life exceeding 106 h at 100°C by setting the Si dose of 4 × 1013 cm−2, which is as high as it can be set without causing serious reduction of breakdown voltage.  相似文献   

12.
We have grown n- and p-type β-FeSi2 single crystals by the temperature gradient solution growth method using Sn–Ga solvent. The conduction type and the carrier density of the crystals were controlled by the Ga composition in the Sn–Ga solvent. The conduction type was changed from n- to p-type between the Ga composition of 10.2 and 18.5 at% in the solvent. Depending on the Ga composition in the solvent, the carrier density of n- and p-type crystals was changed from 1.5×1017 to 3×1017 cm−3 and 4×1017 to 2×1019 cm−3, respectively. The activation energies of n-type crystals were 0.09–0.11 eV while that of p-type crystals were 0.02–0.03 eV.  相似文献   

13.
A GaPAs waveguide with GaP cladding layers, has been fabricated in only two steps of LPE growth. One-way optical loss of the fabricated GaPAs–GaP waveguide is 12% mm−1 (α=1.9 cm−1). The free carrier concentration of the GaPAs layer is 1×1016 cm−3 (α=0.05 cm−1). The backward spontaneous Raman spectrum from the GaPAs waveguide shows a GaP-like longitudinal optical (LO) phonon line. The LO band is intensified and shifted to a higher frequency compared to the LO phonon of GaP bulk crystal.  相似文献   

14.
Dislocation-free heavily Ge-doped Czochralski (CZ)-Si crystal growth using a heavily Ge-doped Si seed has been investigated. Dislocations due to thermal shock were suppressed in a seed 7×7 mm2 in cross-section when Ge concentration in the seed exceeded 9×1019 atoms/cm3. When Ge concentration in the grown crystal was 5.7×1020 atoms/cm3, cellular growth occurred, and this concentration was a limit for heavily Ge-doped Si single crystal growth with a growth rate of about 1 mm/min. Resistivity in the crystal results in B or P doping could be controlled precisely in spite of using a heavily Ge-doped Si seed for growing a dislocation-free CZ-Si crystal without Dash necking.  相似文献   

15.
Metal-oxide-semiconductor capacitors based on HfO2 gate stack with different metal and metal compound gates (Al, TiN, NiSi and NiAlN) are compared to study the effect of the gate electrode material on the trap density at the insulator–semiconductor interface.CV and Gω measurements were made in the frequency range from 1 kHz to 1 MHz in the temperature range 180–300 K. From the maximum of the plot G/ω vs. ln(ω) the density of interface states was calculated, and from its position on the frequency axis the trap cross-section was found. Reducing temperature makes it possible to decrease leakage current through the dielectric and to investigate the states located closer to the band edge.The structures under study were shown to contain significant interface trap densities located near the valence band edge (around 2×1011 cm−2eV−1 for Al and up to (3.5–5.5)×1012 cm−2 eV−1 for other gate materials). The peak in the surface state distribution is situated at 0.18 eV above the valence band edge for Al electrode. The capture cross-section is 5.8×10−17 cm2 at 200 K for Al–HfO2–Si structure.  相似文献   

16.
Er and O co-doped Si structures have been prepared using molecular-beam epitaxy (MBE) with fluxes of Er and O obtained from Er and silicon monoxide (SiO) evaporation in high-temperature cells. The incorporation of Er and O has been studied for concentrations of up to 2×1020 and 1×1021 cm−3, respectively. Surface segregation of Er can take place, but with O co-doping the segregation is suppressed and Er-doped layers without any indication of surface segregation can be prepared. Si1−xGex and Si1−yCy layers doped with Er/O during growth at different substrate temperatures show more defects than corresponding Si layers. Strong emission at 1.54 μm associated with the intra-4f transition of Er3+ ions is observed in electroluminescence (EL) at room temperature in reverse-biased p–i–n-junctions. To optimize the EL intensity we have varied the Er/O ratio and the temperature during growth of the Er/O-doped layer. Using an Er-concentration of around 1×1020 cm−3 we find that Er/O ratios of 1 : 2 or 1 : 4 give higher intensity than 1 : 1 while the stability with respect to breakdown is reduced for the highest used O concentrations. For increasing growth temperatures in the range 400–575°C there is an increase in the EL intensity. A positive effect of post-annealing on the photoluminescence intensity has also been observed.  相似文献   

17.
The energy distribution of extended and localized electron states at the Ge/HfO2 interface is determined by combining the internal photoemission of electrons and holes from Ge into the Hf oxide and AC capacitance/conductance measurements. The inferred offsets of the conduction and valence band at the interface, i.e., 2.0 ± 0.1 and 3.0 ± 0.1 eV, respectively, suggest the possibility to apply the deposited HfO2 layer as a suitable insulator on Ge. The post-deposition annealing of the Ge/HfO2 structures in oxygen results in 1 eV reduction of the valence band offset, which is attributed to the growth of a GeO2 interlayer. However, this treatment enables one to substantially reduce the density of Ge/HfO2 interface traps, approaching ≈1×1012 cm−2 eV−1 near the Ge midgap.  相似文献   

18.
A low effective oxide thickness of 1.45 nm was achieved in HfAlO films deposited by an electron beam gun evaporator on unheated p-Si substrate. A reduction of the leakage current density from 1 × 10−4 to 4.5 × 10−7 A/cm2, at an electric field 3 MV/cm, with annealing temperature and a breakdown electric field of 10 MV/cm were demonstrated for ultra thin films.  相似文献   

19.
Aluminum nitride films were deposited, at 200 °C, on silicon substrates by RF sputtering. Effects of rapid thermal annealing on these films, at temperatures ranging from 400 to 1000 °C, have been studied. Fourier transform infrared spectroscopy (FTIR) revealed that the characteristic absorption band of Al–N, around 684 cm−1, became prominent with increased annealing temperature. X-ray diffraction (XRD) patterns exhibited a better, c-axis, (0 0 2) oriented AlN films at 800 °C. Significant rise in surface roughness, from 2.1 to 3.68 nm, was observed as annealing temperatures increased. Apart from these observations, micro-cracks were observed at 1000 °C. Insulator charge density increased from 2×1011 to 7.7×1011 cm−2 at higher temperatures, whereas, the interface charge density was found minimum, 3.2×1011 eV−1cm−2, at 600 °C.  相似文献   

20.
We present here a novel technique, based on a proprietary approach for analyzing raw optical data, which is able to decouple the effects of Ge and B on the optical properties of a B-doped SiGe film and so measure the two material fractions, and the thickness, simultaneously and independently on a standard Opti-Probe® film-thickness tool.Two sets of doped epitaxial SiGe layers were grown, each with a nominally fixed Ge-content but with the boron levels varying from zero to 1×1020 cm−3. One set consisted of single-layer films on c-Si substrates, and the other consisted of similar films capped with undoped epi-Si layers.In each case, the Ge-fraction found was in good agreement with expectation (and, in the case of the undoped sample, with XRD), whilst the calculated “doping parameter” was found to follow a monotonic relationship with changes in Boron concentration.  相似文献   

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