Active‐Matrix Field Emission Display with Amorphous Silicon Thin‐Film Transistors and Mo‐Tip Field Emitter Arrays

We present, for the first time, a prototype active‐matrix field emission display (AMFED) in which an amorphous silicon thin‐film transistor (a‐Si TFT) and a molybdenum‐tip field emitter array (Mo‐tip FEA) were monolithically integrated on a glass substrate for a novel active‐matrix cathode (AMC) plate. The fabricated AMFED showed good display images with a low‐voltage scan and data signals irrespective of a high voltage for field emissions. We introduced a light shield layer of metal into our AMC to reduce the photo leakage and back channel currents of the a‐Si TFT. We designed the light shield to act as a focusing grid to focus emitted electron beams from the AMC onto the corresponding anode pixel. The thin film depositions in the a‐Si TFTs were performed at a high temperature of above 360°C to guarantee the vacuum packaging of the AMC and anode plates. We also developed a novel wet etching process for n⁺‐doped a‐Si etching with high etch selectivity to intrinsic a‐Si and used it in the fabrication of an inverted stagger TFT with a very thin active layer. The developed a‐Si TFTs performed well enough to be used as control devices for AMCs. The gate bias of the a‐Si TFTs well controlled the field emission currents of the AMC plates. The AMFED with these AMC plates showed low‐voltage matrix addressing, good stability and reliability of field emission, and good light emissions from the anode plate with phosphors.     

Silicide application on gated single-crystal, polycrystalline andamorphous silicon FEAs. I. Mo silicide

In order to improve both the level and the stability of electron field emission, the tip surface of silicon field emitters have been coated with a molybdenum layer of thickness 25 nm through the gate opening and annealed rapidly at 1000°C in inert gas ambient. The gate voltages of single-crystal silicon (c-Si), polycrystalline silicon (poly-Si) and amorphous silicon (a-Si) field emitter arrays (FEAs) required to obtain anode current of 10 nA per tip are 90 V, 69 V, and 84 V, respectively. In the case of the silicide emitters based on c-Si, poly-Si and a-Si, these gate voltages are 76 V, 63 V, and 69 V, respectively. Compared with c-Si, poly Si and a-Si field emitters, the application of Mo silicide on the same silicon field emitters exhibited 9.6 times, 2.1 times, and 4.2 times higher maximum emission current, and 6.1 times, 3.7 times, and 3.1 times lower current fluctuation, respectively. Moreover, the emission currents of the silicide FEAs depending on vacuum level are almost same in the range of 10^-9~10^-6 torr. This result shows that silicide is robust in terms of anode current degradation due to the absorption of air molecules     

A new bottom-gated poly-Si thin-film transistor

We have proposed and fabricated the new bottom-gated poly-Si TFT with a partial amorphous-Si (a-Si) region by employing the selective laser annealing. The channel layer of the proposed TFTs is composed of poly-Si region in the center and a-Si region in the edge. The TEM image shows that the local a-Si region is successfully fabricated by the effective cut out of the incident laser light in the upper a-Si layer. Our experimental results show that the reverse leakage currents are decreased significantly in the new poly-Si TFT compared with conventional one. This reduction is due to the suppression of field emission currents by local a-Si region like that of a-Si TFTs while the ON currents are kept almost the same due to the considerable inducement of electron carriers in the short a-Si channel by the positive gate bias     

Thick-layered etched-contact amorphous silicon transistors

We introduce a new thick-layered, etched-contact a-Si:H TFT (TLEC-TFT) structure which allows the use of thick a-Si:H layers without increasing the TFT contact resistance. This device facilitates the integration of high-performance TFTs and thick-layered photo-transistors in a-Si:H-based image sensors. The TLEC-TFT is fully compatible with the conventional TFT fabrication process and requires no extra masking steps. For low values of the drain-to-source voltage, our new TFT boosts the linear region current by two orders of magnitude over that of conventional TFTs with identically thick a-Si:H layers. By removing the adverse effects of contact resistance in transistors with thick a-Si:H layers, our TLEC-TFT design allows us to compare the performance of TFTs with thick and thin a-Si:H layers. We find that the width of the conduction-band tail decreases in thick-layered a-Si:H TFTs. This reduction in the width of the band tails results in an increase in the TFT mobility and subthreshold slope. Consequently, thick-layered, etched-contact TFTs possess higher overall current-drive capabilities compared to conventional, thin-layered TFTs. We present experimental evidence which correlates the width of the conduction-band tail to the density of as-deposited free carriers     

Integration of organic LEDs and amorphous Si TFTs onto flexible andlightweight metal foil substrates

We report the integration of organic light emitting devices (OLEDs) and amorphous Si (a-Si) thin-film transistors (TFTs) on both glass, and unbreakable and lightweight thin stainless steel foil substrates. The doped-polymer OLEDs were built following fabrication of driver TFTs in a stacked structure. Due to the opacity of the steel substrate, top-emitting OLED structures were developed. It is shown that the a-Si TFTs provide adequate current levels to drive the OLEDs at video brightness (~100 cd/m²). This work demonstrates that lightweight and rugged TFT backplanes with integrated OLEDs are essential elements for robust and highly portable active-matrix emissive flat-panel displays     

Improvement of Hydrogenated Amorphous-Silicon TFT Performances With Low-$k$Siloxane-Based Hydrogen Silsesquioxane (HSQ) Passivation Layer

A low-dielectric-constant (low-k)-material siloxane-based hydrogen silsesquioxane (HSQ) is investigated as a passivation layer in bottom-gate hydrogenated amorphous-silicon thin-film transistors (a-Si : H TFTs). The low-k HSQ film passivated on TFT promotes the brightness and aperture ratio of TFT liquid-crystal display due to its high light transmittance and good planarization. In addition, the performance of a-Si : H TFT with HSQ passivation has been improved, compared to a conventional silicon nitride (SiN_x)-passivated TFT because the hydrogen bonds of HSQ assist the hydrogen incorporation to eliminate the density of states between the back channel and passivation layer. Experimental results exhibit an improved field-effect mobility of 0.57 cm²/Vmiddots and a subthreshold swing of 0.68 V     

Low-Temperature Materials and Thin Film Transistors for Flexible Electronics

This paper addresses the low-temperature deposition processes and electronic properties of silicon based thin film semiconductors and dielectrics to enable the fabrication of mechanically flexible electronic devices on plastic substrates. Device quality amorphous hydrogenated silicon (a-Si:H), nanocrystalline silicon (nc-Si), and amorphous silicon nitride (a-SiN/sub x/) films and thin film transistors (TFTs) were made using existing industrial plasma deposition equipment at the process temperatures as low as 75/spl deg/C and 120/spl deg/C. The a-Si:H TFTs fabricated at 120/spl deg/C demonstrate performance similar to their high-temperature counterparts, including the field effect mobility (/spl mu//sub FE/) of 0.8 cm/sup 2/V/sup -1/s/sup -1/, the threshold voltage (V/sub T/) of 4.5 V, and the subthreshold slope of 0.5 V/dec, and can be used in active matrix (AM) displays including organic light emitting diode (OLED) displays. The a-Si:H TFTs fabricated at 75/spl deg/C exhibit /spl mu//sub FE/ of 0.6 cm/sup 2/V/sup -1/s/sup -1/, and V/sub T/ of 4 V. It is shown that further improvement in TFT performance can be achieved by using n/sup +/ nc-Si contact layers and plasma treatments of the interface between the gate dielectric and the channel layer. The results demonstrate that with appropriate process optimization, the large area thin film Si technology suits well the fabrication of electronic devices on low-cost plastic substrates.     

α—Si TFT矩阵等离子体刻蚀技术的研究

本文介绍了α-Si TFT有源矩阵的CF_4等离子体刻蚀技术。分析了CF_4等离子体刻蚀α-Si:H和α-SiN_x的机理,对α-Si TFT的有源层与绝缘层之间刻蚀选择性和均匀性进行了研究,讨论了等离子体刻蚀速率与射频功率、反应室压力及衬底温度的依赖关系。根据实验结果总结了CF_4等离子体刻蚀速率随射频功率、反应室压力和衬底温度的增加而增大的规律,通过控制合适的工艺条件,成功地实现了选择性刻蚀并改善了刻蚀的均匀性。     

High voltage amorphous silicon TFT for use in large area applications

Previous work in high voltage amorphous silicon (a-Si) TFTs (HVTFTs) using an n⁺ μC-Si ohmic contact layer demonstrated that the soft contact TFT (SCTFT) design was a requirement for high voltage operation. In this research, conventional and high voltage TFT designs including the SCTFT are presented using an n⁺ a-Si contact layer. TFT ON-current measurements and series resistance extractions show that the conventional TFT performs equally well, if not better, at low and high voltages in comparison to all of the HVTFTs fabricated. The results indicate that the conventional space-efficient TFT design with an n⁺ a-Si contact layer is realizable for high fill-factor, high voltage applications such as direct detection, large area X-ray imaging. Also, the process reliability and performance for both conventional and HVTFT arrays can be improved for large area applications by the inclusion of an additional a-SiN layer.     

Dynamic Response of Normal and Corbino a-Si:H TFTs for AM-OLEDs

The dynamic characteristics of normal and Corbino hydrogenated amorphous silicon (a-Si:H) thin-film transistors (TFTs) have been investigated. Top- and bottom-gate normal a-Si:H TFTs and bottom-gate Corbino a-Si:H TFTs were fabricated with a five-photomask process used in the processing of the active-matrix liquid crystal displays. The charging time and feedthrough voltage $Delta V_{P}$ measurement indicates that the normal a-Si:H TFT shows a similar behavior regardless of its TFT geometrical structure. Using a simple gate-to-source capacitance $C_{rm GS}$ model, the dependence of $Delta V_{P}$ on gate-to-source overlap and storage capacitor has closely been estimated using analytical calculation. Due to a unique electrode geometry, the Corbino a-Si:H TFT shows a small deviation from an analytical model used for the normal a-Si:H TFT, and consequently, a modified analytical model was developed. We also developed concepts of its possible application as a switching device to active-matrix organic light-emitting displays.      

α-Si-H TFT及有源矩阵选址平板液晶显示

本文报道了用于平板液晶显示(LCD)的氢化非晶硅薄膜晶体管(α-Si:H TFT)的研制结果,此晶体管开态电流约10~(-6)A,关态电流<10~(-11)A,开启电压～15V.用此α-Si:H TFT矩阵已封装出具有20×20个有效象素单元的液晶显示平板,并成功地实现了有源选址与动态显示功能.同时,对如何进一步提高TFT性能作了一些分析与讨论.     

Amorphous silicon thin-film transistor with fluorinated siliconoxide ion stopper

We propose fluorinated silicon oxide (SiOF) as the ion-stopper of bottom-gate amorphous silicon thin film transistors (a-Si:H TFTs). The low dielectric constant SiOF on both the back-channel of the TFT and the crossover regions of gate/data lines can contribute to reducing the RC delay of the gate pulse signal in active-matrix liquid-crystal displays. Besides, the a-Si:H TFT with a SiOF stopper shows an improved performance compared to the widely-employed silicon nitride (SiN_x ) stopper TFT, because the fluorine incorporation reduces the interface state density between a-Si:H and SiOF     

Ferroelectric liquid-crystal shutter array with a-Si:H TFT driver

A ferroelectric liquid crystal (FLC) shutter array with an a-Si:H thin-film transistor (TFT) drive, designed for a low-cost and high-performance optical printing head, is presented. The a-Si:H TFT driver consists of inverter circuits, switch TFTs, and matrix circuits. A block driving method was employed to compensate for the low operating speed of the a-Si:H TFTs. The 256-dot, 300-dot/in resolution prototype device mounted in a printing head shows an over-30 contrast ratio and an 8-page/min operating speed. Additional measurements on this device demonstrate the possibility of operation with a 24-page/min speed at a 600 dot/in resolution     

High-performance hydrogenated amorphous-Si TFT for AMLCD and AMOLED applications

A novel technology for manufacturing high-performance hydrogenated amorphous silicon (a-Si:H) thin-film transistors (TFTs) is developed in this letter. In the bottom gate light-shield a-Si:H TFT structure, the side edge of a-Si:H island is capped with extra deposition of heavily phosphorous-doped a-Si layer. Such an ingenuity can effectively eliminate the leakage path between the parasitic contacts of source/drain metal and the sidewall of a-Si:H island edge. In addition, electrical performance of the novel a-Si:H TFT device exhibits superior effective carrier mobility as high as 1.05 cm/sup 2//Vs, due to the enormous improvement in parasitic resistance. The impressively high performance of the proposed a-Si:H TFT provides the potential to apply foractive matrix liquid crystal display and active matrix organic light-emitting diode technology.     

A novel a-Si:H AMOLED pixel circuit based on short-term stress stability of a-Si:H TFTs

This letter presents a novel pixel circuit for hydrogenated amorphous silicon (a-Si:H) active matrix organic light-emitting diode displays employing the short-term stress stability characteristics of a-Si:H thin film transistors (TFTs). The pixel circuit uses a programming TFT that is under stress during the programming cycle and unstressed during the drive cycle. The threshold voltage shift (V/sub T/-shift) of the TFT under these conditions is negligible. The programming TFT in turn regulates the current of the drive TFT, and the pixel current therefore becomes independent of the threshold voltage of the drive TFT.     

用于TFT有源层的Ar~+激光结晶a-Si:H的性质(英文)

This paper demonstrates the technological approach to the high performance a-Si:H thin film transistor (TFT) fabricated by the Ar+ laser-crystallization technique on the fused quartz substrates. The a-Si:H films for the active layer of TFT were prepared in a capacitively coupled glow-discharge deposition system. The films were crystallized by CW Ar+ laser scanning at low speeds (3-5 cm/s). The laser power ranges from 2.5W to 5.0W. The TEM cross-section micrograph illustrates that a liquid phase laser crystallization region (LP-LCR) has defect-free of structure with a grain size of the order of handreds of micron. In the Raman spectrum of LP-LCR, 475 cm-1 peak of a-Si:H disappears and 520 cm-1 peak of c-Si becomes stronger and sharper. The value of conductivity in the layer of LP-LCR is five orders of magnitude larger than the one in asepositedd a-Si:H film. We also discussed some problems to be overcome in application of a-Si : H TFTs in LCD.     

Improved reliability of large-sized a-Si thin-film-transistor by back channel treatment in H2

A hydrogen plasma treatment on the back-channel region of large-sized amorphous silicon thin film transistor (a-Si TFT) with high RF power and optimal process time of 20 s is proposed in this work to effectively reduce off current (I_off) and threshold voltage (V_th) shift under high and low electrical-field stresses. The channel width (W) of large-sized a-Si TFT is ranged from 1000 to 10,000 μm, which are comparable to the realistic TFTs used in the gate driver on array (GOA) of display. It is experimentally found that the mechanism of V_th shift (ΔV_th) after high electrical stress is dominated by the defect generation in a-Si layer rather than charge trapping in the gate insulator (GI) layer, which is different from the observation in previous literatures. It could be due to the effects of back-channel treatment (BCT). In addition, after low electrical stresses, the mechanism of ΔV_th is dominated by defect generation in a-Si layer, which is consistent with previous reports.     

Fully self-aligned tri-layer a-Si:H thin-film transistors withdeposited doped contact layer

We demonstrate a new self-aligned TFT process for hydrogenated amorphous silicon thin-film transistors (a-Si:H TFTs). Two backside exposure photolithography steps are used to fabricate fully self-aligned tri-layer TFTs with deposited n⁺ contacts. Since no critical data alignment is required, this simple process is well suited to fabrication of short channel TFTs. We have fabricated fully self-aligned tri-layer a-Si:H TFTs with excellent device performance, and contact overlaps <1 μm. For a 20-μm channel length TFT with an a-Si:H thickness of 13 nm, the linear region (V_DS=0.1 V) and saturation region (V_DS=25 V) extrinsic mobility values are both 1.2 cm²/V-s, the off currents are <1 pA, and the on/off current ratio is >10⁷     

Thermal Behavior of Amorphous Silicon Thin Film Transistor and Its Application to Micromachined Uncooled Infrared Sensors

This work reports a new uncooled infrared sensor based on amorphous silicon thin film transistors (a-Si TFTs). The temperature coefficient of channel current (TCC) of the a-Si TFT is given. Analysis shows that the a-Si TFT working in the saturation region is preferred for the sensitive element with a TCC value of 3.8-6.0 %/K. The a-Si TFT is placed on a suspended microbridge to reduce the thermal conductance by using micro-electro-mechanical system (MEMS) technology. The a-Si TFT-based IR sensor with a monolithic architecture is fabricated. Preliminary experimental results show that a responsivity of 40.8 kV/W, a thermal response time of 5.5 ms and a NETD of 90 mK are achieved.     

Stability of amorphous-silicon TFTs deposited on clear plastic substrates at 250/spl deg/C to 280/spl deg/ C

Amorphous-silicon (a-Si) thin-film transistors (TFTs) were fabricated on a free-standing new clear plastic substrate with high glass transition temperature (T/sub g/) of >315/spl deg/ C and low coefficient of thermal expansion of <10 ppm/ /spl deg/ C. Maximum process temperatures on the substrates were 250/spl deg/C and 280/spl deg/C, close to the temperatures used in industrial a-Si TFT production on glass substrates. The first TFTs made at 280/spl deg/C have dc characteristics comparable to TFTs made on glass. The stability of the 250/spl deg/C TFTs on clear plastic is approaching that of TFTs made on glass at 300/spl deg/C-350/spl deg/C. TFT characteristics and stability depend only on process temperature and not on substrate type.