FPGA芯片设计效率的研究

为了衡量ＦＰＧＡ的使用效率,用ＦＰＧＡ芯片的逻辑门数和管脚数定义的设计空间衡量设计质量,产蒙义了ＦＰＧＡ的设计效率,利用此设计效率可以指导多片ＦＰＧＡ芯片的电路划分和电路集成。ＡＢＣ９５阵列机是全部采用ＦＰＧＡ设计的无冲突访问阵列机,实验证明,用ＦＰＧＡ仿真大规模数字系统是行之有效的。采用这些方法对ＡＢＣ９５阵列机的设计是非常有用的。     

基于高速编码的无线寻呼综合测试仪

本文介绍一种ＦＬＥＸ／ＰＯＣＳＡＧ 无线寻呼综合测试仪的实现方法,阐述了其系统结构,数字调制频率合成技术,单片机控制以及ＦＰＧＡ 高速编码技术。     

基于高速编码的无线寻呼综合测试仪

本文介绍一种ＦＬＥＸ／ＰＯＣＳＡＧ无线寻呼综合测试仪的实现方法，阐述了其系统结构，数字制频率合成技术，单片机控制以及ＦＰＧＡ高速编码技术。     

双向拉伸聚苯乙烯（BOPS）──美日食品包装的新宠物

双向拉伸聚苯乙烯（ＢＯＰＳ）──美日食品包装的新宠物吴凤展ＢＯＰＳ，ＡＮＥＷＦＡＶＯＵＲＩＴＥＩＮＦＯＯＤＰＡＣＫＡＧＩＮＧＩＮＴＨＥＵ．Ｓ．Ａ．ＡＮＤＪＡＰＡＮ￥ＷｕＦｅｎｇｚｈａｎＡｂｓｔｒａｃｔ：ＢＯＰＳｓｈｅｅｔｉｓｎｏｔｍａｎｕｆａｃｔｕｒ...     

增强增韧尼龙66工程塑料结晶行为的研究

采用ＤＳＣ技术,对增强增韧尼龙６６进行了结晶行为的研究。实验结果表明,在合金化改性ＰＡ６６结晶过程中,所填充的玻纤增强剂成核剂作用,而共混低密度聚乙烯、聚丙烯及其马来酸酐接枝物等增韧剂,使成核作用下降,总的成核作用顺序是：ＰＡ／ＧＦ〉ＰＡ／ＧＦ／ＬＤＰＥ－ｇ－ＭＡＨ〉ＰＡ／ＧＦ／ＰＰ〉ＰＡ／ＧＦ／ＰＰｇ－ＭＡＨ。     

数字图像存储器及FPGA器件的应用

本文设计并分析了一种数字图像存储器，同时讨论了ＦＰＧＡ器件在存储器中的应用，该设计简单、实用，调试方便，稳定性能好。     

CONTENTS OF NEW CARBON MATERIALS OF Vol.16

Ｎｏ .1ＲｅｓｅａｒｃｈａｒｔｉｃｌｅｓＳＴＵＤＹＯＮＴＨＥＭＩＣＲＯＷＡＶＥＡＢＳＯＲＢＩＮＧＰＲＯＰＥＲＴＹＯＦＣＯＭＰＯＳＩＴＥＭＡＴＥＲＩＡＬＣＯＮＴＡＩＮＩＮＧＣＡＲＢＯＮＮＡＮＯＴＵＢＥＳ　ＷＩＴＨＮＩＣＯＡＴＩＮＧＳＨＥＮＺｅｎｇ ｍｉｎ　ＺＨＡＯＤｏｎｇ ｌｉｎ(1) :1………………………………………………………………………ＡＮＥＦＦＥＣＴＩＶＥＭＥＴＨＯＤＦＯＲＰＩＴＣＨＣＯＭＰＯＳＩＴＩＯＮＤＥＳＩＧＮＺＨＩＬｉｎ ｊｉｅ　ＳＯＮＧＪｉｎ ｒｅｎ　ＬＩＵＬａｎｇ(1) :5………………………     

支持MPEG—2的ME芯片的结构设计

基于全搜索块匹配算法（ＦｕｌｌＳｅａｒｃｈＢｌｏｃｋＭａｔｃｈｉｎｇＡｌｇｏｒｉｔｈｍ，简称ＦＢＭＡ），提出了一种支持ＭＰＥＧ－２综合运动估计的面向ＶＬＳＩ实现的心动阵列结构。它作为Ｔ．Ｋｏｍａｒｅｋ的ＡＢ２结构的一种变形，继承了心动阵列易于扩充运算规模的优点，同时降低了局存与运算阵列之间的数据宽度。另外，为了支持ＭＰＥＧ－２对运动估计的扩充要求，这种结构可以在得到１６×１６块匹配结果的同时，得到两个１６×８场块的匹配结果。最后，从局部存储器的设计和控制器的工作流程分析说明，这种结构在工程上是易于实现的。     

FPGA技术在数据通讯中的应用

本文介绍了一种基于ＦＰＧＡ（ＦｉｅｌｄＰｒｏｇｒａｍｍａｂｌｅＧａｔｅ，Ａｒｒａｙ，现场可编程门阵列）技术的，用于单片机控制的外部设备与微计算机系统间交换信息的数据通讯卡。通讯卡的控制逻辑集成一块ＦＰＧＡ芯片上，其特点是速度快，设计灵活性大，系统可靠性高，电路设计简单。     

包装画面的量感设计

包装画面的量感设计阮伟光ＶＩＳＵＡＬＡＴＴＲＡＣＴＩＯＮＩＮＴＨＥＤＥＳＩＧＮＯＦＰＡＣＫＡＧＩＮＧＡＰＰＥＡＲＡＮＣＥ￥ＲｕａｎＷｅｉｇｕａｎｇＡｂｓｔｒａｃｔ：Ｉｎｔｈｅｌｉｍｉｔｅｄａｐｐｅａｒａｎｃｅｓｐａｃｅ，ｔｗｏｍｕｃｈｈａｓｔｏｂｅｐ...     

基于荧光标记的液相芯片检测方法研究

讨论了基于荧光标记的液相芯片及其二维并行检测方法. 设计了待测试液的特殊流场. 利用脉冲激光激发微球探针上的荧光,配合高灵敏度的 CCD 检测荧光信息,计算机对各个 CCD 记录的荧光信息进行后期处理,获得液相芯片中微球探针上的全部信息. 对检测技术方案中探针流态和荧光信号的强度进行了分析,建立了荧光信号强度与检测系统中各参量间的表达式. 每个探测单元都对荧光信号的收集进行了验证实验. 这种检测方法具有快速、准确、灵敏度高的优点.     

基于Window95环境下开发的真空设备图纸管理系统

随着ＣＡＤ技术的发展,在真空领域中越来越多的生产、设计部门开始运用各种ＣＡＤ 软件进行本部门的真空设备的设计与开发工作,但是未能对计算机中装有ＣＡＤ设计的图纸数据 （＊． ｄｗｇ）的磁盘进行更有效地管理。针对这种情况,利用当今较流行的数据管理系统Ａｃｃｅｓｓ和 ＶＢ编程语言,在微机Ｗｉｎｄｏｗ９５环境下实现了真空设备图纸档案管理。     

QUIET Coherent Polarimeter Modules

The Q/U Imaging ExperimenT (QUIET) consists of a pair of radiometer arrays designed to measure the B-mode polarization of the Cosmic Microwave Background (CMB) at 44 GHz (Q-band) and 95 GHz (W-band) with 19 and 90 modules at each frequency. The architecture of both arrays is based on miniaturized coherent polarimeters using High Electron Mobility Transistor (HEMT) chips for amplification; QUIET is the largest coherent microwave array ever fielded. We describe the detector technology used in Phase I of QUIET and our efforts to improve both the W-band module design and the fundamental performance of the HEMT amplifiers. These technology developments have wide application in the field of radio astronomy.     

SIS junctions with frequency dependent damping for a programmableJosephson voltage standard

Experimental and computational results on programmable Josephson junction array (JJA) chips based on superconductor-insulator-superconductor (SIS) junctions are presented. Implications of circuit design and fabrication process on the performance are discussed. We introduce a method to decrease the attenuation of the pump microwave. Different designs are compared, suggesting that 1 V chips operating at the third constant voltage step with 70 GHz pump frequency can be produced with our process     

A fast access memory design using 3µm bubble 80K chip

A fast-access, non-volatile memory system using 3- μm bubble 80-kbit chips has been designed for an experimental model and evaluated from a systems viewpoint. The goal of this project is to investigate from both the side of technology and cost if the memories built with major-minor organized 3 μm bubble chips are acceptable in the commercial market. This paper describes the practical design of a bubble memory system, with a capacity of 8-Mbits and an average access time of approximately 1 ms at drive frequencies of up to 500 kHz, which involves memory system organization, redundancy design using chips with excess minor loops, packaging, electronic circuits scheme and other considerations. The results of the experiment and the system cost estimate based on this design are also described.     

Design of dynamic genetic memory

In electronic systems, dynamic random access memory (DRAM) is one of the core modules in the modern silicon computer. As for a bio‐computer, one would need a mechanism for storage of bio‐information named ‘data’, which, in binary logic, has two levels, logical high and logical low, or in the normalised form, ‘1’ and ‘0’. This study proposes a possible genetic DRAM based on the modified electronic configuration, which uses the biological reaction to fulfil an equivalent RC circuit constituting a memory cell. The authors implement fundamental functions of the genetic DRAM by incorporating a genetic toggle switch for data hold. The results of simulation verify that the basic function can be used on a bio‐storage module for the future bio‐computer.Inspec keywords: DRAM chips, genetic engineering, biocomputers, bioinformatics, equivalent circuits, RC circuitsOther keywords: dynamic genetic memory design, electronic systems, dynamic random access memory, modern silicon computer, biocomputer, bioinformation, binary logic, logical high level, logical low level, normalised form, genetic DRAM, modified electronic configuration, biological reaction, equivalent RC circuit, memory cell, fundamental functions, genetic toggle switch, data hold, biostorage module     

Construction and 3-D computer modeling of connector arrays with tetragonal to decagonal transition induced by pRNA of phi29 DNA-packaging motor

The bottom-up assembly of patterned arrays is an exciting and important area in current nanotechnology. Arrays can be engineered to serve as components in chips for a virtually inexhaustible list of applications ranging from disease diagnosis to ultrahigh-density data storage. In attempting to achieve this goal, a number of methods to facilitate array design and production have been developed. Cloning and expression of the gene coding for the connector of the bacterial virus phi29 DNA-packaging motor, overproduction of the gene products, and the in vitro construction of large-scale carpet-like arrays composed of connector are described in this report. The stability of the arrays under various conditions, including varied pH, temperature and ionic strength, was tested. The addition of packaging RNA (pRNA) into the array caused a dramatic shift in array structure, and resulted in the conversion of tetragonal arrays into larger decagonal structures comprised of both protein and RNA. RNase digestion confirmed that the conformational shift was caused by pRNA, and that RNA was present in the decagons. As has been demonstrated in biomotors, conformational shift of motor components can generate force for motor motion. The conformational shift reported here can be utilized as a potential force-generating mechanism for the construction of nanomachines. Three-dimensional computer models of the constructed arrays were also produced using a variety of connector building blocks with or without the N- or C-terminal sequence, which is absent from the current published crystal structures. Both the connector array and the decagon are ideal candidates to be used as templates to build patterned suprastructures in nanotechnology.     

Multichip module with planar-integrated free-space optical vector-matrix-type interconnects

Even in the semiconductor industry, free-space optical technology is nowadays seen as a prime option for solving the continually aggravating problem with VLSI chips, namely, that the interconnect technology has failed to keep pace with the increase in communication volume. To make free-space optics compatible with established lithography-based design and fabrication techniques the concept of planar integration was proposed approximately a decade ago. Here its evolution into a photonic microsystems engineering concept is described. For demonstration, a multichip module with planar-integrated freespace optical vector-matrix-type interconnects was designed and built. It contains flip-chip-bonded vertical-cavity surface emitting laser arrays and a hybrid chip with an array of multiple-quantum-well p-i-n diodes on top of a standard complementary metal-oxide semiconductor circuit as key optoelectronic hardware components. The optical system is integrated into a handy fused-silica substrate and fabricated with surface-relief diffractive phase elements. It has been optimized for the given geometrical and technological constraints and provides a good interconnection performance, as was verified in computer simulations on the basis of ray tracing and in practical experiments.     

液冷计算机固体污染度检测研究

随着微电子技术的发展，芯片的功耗越来越高，计算机逐渐使用液体冷却技术解决其散热问题。固体颗粒污染物存在于计算机流体通道内部，这些污染物在冷却液流动过程中对会冲蚀计算机的流体通道甚至造成快速接头故障。为了减少固体污染物对液冷计算机的危害，应限制液冷计算机的固体颗粒污染度水平，以保证液冷计算机在某一污染度水平下能够正常工作。因此，准确测试液冷计算机的固体颗粒污染度指标就至关重要。本文对固体颗粒污染度分级标准、污染度检测方法和检测要求进行了介绍，最后提出了液冷计算机固体污染度的检测方法。