Interface quality study of ECR-deposited and rapid thermal annealed silicon nitride Al/SiNx:H/InP and Al/SiNx:H/In0.53Ga0.47As structures by DLTS and conductance transient techniques

In this article, we study the influences of the rapid thermal annealing temperature and dielectric composition on the electrical characteristics of ECR-deposited silicon nitride SiN_x:H–InP and SiN_x:H–InGaAs interfaces. C–V, deep level transient spectroscopy (DLTS) and conductance transient analysis have been applied. As for InP cases, DLTS results reveal that rapid thermal annealing application increases interfacial state density. In contrast, transient conductance measurements show that disorder induced gap-state (DIGS) damage density diminishes when RTA is applied. So, we can conclude that RTA treatments take out the insulator damage to the interface. In the InGaAs-n cases, we have observed that DIGS damage evolution with RTA temperature is opposite to the interfacial state density. This behaviour seems to suggest some temperature activated defect exchange between the insulator and the interface. Finally, as for the insulator composition influence on the interface quality of the InGaAs-n samples, DLTS results suggest that the intermediate x values (1.43 and 1.50) provide better interfaces than extreme x values. Conductance transient measurements add complementary information: insulator damage increases when x increases. Hence, x=1.43 seems to be the best choice to improve the overall interface quality.     

Electrical characterization of the hafnium oxide prepared by direct sputtering of Hf in oxygen with rapid thermal annealing

Electrical characterization of the hafnium oxide (HfO₂) gate dielectric films prepared by Hf sputtering in oxygen was conducted. By measuring the current–voltage (I–V) characteristics at temperature ranging from 300 to 500 K, several abnormalities in the I–V characteristics are recorded. For temperatures below 400 K, the current–voltage characteristics in high field region can be plotted with the Fowler–Nordheim law but a stronger temperature dependence was observed. Large flatband voltage shifts in the Al/HfO₂/Si capacitor were observed. The capacitance–voltage characteristics and flatband shifts are found to depend strongly on the post-deposition annealing temperature and duration. To study the reliability against high electric field, constant voltage stressing on the samples was conducted. We found that the trap energy levels are shallow and the oxide traps can be readily filled and detrapped at a low bias voltage.     

Hafnium oxide thin films deposited by high pressure reactive sputtering in atmosphere formed with different Ar/O2 ratios

The physical and electrical properties of hafnium oxide (HfO₂) thin films deposited by high pressure reactive sputtering (HPRS) have been studied as a function of the Ar/O₂ ratio in the sputtering gas mixture. Transmission electron microscopy shows that the HfO₂ films are polycrystalline, except the films deposited in pure Ar, which are amorphous. According to heavy ion elastic recoil detection analysis, the films deposited without using O₂ are stoichiometric, which means that the composition of the HfO₂ target is conserved in the deposition films. The use of O₂ for reactive sputtering results in slightly oxygen-rich films. Metal-Oxide-Semiconductor (MOS) devices were fabricated to determine the deposited HfO₂ dielectric constant and the trap density at the HfO₂/Si interface (D_it) using the high–low frequency capacitance method. Poor capacitance–voltage (CV) characteristics and high values of D_it are observed in the polycrystalline HfO₂ films. However, a great improvement of the electrical properties was observed in the amorphous HfO₂ films, showing dielectric constant values close to 17 and a minimum D_it of 2×10¹¹ eV⁻¹ cm⁻².     

The properties of high-k gate dielectric films deposited on HRSOI

In this paper, HfO₂ dielectric films with blocking layers (BL) of Al₂O₃ were deposited on high resistivity silicon-on-insulator (HRSOI), and the interfacial and electrical properties are reported. High-resolution transmission electron microscopy (HRTEM) indicated that BL could thin the interfacial layer, keep the interface smooth, and retain HfO₂ amorphous after annealing. Energy dispersive X-ray spectroscopy (EDS) and X-ray photoelectron spectroscopy (XPS) confirmed that BL weaken Si diffusion and suppressed the further growth of HfSiO. Electrical measurements indicated that there was no hysteresis was observed in capacitance–voltage curves, and Flatband shift and interface state density is 0.05 V and −1.3 × 10¹² cm⁻², respectively.     

Single band electronic conduction in hafnium oxide prepared by atomic layer deposition

Current–voltage and capacitance–voltage measurements on MOS structures with hafnium gate oxide (HfO₂) prepared by atomic layer deposition were conducted to determine the dominant current conduction in the Al/HfO₂/Si structure. In n-type substrate MOS structures, electron injection from Al into HfO₂ is observed when the Al electrode is negatively biased. Whereas in p-type MOS capacitors at negative biasing, no hole injection can be detected and the current in the insulator is again due to the electron injection from Al. These results unambiguously indicate that in both p- and n-type substrates and at both biasing polarities only electronic current conduction in the Si/HfO₂/Al is significant.     

Influences of bottom electrode TaN on electrical characteristics for metal–HfO2–metal capacitors

For TaN–HfO₂–TaN_x capacitors, the effects of bottom electrode TaN_x with different nitrogen contents on electrical characteristics are exhibited. An obvious oxygen deficiency can be found in HfO₂ film by AES analysis for the sample with bottom electrode TaN_x sputtered at a N₂/(N₂ + Ar) flow ratio of 10%. The bottom electrode TaN_x films with different nitrogen contents apparently affect HfO₂/TaN_x interfacial property and electrical characteristic of follow-up deposited HfO₂ film. Experimental results reveal that the more defective TaN_x structure can induce more oxygen vacancies in subsequently deposited HfO₂ film and result in a higher leakage current density and a worse breakdown electric field. Two factors affect these electrical characteristics including interfacial stress and oxygen vacancy. It indicates that interfacial stress due to various stochiometric TaN_x structure dominates the voltage linearity property of capacitance, but more leak paths and local field breakdown defects can be induced by interfacial stress and oxygen vacancy. Better electrical characteristics can be attained for the sample with bottom electrode TaN_x sputtered at a N₂/(N₂ + Ar) flow ratio of 20%.     

Effects of oxygen partial pressure on structural and electrical characteristics of HfAlO high-k gate dielectric grown on strained SiGe by pulsed-laser deposition

Dependence of oxygen partial pressures on structural and electrical characteristics of HfAlO (Hf:Al=1:1) high-k gate dielectric ultra-thin films grown on the compressively strained Si₈₃Ge₁₇ by pulsed-laser deposition were investigated. The microstructure and the interfacial structure of the HfAlO thin films grown under different oxygen partial pressures were studied by transmission electron microscopy, and the their electrical properties were characterized by capacitance–voltage (C−V) and conductance–voltage measurements. Dependence of interfacial layer thickness and C–V characteristics of the HfAlO films on the growth of oxygen pressure was revealed. With an optimized oxygen partial pressure, an HfAlO film with an effective dielectric constant of 16 and a low interface state density of 2.1×10¹⁰ cm⁻² eV⁻¹ was obtained.     

Ultrathin HfO2 gate dielectrics on partially strain compensated SiGeC/Si heterostructure

Ultrathin HfO₂ gate dielectrics have been deposited on strain-compensated Si_0.69Ge_0.3C_0.01 layers by rf magnetron sputtering. X-ray diffraction spectra show the films to be polycrystalline having both monoclinic and tetragonal phases. The formation of an interfacial layer has been observed by high-resolution transmission electron microscopy. Secondary ion mass spectroscopy and Auger electron spectroscopy analyses show the formation of an amorphous Hf-silicate interfacial layer between the deposited oxide and SiGeC films. The average concentration of Ge at the interfacial layer is found to be 2–3 at%. The leakage current density of HfO₂ gate dielectrics is found to be several orders of magnitude lower than that reported for thermal SiO₂ with the same equivalent thickness.     

Probing stress effects in HfO2 gate stacks with time dependent measurements

Effects of constant voltage stress (CVS) on gate stacks consisting of an ALD HfO₂ dielectric with various interfacial layers were studied with time dependent sensing measurements: DC I–V, pulse I–V, and charge pumping (CP) at different frequencies. The process of injected electron trapping/de-trapping on pre-existing defects in the bulk of the high-κ film was found to constitute the major contribution to the time dependence of the threshold voltage (V_t) shift during stress. The trap generation observed with the low frequency CP measurements is suggested to occur within the interfacial oxide layer or the interfacial layer/high-κ interface, with only a minor effect on V_t.     

Structural and interfacial properties of high-k HfOxNy gate dielectric films

The thermal stability and interfacial characteristics for hafnium oxynitride (HfO_xN_y) gate dielectrics formed on Si (1 0 0) by plasma oxidation of sputtered HfN films have been investigated. X-ray diffraction results show that the crystallization temperature of nitrogen-incorporated HfO₂ films increases compared to HfO₂ films. Analyses by X-ray photoelectron spectroscopy confirm the nitrogen incorporation in the as-deposited sample and nitrogen substitution by oxygen in the annealed species. Results of FTIR characterization indicate that the growth of the interfacial SiO₂ layer is suppressed in HfO_xN_y films compared to HfO₂ films annealed in N₂ ambient. The growth mechanism of the interfacial layer is discussed in detail.     

On the influence of substrate cleaning method and rapid thermal annealing conditions on the electrical characteristics of Al/SiNx/SiO2/Si fabricated by ECR-CVD

We investigate the influence of the used cleaning method and rapid thermal annealing (RTA) conditions on the electrical characteristics of MIS devices based on SiN_y:H/SiO_x dielectric stack structures fabricated by electron-cyclotron-resonance plasma assisted chemical vapour deposition (ECR-CVD). We use capacitance–voltage (C–V) technique to study charge trapped in the insulator, Deep Level Transient Spectroscopy (DLTS) to study the trap distributions at the interface, and conductance transient (G–t) technique to determine the energy and geometrical profiles of electrically active defects at the insulator bulk as these defects follow the disorder-induced gap state (DIGS) model.     

Recrystallization and dielectric properties of CaHfOx films on Si

The recrystallization and dielectric behavior for amorphous CaHfO_x films on Si substrates has been investigated. Upon conventional annealing in air, the CaHfO_x films remain amorphous up to an annealing temperature of 800 °C for annealing times of 1 h. This recrystallization temperature is significantly higher than that reported for HfO₂ subjected to rapid thermal annealing. Metal–insulator–semiconductor structures with Pt gate electrodes were fabricated with various CaHfO_x film thickness for capacitance–voltage and leakage current measurements. From this, the permittivity of CaHfO_x was determined, along with interface layer capacitance for films on Si. The enhanced stability against polycrystalline grain growth, along with the thermodynamic stability of both CaO and HfO₂ in contact with Si, suggests that CaHfO_x may be an attractive gate dielectric for future generation metal–oxide–semiconductor field-effect transistor applications.     

Study of light-induced annealing effects in a-Si:H thin films

Light-induced metastability was examined in hydrogenated amorphous silicon thin films using a 500 W xenon lamp and a 10 mW HeCd laser. Positron beam annihilation spectroscopy (PAS) and fourier transform infrared spectroscopy (FTIR) were examined to investigate the effects of light on the structural properties of the films. The experimental results exhibited significant decrease in the S-parameter of the PAS, indicating marked reduction in the defect density of the films. The FTIR spectroscopy showed significant reduction in the transmission coefficient of IR radiation at frequencies corresponding to Si–H and Si–H₃ phonon modes, indicating that the observed annealing effects were due to light-induced formation of Si–H and Si–H₃ bonds. A second thermal annealing process conducted after the light exposure experiment resulted in a further substantial decrease in defect density for the sample exposed to HeCd laser. The experimental results are explained by a competing, light induced, dangling bond creation/annealing process, in which the incoming photons caused the annealing of dangling bonds, particularly those at around the voids. However, in the bulk region, the photons caused both the breaking of weak Si–Si bonds as well as the annealing of dangling bonds.     

Structural and electrical characteristics of RF-sputtered HfO2 high-k based MOS capacitors

The HfO₂ high-k thin films have been deposited on p-type (1 0 0) silicon wafer using RF magnetron sputtering technique. The XRD, AFM and Ellipsometric characterizations have been performed for crystal structure, surface morphology and thickness measurements respectively. The monoclinic structured, smooth surface HfO₂ thin films with 9.45 nm thickness have been used for Al/HfO₂/p-Si metal-oxide-semiconductor (MOS) structures fabrication. The fabricated Al/HfO2/Si structure have been used for extracting electrical properties viz dielectric constant, EOT, barrier height, doping concentration and interface trap density through capacitance voltage and current-voltage measurements. The dielectric constant, EOT, barrier height, effective charge carriers, interface trap density and leakage current density are determined are 22.47, 1.64 nm, 1.28 eV, 0.93 × 10¹⁰, 9.25 × 10¹¹ cm⁻² eV⁻¹ and 9.12 × 10⁻⁶ A/cm² respectively for annealed HfO₂ thin films.     

Post deposition UV-induced O2 annealing of HfO2 thin films

UV-assisted annealing processes for thin oxide films is an alternative to conventional thermal annealing and has shown many advantages such as low annealing temperature, reducing annealing time and easy to control. We report in this work the deposition of ultra-thin HfO₂ films on silicon substrate by two CVD techniques, namely thermal CVD and photo-induced CVD using 222 nm excimer lamps at 400 °C. As-deposited films of around 10 nm in thickness with refractive indices from 1.72 to 1.80 were grown. The deposition rate measured by ellipsometry was found to be about 2 nm/min by UV-CVD, while the deposition rate by thermal CVD is 20% less than that by UV-CVD. XRD showed that the as-deposited HfO₂ films were amorphous. This work focuses on the effect of post deposition UV annealing in oxygen on the structural, optical and electrical properties of the HfO₂ films at low temperature (400 °C). Investigation of the interfacial layer by FTIR revealed that thickness of the interfacial SiO₂ layer slightly increases with the UV-annealing time and UV annealing can convert sub-oxides at the interface into stoichiometric SiO₂, leading to improved interfacial qualities. The permittivity ranges in 8–16, are lower than theoretical values. However, the post deposition UV O₂ annealing results in an improvement in effective breakdown field and calculated permittivity, and a reduction in leakage current density for the HfO₂ films.     

Examination and evaluation of La2O3 as gate dielectric for sub-100 nm CMOS and DRAM technology

High-k gate dielectric La₂O₃ thin films have been deposited on Si(1 0 0) substrates by molecular beam epitaxy (MBE). Al/La₂O₃/Si metal-oxide–semiconductor capacitor structures were fabricated and measured. A leakage current of 3 × 10⁻⁹ A/cm² and dielectric constant between 20 and 25 has been measured for samples having an equivalent oxide thickness (EOT) 2.2 nm. The estimated interface state density D_it is around 1 × 10¹¹ eV⁻¹ cm⁻². EOT and flat-band voltage were calculated using the NCSU CVC program. The chemical composition of the La₂O₃ films was measured using X-ray photoelectron spectrometry and Rutherford backscattering. Current density vs. voltage curves show that the La₂O₃ films have a leakage current several orders of magnitude lower than SiO₂ at the same EOT. Thin La₂O₃ layers survive anneals of up to 900 °C for 30 s with no degradation in electrical properties.     

Low temperature processed hafnium oxide: Structural and electrical properties

In this work hafnium oxide (HfO₂) was deposited by r.f. magnetron sputtering at room temperature and then annealed at 200 °C in forming gas (N₂+H₂) and oxygen atmospheres, respectively for 2, 5 and 10 h. After 2 h annealing in forming gas an improvement in the interface properties occurs with the associated flat band voltage changing from −2.23 to −1.28 V. This means a reduction in the oxide charge density from 1.33×10¹² to 7.62×10¹¹ cm⁻². After 5 h annealing only the dielectric constant improves due to densification of the film. Finally, after 10 h annealing we notice a degradation of the electrical film's properties, with the flat band voltage and fixed charge density being −2.96 V and 1.64×10¹² cm⁻², respectively. Besides that, the leakage current also increases due to crystallization. On the other hand, by depositing the films at 200 °C or annealing it in an oxidizing atmosphere no improvements are observed when comparing these data to the ones obtained by annealing the films in forming gas. Here the flat band voltage is more negative and the hysteresis on the C–V plot is larger than the one recorded on films annealed in forming gas, meaning a degradation of the interfacial properties.     

An investigation of electrical and structural properties of Ni-germanosilicided Schottky diode

Ni-germanosilicided Schottky barrier diode has been fabricated by annealing the deposited Ni film on strained-Si and characterized electrically in the temperature range of 125 K–300 K. The chemical phases and morphology of the germanosilicided films were studied by using scanning electron microscopy (SEM), cross-sectional transmission electron microscopy (TEM) and energy dispersive spectroscopy (EDS). The Schottky barrier height (_b), ideality factor (n) and interface state density (D_it) have been determined from the current–voltage (I–V) and capacitance–voltage (C–V) characteristics. The current–voltage characteristics have also been simulated using SEMICAD device simulator to model the Schottky junction. An interfacial layer and a series resistance were included in the diode model to achieve a better agreement with the experimental data. It has been found that the barrier height values extracted from the I–V and C–V characteristics are different, indicating the existence of an in-homogeneous Schottky interface. Results are also compared with bulk-Si Schottky diode processed in the same run. The variation of electrical properties between the strained- and bulk-Si Schottky diodes has been attributed to the presence of out-diffused Ge at the interface.     

Applications of DCIV method to NBTI characterization

The DCIV method was applied to investigate negative bias temperature instability (NBTI) in SiO₂ gate oxides. The DCIV technique, which measures the interface defect density independently from bulk oxide charges, delineates the contribution of the interface defect generation to the overall NBTI measured by the threshold voltage shift, ΔV_TH. The DCIV results obtained during both stress and relaxation phases are generally consistent with the main features of the reaction–diffusion (R–D) model, which suggests positive charge generation/annealing at the Si/SiO₂ interface due to breaking/re-passivation of the Si–H bonds. These results are in agreement with the spin-dependent recombination (SDR) experiments, which reflect the density of the Si dangling bonds at the Si/SiO₂ interface (P_b centers) and its vicinity (E′ centers). Comparison of degradation kinetics as measured by DCIV, charge-pumping, and I_D − V_G (ΔV_TH) techniques, however, suggests that ΔV_TH includes additional contributions, most likely from the oxide bulk charges. For comparison, an NBTI study was also performed on the high-k HfO₂/SiO₂ gate stacks. After adjusting for the high-k related contribution, similar kinetics of the long-term stress interface trap generation was observed in SiO₂ and high-k gate stacks suggesting a common mechanism of the interface degradation.     

Ballistic electron emission microscopy studies of the temperature dependence of Schottky barrier height distribution in CoSi2/n-Si(1 0 0) diodes formed by solid phase reaction

Ballistic electron emission microscopy (BEEM) and ballistic electron emission spectroscopy have been performed on polycrystalline and epitaxial CoSi₂/n-Si(1 0 0) contacts at temperatures ranging from −144°C to −20°C. The ultra-thin CoSi₂ films (10 nm) were fabricated by solid state reaction of a single layer of Co (3 nm) or a multilayer of Ti (1 nm)/Co (3 nm)/amorphous-Si(1 nm)/Ti (1 nm) with a Si substrate, respectively. The spatial distribution of barrier height over the contact area obeys a Gaussian function at each temperature. The mean barrier height increases almost linearly with decreasing temperature with a coefficient of −0.23±0.02 meV/K for polycrystalline CoSi₂/Si diodes and −0.13±0.03 meV/K for epitaxial diodes. This is approximately equal to one or one-half of the temperature coefficient of the indirect energy gap in Si, respectively. It suggests that the Fermi level is pinned to different band positions of Si. The width of the Gaussian distribution is about 30–40 meV, without clear dependence on the temperature. The results obtained from conventional current–voltage and capacitance–voltage (I–V/C–V) measurements are compared to BEEM results.