一种低压TSC的过零触发电路设计

设计了一种低压TSC触发电路,该电路能在晶闸管两端电压过零时刻触发晶闸管,从而实现TSC支路的无冲击投入.该电路采用隔离电源供电的电压比较器和二极管钳压电路组成电压过零检测模块,并加入一阶滤波环节.不但提高了过零检测的速度和精度,而且还解决了触发电路与主电路的电气隔离问题.通过实验证明该电路能应对复杂工况,并且取得了很好的触发效果.     

调幅电路的相乘器模型及其仿真

以调幅式无线电广播发射机电路为例,对调幅电路进行设计与仿真研究,提出了相乘器电路模型来实现调幅电路,采用EWB仿真软件进行设计分析。结果表明,所设计的放大电路符合预期设计要求,设计过程和方法都比较简单,与传统的实验方法相比,解决了硬件调制和测试比较复杂的问题。电路的仿真结果表明了电路模型的可行性和有效性。     

基于风洞的电容式加速度计检测电路设计

针对风洞试验中的振动,设计了变面积式电容式加速度传感器,阐述了弱信号检测系统并着重介绍了几个重要的模块电路即交流激励信号源电路、电容电压电路、滤波电路、并利用电子自动化检测仿真软件multisim对设计的主要模块电路分别进行了仿真分析。仿真结果表明设计的电路能完成微弱电容信号的检测。同时,为了提高电路性能,对弱信号检测电路中的杂散电容干扰进行了分析研究,并设计了电路对噪声进行了抑制。     

基于multisim的电压有效值前置电路的设计与仿真

使用运算放电器tl084acd设计一个电压有效值前置电路的设计,此电路由衰减电路、电压跟随电路、偏置电路和反相放大器电路组成,能对5-50V输入电压进行变换到0-5V,并使用multisim进行了仿真,仿真结果表明电路工作正常。     

对数空间可构造的无向图遍历序列

研究了为无向连通子图设计环状遍历序列（TSC）的空间复杂性问题。通过定义对数空间的Cook归约,分析了TSC问题与无向图连接性问题及通用遍历序列构造问题的关系,证明了TSC问题以及无向图遍历问题是对数空间可解的,并给出了一个TSC一般性构造方法。最后还提出了一个更有效的针对树状图的TSC构造算法。     

电动汽车充电站的无功补偿控制策略研究

为改善电动汽车充电站接入电网后引起的电压波动、无功不足等电能质量问题,提出了一种对电网进行无功补偿的控制策略。利用晶闸管投切电容器（TSC）无功补偿装置与模糊控制相结合,采用专家经验的方法,通过模糊控制器的双输入量来控制输出量,从而控制TSC的投切。仿真结果表明,通过该控制策略补偿后的电压维持在正常允许范围内,电网中所需的无功功率明显减少,且仿真速度加快。说明电动汽车充电站接入电网后TSC无功补偿的模糊控制控制策略有效、可行。     

最优化电路设计的仿真分析方法

本文提出了一种电路最优化仿真设计的新方法，即将PSpice的参数扫描分析和优化设计分析相结合起来对电路进行最优化仿真设计，并结合一个带通滤波器电路，阐述了该仿真分析方法的具体实施步骤，最后给出了滤波器电路最优化设计的仿真分析结果，其结果完全符合理论分析设计值的要求，说明该方法在电路的最优化设计中具有很高的实用价值。     

心率模拟信号处理电路的仿真研究和设计

为保证基于FPGA数字心率计设计的性能,心率信号处理的模拟电路设计至关重要,由于外围电路存在噪声干扰,如何优化设计该电路,以有效地提取心率信号是传统设计的难点.利用Multisim仿真,可以很好地解决传统设计方法难以实现的电路优化设计.Multisim仿真把传统的硬件设计、调试、仿真集成在一个软件环境下,边设计边修改边调试,经过不断地参数设计和电路的调试,将心率模拟信号处理电路分为前级、中级和末级多级放大,低通、高通和陷波多级滤波,最终经过整形得到心率的数字信号.实践表明,改进电路有效地去除噪声,可提取正确心率信号,达到了理想的设计效果.证明仿真设计为信号处理电路提供了一个有效手段.     

多路电能计量与控制系统的设计与仿真

在实际电路设计工程中为加快设计进度,利用现代计算机仿真技术和软件对实际电路进行了仿真设计;基于仿真元件和实际电路的差异,对电路中的独特元件磁保持继电器及其驱动电路、功率信号以及逻辑处理电路进行了分析并建立了仿真模型,设计了核心测量软件代码,成功完成了对16路用电线路的电能计量与通断等的控制,达到了项目对多路集中用电的控制和节能的目的;仿真结果节约了成本和时间,提高了设计效率,仿真过程对大部分电路设计具有借鉴意义.     

基于proteus的单片机A/D转换设计及仿真

Proteus具有丰富的元件仿真模型和强大的仿真功能,提出了单片机A/D转换的仿真方法。文章利用ADC0808芯片、AT89C52和7SEG显示器设计了电路原理图,并结合Keil软件对电路进行了实验仿真,直观地观测了电路的仿真效果,达到了设计目的。     

Embedded totally self-checking checkers: a practical design

In a totally self-checking (TSC) design, the circuit detects errors by monitoring redundantly coded data/control paths through a TSC checker. A problem arises when not all these code words are on the monitored lines during normal operation. A method of designing checkers that solves this difficulty is proposed. The method uses TSC checkers based on flip-flops instead of using the mostly combinational checkers now available. Two design applications are presented: TSC checkers for arithmetic AN codes, and a TSC iterative logic array     

完全自校验四余度容错系统设计

完全自校验四余度容错系统是由完全自校验电路管理一个传统的四余度容错系统组成,其中完全自校验电路的功能是用来检测冗余模块错误信息和校验电路本身的错误。错误信息指示主要依赖于错误信息输出,它可以用来产生停止信号来阻止错误的传播。校验电路内部错误产生的指示码和冗余模块错误信息无关,但是可以屏蔽冗余模块和完全自校验电路的错误。此系统具有很高的可用性和可维护性。     

Fault tolerance and digital systems

The paper surveys recent techniques for incorporating selftest and fault-tolerant features into digital systems and comments on their applicability to designs containing VLSI components, such as microprocessors and microcomputers. In particular, the paper covers coding techniques and the design of totally self-checking code checkers; the design of fault-tolerant computer subsystems such as clock generators and semiconductor memory; and techniques for including built-in test facilities and the development of self-test checkout routines. In conclusion, it is suggested that the next major area for research must be the design of fault-tolerant software.     

Self-checking circuits and decoding algorithms for binary hamming and BCH codes and Reed-Solomon codes over GF(2 m )

We consider problems of detecting errors in combinational circuits and algorithms for the decoding of linear codes. We show that a totally self-checking combinatorial circuit for the decoding of a binary Hamming [n, k] code can be constructed if and only if n = 2 ^r ? 1, r = n?k. We introduce the notion of a totally self-checking combinational circuit detecting error clusters of size at most µ; for shortened Hamming [n,k] codes, we construct totally self-checking decoding combinational circuits detecting error clusters of size at most µ, 2 ≤ µ < n?k. We describe single-error protected and self-checking algorithms: the extended Euclidean algorithm and decoding algorithms for binary BCH codes and Reed-Solomon codes over GF(2 ^m ).     

Dependable design technique for system-on-chip

A technique for highly reliable digital design for two FPGAs under a processor control is presented. Two FPGAs are used in a duplex configuration system design, but better dependability parameters are obtained by the combination of totally self-checking blocks based on a parity predictor. Each FPGA can be reconfigured when a SEU fault is detected. This reconfiguration is controlled by a control unit implemented in a processor. Combinational circuit benchmarks have been considered in all our experiments and computations. All our experimental results are obtained from a XILINX FPGA implementation using EDA tools. The dependability model and dependability calculations are presented to document the improved reliability parameters.     

基于Rogowski线圈的工频大电流测试仪的设计

介绍Rogowski线圈的原理,描述工频大电流测试仪系统的各部分硬件电路设计,以及实现系统功能的软件设计。介绍了产品的使用情况。     

Testing And Applications of Inverter-Free PLAs

The testing properties of inverter-free PLAs make them ideal for application to totally self-checking and easily testable circuits. After a class of test patterns and masking relations for these new patterns are determined, a complete test set for single and multiple crosspoint faults can be easily generated. Moreover, the procedure does not require any fault simulation. The code space inputs detect all single and multiple faults in PLAs for totally self-checking circuits, even if the faults are not unidirectional. The test results can be used to analyze easily testable PLAs. With minor hardware changes in one-input decoder PLAs, the personality matrix will serve as a complete test set.     

基于20C51单片机的PC键盘测试仪

本介绍了PC键盘的接口规范,并简要说明了键盘扫描码与按键的对应关系,提出了一种简易的键盘测试仪的软硬件设计方案,该测试仪对AT20C51单片微处理器为CPU,配合一些简单的外围接口器件,可用于读取并显示相应的按键键值,从而为维修人员对键盘进行测试与维修提供方便。     

Designing and developing a language environment for second language writers

This paper presents a field study carried out with learners who used a grammar checker in real writing tasks in an advanced course at a Swedish university. The objective of the study was to investigate how students made use of the grammar checker in their writing while learning Swedish as a second language. Sixteen students with different linguistic and cultural backgrounds participated in the study. A judgment procedure was conducted by the learners on the alarms from the grammar checker. The students’ texts were also collected in two versions; a version written before the session with the grammar checker, and a version after the session. This procedure made it possible to study to what extent the students followed the advice from the grammar checker, and how this was related to their judgments of its behavior.The results obtained demonstrated that although most of the alarms from the grammar checker were accurate, some alarms were very hard for the students to judge correctly. The results also showed that providing the student with feedback on different aspects of their target language use; not only on their errors, and facilitating the processes of language exploration and reflection are important processes to be supported in second-language learning environments.Based on these results, design principles were identified and integrated in the development of Grim, an interactive language-learning program for Swedish. We present the design of Grim, which is grounded in visualization of grammatical categories and examples of language use, providing tools for both focus on linguistic code features and language comprehension.     

Designing and developing a language environment for second language writers

This paper presents a field study carried out with learners who used a grammar checker in real writing tasks in an advanced course at a Swedish university. The objective of the study was to investigate how students made use of the grammar checker in their writing while learning Swedish as a second language. Sixteen students with different linguistic and cultural backgrounds participated in the study. A judgment procedure was conducted by the learners on the alarms from the grammar checker. The students’ texts were also collected in two versions; a version written before the session with the grammar checker, and a version after the session. This procedure made it possible to study to what extent the students followed the advice from the grammar checker, and how this was related to their judgments of its behavior.The results obtained demonstrated that although most of the alarms from the grammar checker were accurate, some alarms were very hard for the students to judge correctly. The results also showed that providing the student with feedback on different aspects of their target language use; not only on their errors, and facilitating the processes of language exploration and reflection are important processes to be supported in second-language learning environments.Based on these results, design principles were identified and integrated in the development of Grim, an interactive language-learning program for Swedish. We present the design of Grim, which is grounded in visualization of grammatical categories and examples of language use, providing tools for both focus on linguistic code features and language comprehension.