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1.
In direct digital synthesizer (DDS) applications, the drawback of the conventional delta sigma () modulator structure is that its signal band is fixed. In the new architecture presented in this paper, the signal band of the modulator is tuned according to the DDS output frequency. We use a hardware efficient phase-to-sine amplitude converter in the DDS that approximates the first quadrant of the sine function with sixteen equal length second degree polynomial segments. The DDS is capable of frequency, phase, and quadrature amplitude modulation. Two DDSs with tunable 1-bit D/A converters (real and complex) were designed and implemented on a programmable logic device (PLD); experimental results show their desired operation and performance.  相似文献   

2.
MOS transistor mismatch is revisited in the context of subthreshold operation and VLSI systems. We report experimental measurements from large transistor arrays with device sizes typical for digital and analog VLSI systems (areas between 9 and 400µm2). These are fabricated at different production qualified facilities in 40-nm gate oxide,n-well andp-well, mask lithography processes. Within the small area of our test-strips (3 mm2), transistor mismatch can be classified into four categories: random variations, edge, striation, and gradient effects. The edge effect manifests itself as a dependence of the transistor current on its position with reference to the surrounding structures. Contrary to what was previously believed, edge effects extend beyond the outer most devices in the array. The striation effect exhibits itself as a position-dependent variation in transistor current following a sinusoidal oscillation in space of slowly varying frequency. The gradient effect is also a position-dependent spatial variation but of much lower frequency. When systematic effects are removed from the data, the random variations follow an inverse linear dependence on the square root of transistor area.  相似文献   

3.
Most industrial digital circuits contain three-state elements besides pure logic gates. This paper presents a gate delay fault simulator for combinational circuits that can handle three-state elements like bus drivers, transmission gates and pulled busses. The well known delay faults--slow-to-rise and slow-to-fall--are considered as well as delayed transitions from isolating signal state high impedance to binary states 0 and 1 and vice versa. The presented parallel delay fault simulator distinguishes between non-robust, robust and hazard free tests and determines the quality of a test. Experimental results for ISCAS85/89 benchmark circuits are presented as well as results for industrial circuits containing three-state elements.  相似文献   

4.
For decades, technologists have been promising the intelligent house. The vision is usually portrayed as a house filled with technology which will do the dweller's bidding and take all domestic drudgery out of their lives. The truly intelligent house is still some way off, but the emergence of broadband, availability of faster, smaller and ever cheaper computing equipment and a variety of wired and wireless network technologies are enabling technologies that bring this vision closer to reality. These technology trends lead to the concept that computing and other smart devices will become pervasive, fully networked and disappear into the infrastructure of the home. People will carry out their tasks unaware of the complexity of the infrastructure that supports their activities in much the same way as people today use mains electricity.This paper introduces these concepts and discusses the technological challenges to be overcome. We present our vision of the pervasive home environment where inhabitants can focus on tasks rather than the technology: I need to create X and send it to Y rather than I need to use this computer and this application which needs access to service A and resource B. Although this sounds simple, the environment needs to understand who I is, and who or what Y is. Appropriate permissions must be in place and resources allocated, if available. The most appropriate interface for the task and user must be determined.The pervasive, intelligent home will make available new ways to access and share information. It will herald new services, such as care and support of people in the home, entertainment, educational and security services. The final part of the paper discusses the commercial opportunities and challenges which must be met, not least the need for industry to agree on open standards and interfaces.  相似文献   

5.
Uniform quantization of random vectors onto -grids n is considered. Higherorder terms in asymptotic expansions for the entropy of the -quantized random vector and for the loss of the mutual information between two random vectors under such quantization as 0+are obtained. The coefficients in these asymptotics are explicitly calculated for Gaussian distributed vectors. Taken for initial segments of stationary Gaussian sequences, these factors have limit average values per unit of time. For such sequences governed by state-space equations, computation of these average values is reduced to solutions of algebraic matrix Riccati and Lyapunov equations.Work supported by the Australian Research Council grant A 4970 2246.  相似文献   

6.
In this paper a new class-AB CMOS second generation current conveyor (CCII) based on a novel high-performance voltage follower topology is proposed. Post-layout simulation results from a 0.8 m design supplied at 3.3 V show very low resistance at node X (<50 ), high frequency operation (100 MHz), high precision in the voltage and current transference and reduced offset. As application examples, a V-I converter and a current feedback operational amplifier (CFOA) have been implemented. The latter presents slew-rate levels higher than ±100 V/s.  相似文献   

7.
This paper is the first in a two part sequence which studies nonlinear networks, containing capacitor-only cutsets and/or inductor-only loops from the geometric coordinate-free point of view of differentiable manifolds. Given such a nonlinear networkN, with °0 equal to the sum of the number of independent capacitor-only cutsets and the number of independent inductor-only loops, we establish the following: (i) circuit theoretic sufficient conditions to guarantee that the set 0, of equilibrium points is a 0-dimensional submanifold of the state space ofN; (ii) circuit theoretic sufficient conditions for the condition thatN has 0 independent conservation laws and hence that through each point of the state space ofN, there passes a codimension 0 invariant submanifold * of the network dynamics; (iii) circuit theoretic sufficient conditions to guarantee that the manifolds * and 0 intersect transversely.This work was supported by the Natural Sciences and Engineering Research Council of Canada, under Grant Number A7113, and by scholarships from the Natural Sciences and Engineering Research Council of Canada and the Ontario Provincial Government.  相似文献   

8.
An approximation result is given concerning Gaussian radial basis functions in a general inner product space. Applications are described concerning the classification of the elements of disjoint sets of signals, and also the approximation of continuous real functions defined on all of n using radial basis function (RBF) networks. More specifically, it is shown that an important large class of classification problems involving signals can be solved using a structure consisting of only a generalized RBF network followed by a quantizer. It is also shown that Gaussian radial basis functions defined on n can uniformly approximate arbitrarily well over all of n any continuous real functionalf on n that meets the condition that |f(x)|0 as x.  相似文献   

9.
A generalized -bit least-significant-digit (LSD) first, serial/parallel multiplier architecture is presented with 1n wheren is the operand size. The multiplier processes both the serial input operand and the double precision product -bits per clock cycle in an LSD first, synchronous fashion. The complete two's complement double precision product requires 2n/ clock cycles. This generalized architecture creates a continuum of multipliers between traditional bit-serial/parallel multipliers (=1) and fully-parallel multipliers (=n). -bit serial/parallel multipliers allow anoptimized integrated circuit arithmetic to be designed based on a particular application's area, power, throughput, latency, and numerical precision constraints.This project was pratically funded by the UCSD-NSF I/UCR Center on Ultra-High Speed Intergrated Circuits and Systems.  相似文献   

10.
Let {S(A):A A}, whereA is a subset of an infinite-dimensional normed linear spaceL, be a class of general nonlinear input-output systems that are governed by operator equations relating the input, state, and output, all of which are in extended spaces. IfQ is a given operator from a specified set ¯D i, of inputs into the space of outputs ¯H 0, the problem we consider is to find, for a given >0, a parameterA A such that the transmission operatorR(A ) ofS(A ) furnishes a nearly best (or -best) approximation toQ from allR(A),A A. Here the distance betweenQ andR(A) is defined as the supremum of distances betweenQz andR(A)z taken over allz ¯D i. In Theorems 2 through 5 we show that ifS(A) is normal (Definition 2),A satisfies some mild requirement andL contains a fundamental sequence, then establishingA A reduces to minimizing a certain continuous functional on a compact subset ofR n, and thus can be carried out by conventional methods. The applications of results are illustrated by the example of a model-matching problem for a nonlinear system, and of optimal tracking.  相似文献   

11.
It is often said that there is a fundamental difference between current-mode and voltage-mode circuits. This conjecture is discussed in technical and philosophical terms, and it is shown that there is no such performance difference to be found, and that it is not possible to make a clear divide between voltage mode and current mode.And yet performance differences appear in the literature. It is shown that they come from the different design practices of the current-mode and the voltage-mode research groups. The conclusion of this paper is that the practical knowledge of the current-mode research groups should be re-integrated into main-stream IC design, and that all propaganda of the type current-mode is better than voltage-mode should be stopped immediately.  相似文献   

12.
Differential cryptanalysis is a method of attacking iterated mappings based on differences known as characteristics. The probability of a given characteristic is derived from the XOR tables associated with the iterated mapping. If is a mapping : Z 2 m , then for each , X, Y Z 2 m the XOR table for gives the number of input pairs of difference X=X+X for which gp(X)+(X)=Y.The complexity of a differential attack depends upon two properties of the XOR tables: the density of zero entries in the table, and the size of the largest entry in the table. In this paper we present the first results on the expected values of these properties for a general class of mappings . We prove that if : Z 2 m Z 2 m is a bijective mapping, then the expected size of the largest entry in the XOR table for is bounded by 2m, while the fraction of the XOR table that is zero approaches e –1/2=0.60653. We are then able to demonstrate that there are easily constructed classes of iterated mappings for which the probability of a differential-like attack succeeding is very small.The author is presently employed by the Distributed System Technology Center, Brisbane, Australia.  相似文献   

13.
A simple state-space approach for the four-block singular nonlinearH control problem is proposed in this paper. This approach combines a (J, J)-lossless and a class of conjugate (J, J)-expansive systems to yield a family of nonlinearH output feedback controllers. The singular nonlinearH control problem is thus transformed into a simple lossless network problem that is easy to deal with in a network-theory context.This work was supported by the National Science Council, Republic of China, under contract NSC 87-2218-E009-026.  相似文献   

14.
A bibliography on research work related to nullors and their applications in circuit analysis, synthesis and design, covering the period 1961–2000, is given.  相似文献   

15.
This paper presents novel low-voltage all-MOS analog circuit techniques for the synthesis of oversampling A/D converters. The new approach exploits the possibilities of Log-domain processing by using the MOSFET in subthreshold operation. Based on this strategy, a complete set of very low-voltage (down to 1 V) low-power (below 100 W) all-MOS basic building blocks is proposed. The resulting analog circuit techniques allow the integration of A/D converters for low-frequency (below 100 KHz) applications in digital CMOS technologies. Examples are given for a standard 0.35 m VLSI process.  相似文献   

16.
LetX 1,X 2,... be a stationary sequence of random variables with Pr{X t, x}=F(x),t=1, 2,... Also let i n,(t) ,i=1,...,n, denote the ith order statistic (OS) in the moving sample (X t–N ,...,X t,...,X t+N) of odd sizen=2N+1. ThenY t=a i X i n(t) with a i=1 is an order-statistics filter. In practicea i0,i=1,...,n. Fort>N, the sequence {Y t} is also stationary. IfX 1 X 2, ... are independent, the autocorrelation function (r)=corr(Y t,Y t+r) is zero forr >n – 1 and forr n – 1 can be evaluated directly in terms of the means, variances, and covariances of the OS in random samples of sizen +r fromF(x).In special cases several authors have observed that the spectral density functionf() of {Y t} is initially decreasing for > 0. This result is made more precise and shown to hold generally under white noise. The effect of outliers (impulses) is also discussed.This research was supported by the U.S. Army Research Office.  相似文献   

17.
Several systolic Kalman filters have appeared in the literature, with often complex hardware constructs to accomodate the algorithmic anomalies. Here, we follow a different route by working the original information filter into a so-called Jacobi-type algorithm, which is much more regular and directly fits onto a common and general Jacobi-type systolic array. The efficiency of the resulting systolic implementation is still comparable to what is achieved with the best of the other solutions. The advantage here is that one ends up with one type of array, which is suitable for a whole set of problems/algorithms, whereas otherwise the array is exclusively tuned to Kalman filtering. The aim of this report is thus to demonstrate the usefulness of these Jacobi-type arrays, rather than to come up with yet another systolic Kalman filter.  相似文献   

18.
The Supply Chain     
One of the most visible examples of ubiquitous computing poised for implementation can be found in the retail industry. Radio frequency identification (RFID) tags are being billed as the replacement for barcoding, the all-pervasive technology which has underpinned supply chains for the past 35 years. The standards allow for up to thirty trillion, trillion, trillion unique addresses, and the ultimate goal is to create an Internet of things in which everyday physical items are networked together. Concerted research effort over the past five years has developed the technology and reduced cost to a point where deployment is now possible. However, the recent heated debate centred on spy chips has highlighted the fact that one person's ubiquitous computing is another person's Big Brother state.  相似文献   

19.
BT Middleware has been in production use since 1987. Every working day a user population of 60 000 people execute 25 million transactions on systems that generate in excess of 70% of BTs revenues. BT Middleware is installed on 32 production mainframe instances.BT Middleware provides both a development and run-time environment for applications that is controlled and manageable. Application standards can be enforced providing reuse of common code as well as common look and feel user interfaces. The use of BT Middleware has allowed the rapid implementation of leading edge solutions to pressing business requirements and Middleware is evolving to allow BTs operational support systems (OSS) to participate seamlessly in complex distributed architectures.The future for BTs OSS lies in their ability to integrate with new applications developed on open systems platforms. BT Middleware has been evolving to provide the required interconnection capabilities and now supports numerous batch and on-line interfaces via strategic infrastructure products. This paper describes the major Middleware infrastructure components developed and supported by BTs London Software Engineering Centre that allow the companys huge investment in OSS to be exploited in todays environment.  相似文献   

20.
Test setup limitations, such as noise and parasitics, increasingly impede repeatable and accurate linearity measurements in high-volume production testing of high-precision data converters. Model-based testing has been shown to reduce the adverse effects of noise [14].In this work, we present two enhancements of the linear model-based approach: one is a change of the modeling strategy in order to account for measurement errors induced, for example, by parasitics associated with the device contactor, and another is a Design-for-Test feature that significantly improves the models ability to reduce the effect of measurement noise on the accuracy of the test outcome.The authors acknowledge the support by Analog Devices B.V., Limerick, Ireland and Enterprise Ireland under the Strategic Research Grant ST/00/26.Carsten Wegener has been awarded the academic degree of a Diplom-Ingenieur in Electronic Circuits and Systems by the Technical University of Dresden, Germany, in 1997. During a period of two years, 1996 through 1998, he attended the lecture series for the Vordiplom in Mathematics at Humboldt-University at Berlin, Germany.In Spring 1998, he moved permanently to Ireland, where he started to work with the Test Department of Analog Devices B.V. in Limerick. In Autumn of the same year he took up his PhD-studies with Dr M.P. Kennedy in the area of model-based testing of mixed-signal integrated circuits. He has been awarded the PhD degree by the National University of Ireland in December 2003.He has contributed to numerous conferences, publishing works in areas of nonlinear oscillator dynamics and mixed-signal testing. In Ireland, he has taught MATLAB courses to design and test engineers at Analog Devices B.V., and graduate courses on Digital Design-for-Test and Mixed-signal Test and Testability at the Department of Microelectronic Engineering, University College Cork.Michael Peter Kennedy received the B.E. degree in electronics from the National University of Ireland in 1984, and the M.S. and Ph.D. degrees from the University of California at Berkeley (UC Berkeley) in 1987 and 1991, respectively, for his contributions to the study of neural networks and nonlinear dynamics.He worked as a Design Engineer with Philips Electronics, a Postdoctoral Research Engineer with the Electronics Research Laboratory, UC Berkeley, and as a Professeur Invité with the EPFL, Switzerland. He returned to University College Dublin in 1992 as a College Lecturer in the Department of Electronic and Electrical Engineering. He was appointed Professor of Microelectronic Engineering at University College Cork in 2000.He has published 200 articles in the area of nonlinear circuits and systems and has taught courses on nonlinear dynamics and chaos. His research interests are nonlinear circuits and systems for applications in communications and signal processing. Since 1995 he has been active in research into algorithms for mixed-signal testing. Since 1994, he has led international basic and applied research projects on chaotic communications valued at over USD 2M.Dr. Kennedy was elected a Fellow of the IEEE in 1998. He received the Third Millenium Medal from the IEEE in 2000, the IEEE Circuits and Systems Society Golden Jubilee Medal, and the inaugural Parsons Award for excellence in Engineering Sciences from the Royal Irish Academy in 2001.  相似文献   

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