Ultrawideband characteristics of fractal dipole antennas integrated on Si for ULSI wireless interconnects

Ultrawideband characteristics of Sierpinski carpet fractal antennas fabricated on silicon substrates with the resistivities of 2290, 79.6, and 10 /spl Omega//spl middot/cm were investigated. The return losses lower than -10 dB and high transmission gains of approximately -14 dB were obtained for the antennas with 10-mm distance on the Si substrate with the resistivity of 2290 /spl Omega//spl middot/cm in the frequency range from 18 to 26.5 GHz. Gaussian monocycle pulses with 70 ps pulsewidth were transmitted in the Si substrates successfully and the corresponding voltage gains were -23, -26, and -39 dB for the Si resistivities of 2290, 79.6, and 10 /spl Omega//spl middot/cm, respectively.     

A dc and microwave comparison of GaAs MESFET's on GaAs and Si substrates

In order to assess GaAs on Si technology, we have made a performance comparison of GaAs MESFET's grown and fabricated on Si and GaAs substrates under identical conditions and report the first microwave results. The GaAs MESFET's on Si with 1.2-µm gate length (290-µm width) exhibited transconductances (gm) of 180 mS/mm with good saturation and pinchoff whereas their counterparts on GaAs substrates exhibited gmof 170 mS/mm. A current gain cut-off frequency of 13.5 GHz was obtained, which compares with 12.9 GHz observed in similar-geometry GaAs MESFET's on GaAs substrates. The other circuit parameters determined from S-parameter measurements up to 18 GHz showed that whether the substrate is Si or GaAs does not seem to make a difference. Additionally, the microwave performance of these devices was about the same as that obtained in devices with identical geometry fabricated at Tektronix on GaAs substrates. The side-gating effect has also been measured in both types of devices with less than 10-percent decrease in drain current when 5 V is applied to a pad situated 5 µm away from the source. The magnitude of the sidegating effect was identical to within experimental determination for all side-gate biases in the studied range of 0 to -5 V. The light sensitivity of this effect was also very small with a change in drain current of less that 1 percent between dark and light conditions for a side gate bias of -5 V and a spacing of 5 µm. Carrier saturation velocity depth profiles showed that for both MESFET's on GaAs and Si substrates, the velocity was constant at 1.5 × 10⁷cm/s to within 100-150 Å of the active layer-buffer layer interface.     

Investigations on electrical characteristics and reliability properties of MOS capacitors using HfAlOx on n-GaAs substrates

Radio frequency sputtering system is employed to fabricate metal oxide semiconductor (MOS) capacitors using an ultra-thin layer of HfAlO_x dielectric deposited on n-GaAs substrates with and without a Si interface control layer incorporated in between the dielectric and the semiconductor. Measurements are performed to obtain capacitance voltage (C–V) and current voltage (I–V) characteristics for GaAs/Si/HfAlO_x and GaAs/HfAlO_x capacitors under different constant voltage and constant current stress conditions. The variation of different electrical parameters such as change in interface trap density, hysteresis voltage with various values of constant voltage stress and the dependence of flat band voltage, fractional change in gate leakage current density, etc. with stress time are extracted from the C–V and I–V data for capacitors with and without a Si interlayer. Further the trap charge density and the movement of trap centroid are investigated for various injected influences. The dielectric breakdown and reliability properties of the dielectric films are studied using constant voltage stressing. A high time-dependent dielectric breakdown (TDDB, t_bd ? 1350 s) is observed for HfAlO_x gate dielectric with a silicon inter-layer under the high constant voltage stress at 8 V. Compared to capacitors without a Si interlayer, MOS capacitors with a Si interlayer exhibit improved electrical and breakdown characteristics, and excellent interface and reliability properties.     

Threshold voltage uniformity and characterization of microwaveperformance for GaAs/AlGaAs high electron-mobility transistors grown onSi substrates

We report on DC and microwave characteristics for high electron-mobility transistors (HEMT's) grown on Si substrates by metal-organic chemical vapor deposition (MOCVD). Threshold voltage (V _th) distribution in a 3-in wafer shows standard deviation of V_th (σV_th) of 36 mV with V_th of -2.41 V for depletion mode HEMT's/Si and σV_th of 31 mV with V_th of 0.01 V for enhancement mode, respectively. The evaluation of V_th in a 1.95×1.9 mm² area shows high uniformity for as-grown HEMT's/Si with σV_th of 9 mV for V_th of -0.10 V, which is comparable to that for HEMT's/GaAs. Comparing the V_th distribution pattern in the area with that for annealed HEMT's/Si, it is indicated that the high uniformity of V_th is obtained irrelevant of a number of the dislocations existing in the GaAs/Si. From microwave characteristic evaluation for HEMT's with a middle-(10~50 Ω·cm) and a high-(2000~6000 Ω·cm) resistivity Si substrate using a new equivalent circuit model, it is demonstrated that HEMT's/Si have the disadvantage for parasitic capacitances and resistances originated not from the substrate resistivity but from a conductive layer at the Si-GaAs interface. The parasitic parameters, especially the capacitances, can be overcome by the reduction of electrode areas for bonding pads and by the insertion of a dielectric layer under the electrode, which bring high cut-off frequency (f_T) and maximum frequency of operation (f_max) of 24 GHz for a gate length of 0.8 (μm). These results indicate that HEMT's/Si are sufficiently applicable for IC's and discrete devices and have a potential to be substituted for HEMT's/GaAs     

A Manufacturing Process for Analog and Digital Gallium Arsenide Integrated Circuits

A process for manufacturing small-to-medium scale GaAs integrated circuits is described. Integrated FET's, diodes, resistors, thin-film capacitors, and inductors are used for monolithic integration of digital and analog circuits. Direct implantation of Si into >10/sup 5/ omega/spl dot/cm resistivity substrates produces n-layers with +-10-percent sheet resistance variation. A planar fabrication process featuring retained anneal cap (SiO/sub 2/), proton isolation, recessed Mo-Au gates, silicon nitride passivation, and a dual-level metal system with polyimide intermetal dielectric is described. Automated on-wafer testing at frequencies up to 4 GHz is introduced, and a calculator-controlled frequency domain test system described. Circuit yields for six different circuit designs are reported, and process defect densities are inferred.     

GaAs solar cells grown on Si substrates for space use

GaAs single‐junction and InGaP/GaAs multi‐junction thin‐film solar cells fabricated on Si substrates have great potential for high‐efficiency, low‐cost, lightweight and large‐area space solar cells. Heteroepitaxy of GaAs thin films on Si substrates has been examined and high‐efficiency GaAs thin‐film solar cells with total‐area efficiencies of 18·3% at AM0 and 20·0% at AM 1·5 on Si substrates (GaAs‐on‐Si solar cells) have been fabricated. In addition, 1‐MeV electron irradiation damage to GaAs‐on‐Si cells has been studied. The GaAs‐on‐Si cells are found to show higher end‐of‐life efficiency than the conventional GaAs cells fabricated on GaAs substrates (GaAs‐ on‐GaAs cells) under high‐fluence 1‐MeV electron irradiation of more than 1 × 10¹⁵ cm⁻². The first space flight to make use of them has been carried out. Forty‐eight 2 × 2 cm GaAs‐on‐Si cells with an average AM0 total‐area efficiency of 16·9% have been evaluated in the Engineering Test Satellite No.6 (ETS‐VI). The GaAs‐on‐Si cells have been demonstrated to be more radiation‐resistant in space than GaAs‐on‐GaAs cells and 50, 100 and 200‐μm‐thick Si cells. These results show that the GaAs‐on‐Si single‐junction and InGaP/GaAs‐on‐Si multi‐junction cells have great potential for space applications. Copyright © 2001 John Wiley & Sons, Ltd.     

Fabrication of GaAs/Si Heterostructures and Their Photoelectric Properties

Fabrication of GaAs/Si heterostructures and their photoelectric properties are investigated by Raman, photoluminescence and Hall-effect measurements. The crystallinity of GaAs epilayers grown on Si substrate is significantly affected by the substrate orientation and the growth method. The photoelectric properties of GaAs epilayers grown on Si （211） substrates deposited by using a two-step growth method are improved. These results indicate that GaAs epilayersgrownonSi （100） andSi （211） substrates by using two step growth method are promising for potential applications in high-speed and high-frequency photoelectric devices.     

A manufacturing process for analog and digital gallium arsenide integrated circuits

A process for manufacturing small-to-medium scale GaAs integrated circuits is described. Integrated FET's, diodes, resistors, thin-film capacitors, and inductors are used for monolithic integration of digital and analog circuits. Direct implantation of Si into > 10⁵Ω.cm resistivity substrates produces n-layers with ± 10-percent sheet resistance variation. A planar fabrication process featuring retained anneal cap (SiO2), proton isolation, recessed Mo-Au gates, silicon nitride passivation, and a dual-level metal system with polyimide intermetal dielectric is described. Automated on-wafer testing at frequencies up to 4 GHz is introduced, and a calculator-controlled frequency domain test system described. Circuit yields for six different circuit designs are reported, and process defect densities are inferred.     

Growth and characterization of GaAs films deposited on Ge/Si composite substrates by metalorganic chemical vapor deposition

We report the results of studies which have been made on heteroepitaxial layers of GaAs and AlGaAs grown by metalorganic chemical vapor deposition on composite substrates that consist of four different types of heteroepitaxial layered structures of Ge and Ge-Si grown by molecular beam epitaxy on (100)-oriented Si substrates. It is found that of the four structures studied, the preferred composite substrate is a single layer of Ge ∼1 μm thick grown directly on a Si buffer layer. The double-crystal X-ray rocking curves of 2 μm thick GaAs films grown on such substrates have FWHM values as small as 168 arc sec. Transmission electron micrographs of these Ge/Si composite substrates has shown that the number of dislocations in the Ge heteroepitaxial layer can be greatly reduced by an anneal at about 750° C for 30 min which is simultaneously carried out during the growth of the GaAs layer. The quality of the GaAs layers grown on these composite substrates can be greatly improved by the use of a five-period GaAs-GaAsP strained-layer superlattice (SLS). Using the results of these studies, low-threshold optically pumped AlGaAs-GaAs DH laser structures have been grown by MOCVD on MBE Ge/Si composite substrates.     

不同厚度PZT薄膜的制备及电性能特性研究

采用sol-gel（溶胶-凝胶）法在Pt/Ti/SiO2/Si基底上分别制备了厚度为400nm,600nm,800nm的PZT（锆钛酸铅,Zr/Ti=52/48）薄膜,研究了厚度对薄膜介电性能与铁电性能的影响。通过对薄膜的铁电性能与介电性能进行测试,分析了不同厚度薄膜的剩余极化强度、介电常数与介电损耗;通过对介电调谐率与最大正切损耗的计算,进一步分析了薄膜的介电调谐性能。实验结果表明,薄膜的介电常数与介电损耗随薄膜厚度的增大而增加;厚度为600nm的薄膜具有最好的介电调谐性能与铁电性能。     

GaAs MESFET's fabricated on monolithic GaAs/Si substrates

GaAs MESFET's have been fabricated for the first time on monolithic GaAs/Si substrates. The substrates were prepared by growing single-crystal GaAs layers on Si wafers that had been coated with a Ge layer deposited by e-beam evaporation. The MESFET's exhibit good transistor characteristics, with maximum transconductance of 105 mS/mm for a gate length of 2.1 µm.     

Ion-implantation and activation behavior of Si in MBE-Grown GaAs on Si substrates for GaAs MESFET's

The suitability of MBE-grown GaAs layers on Si substrates has been studied for ion-implanted GaAs MESFET technology. The undoped as-grown GaAs layers had a carrier concentration below 10¹⁴cm^-3. Uniform Si ion implants into 4-µm-thick GaAs layers on Si were annealed at 900°C for 10 s, using a rapid-thermal-annealing (RTA) system. Both the activation and the doping profile were similar to those obtained in bulk semi-insulating GaAs under similar conditions. The SIMS profiles of Si and As atoms near the GaAs/Si heterointerface were identical before and after the RTA process, indicating negigible interdiffusion during the implant activation. Dual implants of a shallow n+ layer and an n-channel layer were used to fabricate GaAs MESFET's with a recess-gate technology. Selective oxygen ion implantation was used for device isolation. The maximum transconductance obtained was 135 mS/ mm compared to typical values of 150-180 mS/mm obtained in our laboratory on GaAs substrates in similar device structures.     

Properties of MODFET's grown on Si substrates at DC and microwave frequencies

We report the first microwave characterization of 1-µm gate GaAs/AlGaAs modulation-doped field-effect transistors (MODFET's) grown on Si substrates by MBE. Maximum transconductances of 170 mS/mm at room temperature were obtained in structures on Si, which compares to values of 200-250 mS/mm for this type of structure on GaAs. At 77 K, no collapse was observed in these structures, and transconductances of 270 mS/mm were obtained. From microwave S-parameter measurements at room temperature, current gain cutoff frequencies of 15 GHz were obtained from these GaAs/AlGaAs MOD FET's on Si, which compares with 12-15 GHz obtained on GaAs substrates. From high-frequency equivalent circuit modeling, very little difference was observed in any of the parameters between growth on Si and on GaAs. This is significant in that it demonstrates the suitability of GaAs on Si for device applications.     

钽酸锂薄膜溶胶凝胶制备工艺研究

用溶胶–凝胶法在不同衬底上制备了新的钽酸锂薄膜;研究了环氧树脂掺杂、甩胶转速、衬底效应、热处理温度和气氛等薄膜制备工艺条件对薄膜晶向、表面形貌和介电特性的影响。结果表明:当溶胶浓度为0.1mol/L,转速为3000r/min,能制备出均匀、平整、无裂纹的薄膜;控制掺杂环氧树脂在5%左右(质量分数),能提高薄膜与衬底的黏附性;薄膜在氧气气氛下结晶退火,比在氮气气氛下具有更小的介质损耗;n型Si、p型Si和SiO2衬底上钽酸锂薄膜在[012]晶向上具有择优取向性,而Pt衬底上薄膜在[110]、[116]晶向上具有择优取向性。     

High quality GaAs qrowth by MBE on Si using GeSi buffers and prospects for space photovoltaics

III–V solar cells on Si substrates are of interest for space photovoltaics since this would combine high performance space cells with a strong, lightweight and inexpensive substrate. However, the primary obstacles blocking III–V/Si cells from achieving high performance to date have been fundamental material incompatibilities, namely the 4% lattice mismatch between GaAs and Si, and the large mismatch in thermal expansion coefficient. In this paper, we report on the molecular beam epitaxial (MBE) growth and properties of GaAs layers and single junction GaAs cells on Si wafers which utilize compositionally graded GeSi intermediate buffers grown by ultra‐high vacuum chemical vapor deposition (UHVCVD) to mitigate the large lattice mismatch between GaAs and Si. GaAs cell structures were found to incorporate a threading dislocation density of 0.9–1.5×10 cm⁻², identical to the underlying relaxed Ge cap of the graded buffer, via a combination of transmission electron microscopy, electron beam induced current, and etch pit density measurements. AlGaAs/GaAs double heterostructures were grown on the GeSi/Si substrates for time‐resolved photoluminescence measurements, which revealed a bulk GaAs minority carrier lifetime in excess of 10 ns, the highest lifetime ever reported for GaAs on Si. A series of growths were performed to assess the impact of a GaAs buffer layer that is typically grown on the Ge surface prior to growth of active device layers. We found that both the high lifetimes and low interface recombination velocities are maintained even after reducing the GaAs buffer to a thickness of only 0.1 μm. Secondary ion mass spectroscopy studies revealed that there is negligible cross diffusion of Ga, As and Ge at the III–V/Ge interface, identical to our earlier findings for GaAs grown on Ge wafers using MBE. This indicates that there is no need for a buffer to ‘bury’ regions of high autodoping, and that either pn or np configuration cells are easily accommodated by these substrates. Preliminary diodes and single junction AlGaAs heteroface cells were grown and fabricated on the Ge/GeSi/Si substrates for the first time. Diodes fabricated on GaAs, Ge and Ge/GeSi/Si substrates show nearly identical I–V characteristics in both forward and reverse bias regions. External quantum efficiencies of AlGaAs/GaAs cell structures grown on Ge/GeSi/Si and Ge substrates demonstrated nearly identical photoresponse, which indicates that high lifetimes, diffusion lengths and efficient minority carrier collection is maintained after complete cell processing. Copyright © 2000 John Wiley & Sons, Ltd.     

Direct growth of CdZnTe/Si substrates for large-area HgCdTe infrared focal plane arrays

Direct epitaxial growth of high-quality 100lCdZnTe on 3 inch diameter vicinal {100}Si substrates has been achieved using molecular beam epitaxy (MBE); a ZnTe initial layer was used to maintain the {100} Si substrate orientation. The properties of these substrates and associated HgCdTe layers grown by liquid phase epitaxy (LPE) and subsequently processed long wavelength infrared (LWIR) detectors were compared directly with our related efforts using CdZnTe/ GaAs/Si substrates grown by metalorganic chemical vapor deposition (MOCVD). The MBE-grown CdZnTe layers are highly specular and have both excellent thickness and compositional uniformity. The x-ray full-width at half-maximum (FWHM) of the MBE-grown CdZnTe/Si increases with composition, which is a characteristic of CdZnTe grown by vapor phase epitaxy, and is essentially equivalent to our results obtained on CdZnTe/GaAs/Si. As we have previously observed, the x-ray FWHM of LPE-grown HgCdTe decreases, particularly for CdZnTe compositions near the lattice matching condition to HgCdTe; so far the best value we have achieved is 54 arc-s. Using these MBE-grown substrates, we have fabricated the first high-performance LWIR HgCdTe detectors and 256 x 256 arrays using substrates consisting of CdZnTe grown directly on Si without the use of an intermediate GaAs buffer layer. We find first that there is no significant difference between arrays fabricated on either CdZnTe/Si or CdZnTe/GaAs/Si and second that the results on these Si-based substrates are comparable with results on bulk CdZnTe substrates at 78K. Further improvements in detector performance on Si-based substrates require a decrease in the dislocation density.     

Application of low temperature GaAs to GaAs/Si

Low Temperature grown GaAs (LT-GaAs) was incorporated as a buffer layer for GaAs on Si (GaAs/Si) and striking advantages of this structure were confirmed. The LT-GaAs layer showed high resistivity of 1.7 × 10⁷ ω-cm even on a highly defective GaAs/Si. GaAs/Si with the LT-GaAs buffer layers had smoother surfaces and showed much higher photoluminescence intensities than those without LT-GaAs. Schottky diodes fabricated on GaAs/Si with LT-GaAs showed a drastically reduced leakage current and an improved ideality factor. These results indicate that the LT-GaAs buffer layer is promising for future integrated circuits which utilize GaAs/Si substrates.     

Monolithic integration of Si MOSFET's and GaAs MESFET's

Integration of Si MOSFET's and GaAs MESFET's on a monolithic GaAs/Si (MGS) substrate has been demonstrated. The GaAs MESFET's have transconductance of 150 mS/mm for a gate length of 1 µm, and the Si MOSFET's have transconductance of 19 mS/mm for a gate length of 5 µm and an oxide thickness of 800 Å. These characteristics are comparable to those for devices fabricated on separate GaAs and Si substrates.     

Metal-organic vapor-phase epitaxy growth and characterization of thick (100) CdTe layers on (100) GaAs and (100) GaAs/Si substrates

The growth characteristics and crystalline quality of thick (100) CdTe-epitaxial layers grown on (100) GaAs and (100) GaAs/Si substrates in a metal-organic vapor-phase epitaxy (MOVPE) system for possible applications in x-ray imaging detectors were investigated. High-crystalline-quality epitaxial layers of thickness greater than 100 μm could be readily obtained on both types of substrates. The full width at half maximum (FWHM) values of the x-ray double-crystal rocking curve (DCRC) decreased rapidly with increasing layer thickness, and remained around 50–70 arcsec for layers thicker than 30 μm on both types of substrates. Photoluminescence (PL) measurement showed high-intensity excitonic emission with very small defect-related peaks from both types of epilayers. Stress analysis carried out by performing PL as a function of layer thickness showed the layers were strained and a small amount of residual stress, compressive in CdTe/GaAs and tensile in CdTe/GaAs/Si, remained even in the thick layers. Furthermore, the resistivity of the layers on the GaAs substrate was found to be lower than that of layers on GaAs/Si possibly because of the difference of the activation of incorporated impurity from the substrates because of the different kinds of stress existing on them. A heterojunction diode was then fabricated by growing a CdTe epilayer on an n⁺-GaAs substrate, which exhibited a good rectification property with a low value of reverse-bias leakage current even at high applied biases.     

Si衬底上MBE GaAs MESFET与IC制备

叙述在MBE(分子束外延)GaAs/Si材料上制作GaAs MESFET与Ic的研究。考虑到GaAsIC与Si IC单片集成的需要,采用了Ti/TiW/Au肖特基金属化和Ni/AuGe/Ni/Au欧姆接触金属化,层间介质采用等离子增强淀积氮化硅和聚酰亚胺复合材料。在该工艺基础上,制备了性能良好的GaAs/Si MESFET与IC。