Charge control, DC, and RF performance of a 0.35-μmpseudomorphic AlGaAs/InGaAs modulation-doped field-effecttransistor

The authors describe a study of charge control in conjunction with DC and RF performance of 0.35-μm-gate-length pseudomorphic AlGaAs/InGaAs MODFETs. Using C-V measurements, they estimate that a two-dimensional electron gas (2DEG) with density as high as 1.0×10¹² cm^-2 can be accumulated in the InGaAs channel at 77 K before the gate begins to modulate parasitic charges in the AlGaAs. This improvement in charge control of about 10-30% over a typical AlGaAs/GaAs MODFET may partially be responsible for the superior DC and RF performance of the AlGaAs/InGaAs MODFET. At room temperature, the devices give a maximum DC voltage gain g _m/g_d of 32 and a current gain cutoff frequency f_T of 46 GHz. These results are state of the art for MODFETs of similar gate length     

Low-temperature DC characteristics of pseudomorphic Ga0.18In0.82P/InP/Ga0.47In0.53As HEMT

A high-gap strained GaInP material chosen to increase Schottky barrier height on InP is discussed. This material has been used for the first time in high electron mobility transistor (HEMT) fabrication on InP. For these devices the best g_m of a 1.3-μm gate HEMT is 300 mS/mm. Transistors of 3-μm gate length are studied at low temperature (100 to 293 K). Their DC electrical characteristics improve upon cooling. The best improvement is measured at the lowest temperature (+54% for g_m at 105 K). The structure is stable and does not present any g_m or I_ds collapse at low temperature, unlike AlGaAs/GaAs heterostructures     

Stripline resonator measurements of Zs versus Hrf in YBa2Cu3O7-x thin films

A report is presented on measurements of the surface impedance, Z_S, of YBa₂Cu₃O_7-x thin films using a stripline resonator. The films were deposited on LaAlO₃ substrates by off-axis magnetron sputtering. The authors obtained Z_S as a function of frequency from 1.5 to 20 GHz, as a function of temperature from 4 K to the transition temperature (~90 K), and as a function of the RF magnetic field from zero to 300 Oe. At low temperatures the surface resistance, R _S, of the films shows a very weak dependence on the magnetic field up to 225 to 250 Oe. At 77 K, R_S is proportional to the square of the field. The penetration depth shows a much weaker dependence on the field than does R_S. The origins of the magnetic field dependence of Z_S are also discussed     

Off-state gate current in n-channel MOSFETs with nitrided oxidegate dielectrics

The authors report on the off-state gate current (I_g ) characteristics of n-channel MOSFETs using thin nitrided oxide (NO) gate dielectrics prepared by rapid thermal nitridation at 1150°C for 10-300 s. New phenomena observed in NO devices are a significant I_g at drain voltages as low as 4 V and an I_g injection efficiency reaching 0.8, as compared to 8.5 V and 10^-7 in SiO₂ devices with gate dielectrics of the same thickness. Based on the drain bias and temperature dependence, it is proposed that I_g in MOSFETs with heavily nitrided oxide gate dielectrics arises from hot-hole injection, and the enhancement of gate current injection is due to the lowering of valence-band barrier height for hole emission at the NO/Si interface. The enhanced gate current injection may cause accelerated device degradation in MOSFETs. However, it also presents potential for device applications such as EPROM erasure     

Characteristics of 0.8- and 0.2-μm gate length InxGa1-xAs/In0.52Al0.48As/InP(0.53⩽x⩽0.70) modulation-doped field-effect transistorsat cryogenic temperatures

The performance characteristics of InP-based pseudomorphic MODFETs with varying the In composition (0.53⩽x⩽0.70), which changes the strain in the channel, were studied. The temperature was varied in the range of 40-300 K, and the devices had gate lengths L _g of 0.8 and 0.2 μm. The analysis predicts an increase in the intrinsic cutoff frequency with increasing In composition and decreasing temperature and gate length. Also, the analysis predicts that the increase in cutoff frequency with decreasing temperature is less significant with increasing In composition and decreasing gate length. Preliminary experimental results show that as In composition increases from 0.53 to 0.70, f_T increases by 30-40%, and as the temperature decreases from 300 to 40 K, f_T improves by 15-30%, both for 0.8- and 0.2-μm devices     

Noise performance at cryogenic temperatures at AlGaAs/InGaAs HEMT'swith 0.15-μm T-shaped WSix gates

T-shaped 0.15-μm WSi_x gate HEMTs have been fabricated on AlGaAs/InGaAs MBE wafers. Their S-parameters, output noise spectral density P_no, and noise temperatures T _e at cryogenic temperatures, were measured. The current gain cutoff frequency f_T increases from 61 GHz at 295 K to 87 GHz at 90 K. P_no and T_e measurements indicate that the hot-electron effect is noticeable at low temperatures at high drain current. At 30 GHz, the noise temperature is 19±3 K with an associated gain of 10.4 dB at the physical temperature of 20 K. The results demonstrate the great potential of AlGaAs/InGaAs HEMTs for low-temperature applications     

Circuit performance of CMOS technologies with silicon dioxide andreoxidized nitrided oxide gate dielectrics

The circuit performance of CMOS technologies with silicon dioxide (SiO₂) and reoxidized nitrided oxide (RONO) gate dielectrics over the normal regime of digital circuit operation, i.e. V_GS⩽5 V and B_DS⩽5 V, is discussed. The simulation of a simple CMOS inverter has shown that the SiO₂ inverter consistently outperforms the RONO inverter over temperatures ranging from 300 to 100 K. This can be attributed mainly to the significantly lower μ_p (hole mobility) of RONO p-channel devices. At 300 K, μ_p(RONO) is 14-8% smaller than μ_p(SiO₂) over the entire range of gate biases, while μ_n(RONO) (electron mobility of n-channel RONO devices) is also smaller than μ_n(SiO₂) and reaches only 96% of μ_n(SiO₂) at V_GS=5 V. At 100 K, μ_n(RONO)/μ_n (SiO₂) at V_GS=5 V is increased to 1.10, however, μ_p(RONO)/μ_p(SiO₂) at V_GS=5 V is degraded to 0.59. The dependence of circuit performance on the supply voltage has also been evaluated for the RONO and SiO₂ inverters     

A temperature noise model for extrinsic FETs

A resistor temperature noise model for FETs has been successfully applied to extrinsic FETs to predict the frequency dependence of minimum noise figure F_min and associated gain G_Aopt. The model gives a fixed relationship between F_min and G_Aopt with one fitting parameter T_d. An extensive comparison to published results shows that the majority of FETs can be modeled with effective T_d values (the temperature of the output resistor) between 300 and 700 K for all of the frequencies (8 to 94 GHz), gate lengths (0.8 to 0.1 μm), and material types examined. The analysis shows that InP-based MODFETs exhibit significantly lower F_min and higher G_Aopt than conventional and pseudomorphic GaAs-based MODFETs of the same gate length. The results suggest a high F_max is a key factor for low noise figure     

Ultra-high-speed digital circuit performance in 0.2-μmgate-length AlInAs/GaInAs HEMT technology

The fabrication of fifteen-stage ring oscillators and static flip-flop frequency dividers with 0.2-μm gate-length AlInAs/GaInAs HEMT technology is described. The fabricated HEMT devices within the circuits demonstrated a g_m transconductance of 750 mS/mm and a full-channel current of 850 mA/mm. The measured cutoff frequency of the device is 120 GHz. The shortest gate delay measured for buffered-FET-logic (BFL) ring oscillators at 300 K was 9.3 ps at 66.7 mW/gate (fan-out=1); fan-out sensitivity was 1.5 ps per fanout. The shortest gate delay measured for capacitively enhanced logic (CEL) ring oscillators at 300 K was 6.0 ps at 23.8 mW/gate (fan-out=1) with a fan-out sensitivity of 2.7 ps per fan-out. The CEL gate delay reduced to less than 5.0 ps with 11.35-mW power dissipation when measured at 77 K. The highest operating frequency for the static dividers was 26.7 GHz at 73.1 mW and 300 K     

Improved transconductance under high normal field MOSFETs withultrathin nitrided oxides

The gate-voltage dependence of electron mobility at 298 and 82 K in MOSFETs with nanometer-range thin (reoxidized) nitrided oxides prepared by rapid thermal processing (RTP) at 900-1150°C for 15-300 s is discussed. Rapid nitridation improves the mobility and current derivability under high normal field over thermally grown oxides at both temperatures: the transconductance g_m at a gate drive of 3.5 V is improved by half an order of magnitude, whereas the peak g_m remains comparable to that of an oxide. Nitridation also avoids the negative g_m observed at 82 K for an oxide MOSFET. These improvements are substantially unchanged by additional reoxidations     

High-speed and large noise margin tolerance E/D logic gates withLDD structure DMTs fabricated using selective RIE technology

The authors describe a novel design concept for enhancement (E) and depletion (D) mode FET formation using i-AlGaAs/n-GaAs doped-channel hetero-MISFET (DMT) and a novel self-aligned gate process technology for submicrometer-gate DMT-LSIs based on E/D logic gates. 0.5-μm gate E-DMTs (D-DMTs) with a lightly doped drain (LDD) structure show an average V_t of 0.18 (-0.46) V, a V_t standard deviation of 22.6 (24.9) mV, and a maximum transconductance of 450 (300) mS/mm. The V_t shift is less than 50 mV with a decrease in gate length down to 0.5 μm. The gate forward turn-on voltage V_f is more than 0.9 V, i.e. about 1.6 times that for MESFETs. This superiority in V _f, preserved in the high-temperature range, leads to an improvement in noise margin tolerance by a factor of three. In addition, 31-stage ring oscillators operate with a power consumption of 20 (1.0) mW/gate and a propagation delay of 4.8 (14.5) ps/gate. Circuit simulation based on the experimental data predicts 140 ps/gate and 1 mW/gate for DMT direct-coupled FET logic circuits under standard loading conditions. DMTs and the technology developed here are very attractive for realizing low-power and/or high speed LSIs     

Modeling the gate I/V characteristic of a GaAsMESFET for Volterra-series analysis

The authors show that the Taylor-series coefficients of a FET's gate/drain I/V characteristic, which is used to model this nonlinearity for Volterra-series analysis, can be derived from low-frequency RF measurements of harmonic output levels. The method circumvents many of the problems encountered in using DC measurements to characterize this nonlinearity. This method was used to determine the incremental gate I/V characteristic of a packaged Aventek AT10650-5 MESFET biased at a drain voltage of 3 V and drain current of 20 mA. The FET's transconductance was measured at DC, and its small-signal equivalent circuit (including the package parasitics) was determined by adjusting its circuit element values until good agreement between calculated and measured S parameters was obtained. The FET was then installed in a low-frequency test fixture. Excellent results were obtained     

Monte Carlo study of GaAs/Alx Ga1-xAsMODFETs: effects of AlxGa1-xAs composition

Monte Carlo methods are used to compare electronic transport and device behavior in n⁺-Al_xGa_1-xAs/GaAs modulation-doped field-effect transistors (MODFETs) at 300 K for x =0.10, 0.15, 0.22, 0.30, 0.35, and 0.40. The differences between the x=0.22 and x=0.30 MODFETs with respect to parasitic conduction in Al_xGa_1-xAs, gate currents, and switching times, are of particular interest. The donor-related deep levels in Al_xGa_1-xAs, are disregarded by assuming all donors to be fully ionized, and the focus is only on the confinement and transport of the carriers. The following quantities are studied in detail: transfer characteristics (I_D versus V _G), transconductance (g_m), switching speeds (τ_ON), parasitic conduction in Al_xGa _1-xAs, gate current (I_G), average electron velocities and energies in GaAs and Al_xGa_1-x As, electron concentration in the device domain, k-space transfer (to low mobility L and X valleys), and details of the real-space transfer process     

A model for the temperature-dependent saturated ID-VD characteristics of an a-Si:H thin-filmtransistor

A simplified analytical expression for the temperature dependent saturated I_D-V_D characteristics of hydrogenated amorphous silicon (a-Si:H) thin-film transistors, between -50°C and 90°C, is presented and experimentally verified. The results show that the experimental transfer and output characteristics at several temperatures are easily modeled by a single equation. The model is based on three functions obtained from the experimental data of I_D versus V_G, over a range of temperature. Theoretical results confirm the simple form of the model in terms of the device geometry. As the temperature increased, the saturated drain current increased and, at a fixed gate voltage the device saturated at increasingly larger drain voltages while the threshold voltage decreased. Good agreement between the measured data and the model was obtained up to 363 K. Also observed at temperatures larger than 363 K was a decrease in I_D and more severe gate voltage hysteresis characteristics     

DC and microwave performance of a 0.1 μm gate InAs/In0.52Al0.8As MODFET

The authors have measured and analyzed the performance characteristics of 0.1-μm gate InAs/In_0.52Al_0.48 MODFETs grown by molecular beam epitaxy. The transistors are characterized by measured g_m(max)=840 mS/mm, f_T=128 GHz, and a very high current carrying capability, e.g. I_dss=934 mA/mm at V _gs=0.4 V and V_ds=2.7 V. The value of f _T is estimated from extrapolation of the current gain (H ₂₁) at a -6 dB/octave rolloff. This is the first report on the microwave characteristics of an InAs-channel MODFET and establishes the superiority of this heterostructure system     

Detection of the trapped electron distribution of PMOSFET's afterhot-carrier stress

A method of obtaining the spatial distribution of hot-carrier-induced trapped electrons in the gate oxide (N_0t(x)) of PMOSFETs is introduced with the aid of a two-dimensional simulator. The measured I_ds versus V_ds for various V_gs for low drain bias and I_ds versus V_gs have been compared with data obtained from the simulation concerning the obtained spatial distribution of trapped electrons in the gate oxide. There exists a high degree of agreement between the measured current-voltage characteristics after hot-carrier stress and the simulation results concerning the newly obtained spatial distribution of trapped electrons in the gate oxide     

DC and microwave characteristics of InAlAs/InGaAssingle-quantum-well MODFETs with GaAs gate barriers

The design and performance of In_0.53Ga_0.47As/In_0.52Al_0.48 As modulation-doped field-effect transistors (MODFETs) have been optimized by incorporating a single In_0.53Ga_0.47As quantum-well channel and a thin strained GaAs gate barrier layer. These help to lower the output conductance and gate leakage current of the device, respectively. The DC performance of 1-μm-gate devices is characterized by extrinsic transconductances of 320 mS/mm at 300 K and 450 mS/mm at 77 K and a best value of f_T=35 GHz is derived from S-parameter measurements     

Super-low-noise performance of direct-ion-implanted 0.25-μm-gateGaAs MESFET's

The authors report on advanced ion implantation GaAs MESFET technology using a 0.25-μm `T' gate for super-low-noise microwave and millimeter-wave IC applications. The 0.25×200-μm-gate GaAs MESFETs achieved 0.56-dB noise figure with 13.1-dB associated gain at 50% I_DSS and 0.6 dB noise figure with 16.5-dB associated gain at 100% I_DSS at a measured frequency of 10 GHz. The measured noise figure is comparable to the best noise performance of AlGaAs/GaAs HEMTs and AlGaAs/InGaAs/GaAs pseudomorphic HEMTs     

p-type Ge-channel MODFETs with high transconductance grown on Sisubstrates

Modulation-doped FET (MODFET) structures with hole channels consisting of pure Ge were grown by molecular beam epitaxy (MBE) on Si substrates. To overcome the relatively large lattice mismatch, between Si and Ge, a relaxed Si_1-xGe_x buffer layer with linearly graded Ge concentration and a final x value of around 70% was grown first. Hall mobilities of up to 1300 cm²/V-s at room temperature and 14000 cm²/V-s at 77 K were measured. Devices with and without gate recess were fabricated, which result in enhancement- and depletion-type FETs. Maximum extrinsic transconductances of 125 and 290 mS/mm at room temperature and 77 K, respectively, were found for gate lengths L_G around 1.2 μm     

A high-current pseudomorphic AlGaAs/InGaAs double quantum-wellMODFET

Double quantum-well modulation-doped field-effect transistors (MODFETs) with planar-doped lattice-strained AlGaAs/InGaAs structure have been fabricated and characterized at DC and microwave frequencies. At 300 K the 0.3-μm gate devices show a full channel current of 1100 mA/mm with a constant extrinsic transconductance of 350 mS/mm over a broad gate voltage range of 1.6 V. Excellent microwave performance is also achieved with a maximum available gain cutoff frequency f _mag of 110 GHz and a current gain cutoff frequency f _r of 52 GHz. A maximum output power of 0.7 W/mm with 30% efficiency is obtained at 18 GHz