Resistive switching characteristics of Sm2O3 thin films for nonvolatile memory applications

This study investigates a sputtered Sm₂O₃ thin film to apply into a resistive random access memory device. The proposed device exhibits a stable resistance ratio of about 2.5 orders after 10⁴ cycling bias pulses and no degradation for retention characteristics monitored after an endurance test at 85 °C. The conduction mechanisms for low and high resistance states are dominated by ohmic behavior and trap-controlled space-charge limited current, respectively. The resistance switching is ascribed to the formation/rupture of conductive filaments.     

Drain current enhancement and negligible current collapse in GaN MOSFETs with atomic-layer-deposited HfO2 as a gate dielectric

Accumulation-type GaN metal-oxide-semiconductor field-effect-transistors (MOSFET’s) with atomic-layer-deposited HfO₂ gate dielectrics have been fabricated; a 4 μm gate-length device with a gate dielectric of 14.8 nm in thickness (an equivalent SiO₂ thickness of 3.8 nm) gave a drain current of 230 mA/mm and a broad maximum transconductance of 31 mS/mm. Owing to a low interfacial density of states (D_it) at the HfO₂/GaN interface, more than two third of the drain currents come from accumulation, in contrast to those of Schottky-gate GaN devices. The device also showed negligible current collapse in a wide range of bias voltages, again due to the low D_it, which effectively passivate the surface states located in the gate-drain access region. Moreover, the device demonstrated a larger forward gate bias of +6 V with a much lower gate leakage current.     

Resistive switching characteristics of ultra-thin TiOx

We investigated the resistive switching characteristics of Ir/TiO_x/TiN structure with 50 nm active area. We successfully formed ultra-thin (4 nm) TiO_x active layer using oxidation process of TiN BE, which was confirmed by X-ray Photoelectron Spectroscopy (XPS) depth profiling. Compared to large area device (50 μm), which shows only ohmic behavior, 250 and 50 nm devices show very stable resistive switching characteristics. Due to the formation and rupture of oxygen vacancies induced conductive filament at Ir and TiO_x interface, bipolar resistive switching was occurred. We obtained excellent switching endurance up to 10⁶ times with 100 ns pulse and negligible degradation of each resistance state at 85 °C up to 10⁴ s.     

High-resolution transmission electron microscopy study on bipolar resistive switching behavior in TiO2 thin films

We fabricated TiO₂ thin films the by sol–gel process. Successful I–V curves can be obtained in the Cu/TiO₂/ATO structure device in which TiO₂ thin film was calcined at 300 °C. The bipolar resistive switching behavior was observed and the ratio of R_off/R_on can be increased to 10⁴. The switching voltage changes from 4.8 to 3.5 V when the current compliance drops from 10 to 0.1 mA. We also investigated the microstructure by HRTEM technology.     

Analytic computation of the photocurrent density in a n-6H-SiC/p-Si/n-Si/p-Si0.8Ge0.2 multilayer solar cell

In this work we conceived a model of a multilayer solar cell composed by four layers of opposite conductivities: an n-type 6H-SiC used as a frontal layer to absorb high energy photons (energy gap equals 2.9 eV), a p-type Si layer, an n-type Si layer and a p-type SiGe back layer to absorb low energy photons (Si_0.8Ge_0.2 with an energy gap equal to 0.8 eV). The impurity concentration in every layer of the model is taken equal to 10¹⁷ cm⁻³ to ensure abrupt junctions inside the cell. The optical properties of the separate layers have been fitted and tabulated to be used for thin films devices numerical simulation. We developed the equations giving the minority carrier concentration and the photocurrent density in each abscissa of the model. We used Matlab software to simulate and optimize the layers thicknesses to achieve the maximum photocurrent generated under AM0 solar spectrum. The results of simulation showed that the optimized structure could deliver, assuming 10⁵ cm/s surface recombination velocity, a photocurrent density of more than 53 mA/cm², which represents 88.3% of the ideal photocurrent (59.99 mA/cm²) that can be generated under AM0 solar spectrum.     

InGaAs and Ge MOSFETs with high κ dielectrics

InGaAs and Ge MOSFETs with high κ’s are now the leading candidates for technology beyond the 15 nm node CMOS. The UHV-Al₂O₃/Ga₂O₃(Gd₂O₃) [GGO]/InGaAs has low electrical leakage current densities, C-V characteristics with low interfacial densities of states (D_it’s) and small frequency dispersion in both n- and p-MOSCAPs, thermal stability at temperatures higher than >850 °C, a CET of 2.1 nm (a CET of 0.6 nm in GGO), and a well tuning of threshold voltage V_th with metal work function. Device performances in drain currents of >1 mA/μm, transconductances of >710 μS/μm, and peak mobility of 1600 cm²/V s at 1 μm gate-length were demonstrated in the self-aligned, inversion-channel high In-content InGaAs n-MOSFETs using UHV-Al₂O₃/GGO gate dielectrics and ALD-Al₂O₃. Direct deposition of GGO on Ge without an interfacial passivation layer has given excellent electrical performances and thermodynamic stability. Self-aligned Ge p-MOSFETs have shown a high drain current of 800 μA/μm and peak transconductance of 420 μS/μm at 1 μm gate-length.     

Fabrication and characterization of Zr-rich Zr-aluminate films for high-κ gate dielectric applications

Two kinds of Zr-rich Zr-aluminate films for high-κ gate dielectric applications with the nominal composition of (ZrO₂)_0.8(Al₂O₃)_0.2 and (ZrO₂)_0.9(Al₂O₃)_0.1, were deposited on n-type silicon wafer by pulsed laser deposition (PLD) technique at different deposition conditions. X-ray diffraction (XRD) reveals that the (ZrO₂)_0.8(Al₂O₃)_0.2 film could remain amorphous after being rapid thermal annealed (RTA) at the temperature above 800 °C, while the other one displays some crystalline peaks at 700 °C. The energy gap calculated from optical transmittance spectrum of (ZrO₂)_0.8(Al₂O₃)_0.2 film on quartz is about 6.0 eV. Sputtering depth profile of X-ray photoelectron spectroscopy and Auger electron spectroscopy indicate that a Zr-Si-O interfacial layer was formed at the near surface of the silicon substrate. The dielectric constant of the (ZrO₂)_0.8(Al₂ O₃)_0.2 film has been determined to be 22.1 by measuring a Pt/(ZrO₂)_0.8(Al₂ O₃)_0.2/Pt MIM structure. An EOT of 1.76 nm with a leakage current density of 51.5 mA/cm² at 1 V gate voltage for the film deposited in N₂ were obtained. Two different pre-treatments of Si substrates prior to depositions were also carried out and compared. The results indicate that a surface-nitrided Si substrate can lead to a lower leakage current density. The amorphous Zr-rich Zr-aluminate films fabricated by PLD have promising structure and dielectric properties required for a candidate material for high-κ gate dielectric applications.     

Characteristics of chalcogenide nonvolatile memory nano-cell-element based on Sb2Te3 material

Phase-change nonvolatile memory cell elements composed of Sb₂Te₃ chalcogenide have been fabricated by using the focused ion beam method. The contact size between the Sb₂Te₃ phase change film and electrode film in the cell element is 2826 nm² (diameter: 60 nm). The thickness of the Sb₂Te₃ chalcogenide film is 40 nm. The threshold switching current of about 0.1 mA was obtained. A RESET pulse width as short as 5 ns and the SET pulse width as short as 22 ns for Sb₂Te₃ chalcogenide can be obtained. At least 1000 cycle times with a RESET/SET resistance ratio >30 times is achieved for Sb₂Te₃ chalcogenide C-RAM cell element.     

Control of threshold voltage and improved subthreshold swing in enhancement-mode InGaP/InGaAs metal-oxide-semiconductor pseudomorphic high-electron-mobility transistor

The InGaP/InGaAs metal-oxide-semiconductor pseudomorphic high-electron-mobility transistor (MOS-PHEMT) with an oxidized GaAs gate by liquid phase oxidation (LPO) is demonstrated. With the help of the LPO, the threshold voltage (V_th) can be shifted positively to 0.07 V, and enhancement-mode MOS-PHEMT is fabricated. The device with a gate metal of 1 × 100 μm² shows a maximum transconductance of 171 mS/mm at V_DS = 5 V and a maximum drain current density of 182 mA/mm at V_GS = 2 V. It also exhibits a lower leakage current and an improved subthreshold swing compared to the referenced Schottky-gate InGaP/InGaAs PHEMT.     

A flip-chip packaged 80-nm In0.7Ga0.3As MHEMT for millimeter-wave low-noise applications

In this paper, we present a flip-chip 80-nm In_0.7Ga_0.3As MHEMT device on an alumina (Al₂O₃) substrate with very little decay on device RF performance up to 60 GHz. After package, the device exhibited high I_DS = 435 mA/mm at V_DS = 1.5 V, high g_m = 930 mS/mm at V_DS = 1.3 V, the measured gain was 7.5 dB and the minimum noise figure (NF_min) was 2.5 dB at 60 GHz. As compared to the bare chip, the packaged device exhibited very small degradation in performance. The result shows that with proper design of the matching circuits and packaging materials, the flip-chip technology can be used for discrete low noise FET package up to millimeter-wave range.     

Electrical properties of metal-ferroelectric-insulator-semiconductor structure using BaxSr1−xTiO3 for ferroelectric-gate field effect transistor

Perovskite ferroelectric Ba_xSr_1−xTiO₃ (x = 0.5, 0.6, 0.7 and 0.8) thin films have been fabricated as metal-ferroelectric-insulator-semiconductor (MFIS) configurations using a sol-gel technique. The C-V characteristics for different Ba-Sr ratios and different film thicknesses have been measured in order to investigate the ferroelectric memory window effect. The results show that the memory window width increases with the increase both of Ba content and film thickness. This behavior is attributed to the grain size and dipole dynamics effect. It is found also that the memory window increases as the applied voltage increases. In addition, the leakage current density for the films is measured and it is found to be of the order of 10⁻⁸ A/cm² for all tested samples, indicating that the films have good insulating characteristics.     

Characteristics of metal-ferroelectric-insulator-semiconductor structure using Sr0.8Bi2.2Ta2O9 and Sr0.8Bi2.2Ta2O9-BaZrO3 for ferroelectric gates

Characteristics of BaZrO₃ (BZO) modified Sr_0.8Bi_2.2Ta₂O₉ (SBT) thin films fabricated by sol-gel method on HfO₂ coated Si substrates have been investigated in a metal-ferroelectric-insulator-semiconductor (MFIS) structure for potential use in a ferroelectric field effect transistor (FeFET) type memory. MFIS structures consisting of pure SBT and doped with 5 and 7 mol% BZO exhibited memory windows of 0.81, 0.82 and 0.95 V with gate voltage sweeps between −5 and +5 V, respectively. Leakage current density levels of 10⁻⁸ A/cm² for BZO doped SBT gate materials were observed and attributed to the metallic Bi on the surface as well as intrinsic defects and a porous film microstructure. The higher than expected leakage current is attributed to electron trapping/de-trapping, which reduces the data retention time and memory window. Further process improvements are expected to enhance the electronic properties of doped SBT for FeFET.     

Improved property in organic light-emitting diode utilizing two Al/Alq3 layers

We reported on the fabrication of organic light-emitting devices (OLEDs) utilizing the two Al/Alq₃ layers and two electrodes. This novel green device with structure of Al(110 nm)/tris(8-hydroxyquinoline) aluminum (Alq₃)(65 nm)/Al(110 nm)/Alq₃(50 nm)/N,N′-dipheny1-N, N′-bis-(3-methy1phyeny1)-1, 1′-bipheny1-4, 4′-diamine (TPD)(60 nm)/ITO(60 nm)/Glass. TPD were used as holes transporting layer (HTL), and Alq₃ was used as electron transporting layer (ETL), at the same time, Alq₃ was also used as emitting layer (EL), Al and ITO were used as cathode and anode, respectively. The results showed that the device containing the two Al/Alq₃ layers and two electrodes had a higher brightness and electroluminescent efficiency than the device without this layer. At current density of 14 mA/cm², the brightness of the device with the two Al/Alq₃ layers reach 3693 cd/m², which is higher than the 2537 cd/m² of the Al/Alq₃/TPD:Alq₃/ITO/Glass device and the 1504.0 cd/m² of the Al/Alq₃/TPD/ITO/Glass. Turn-on voltage of the device with two Al/Alq₃ layers was 7 V, which is lower than the others.     

Resistive Random Access Memory Cells with a Bilayer TiO2/SiOX Insulating Stack for Simultaneous Filamentary and Distributed Resistive Switching

In order to fulfill the information storage needs of modern societies, the performance of electronic nonvolatile memories (NVMs) should be continuously improved. In the past few years, resistive random access memories (RRAM) have raised as one of the most promising technologies for future information storage due to their excellent performance and easy fabrication. In this work, a novel strategy is presented to further extend the performance of RRAMs. By using only cheap and industry friendly materials (Ti, TiO₂, SiO_X, and n⁺⁺Si), memory cells are developed that show both filamentary and distributed resistive switching simultaneously (i.e., in the same I–V curve). The devices exhibit unprecedented hysteretic I–V characteristics, high current on/off ratios up to ≈5 orders of magnitude, ultra low currents in high resistive state and low resistive state (100 pA and 125 nA at –0.1 V, respectively), sharp switching transitions, good cycle‐to‐cycle endurance (>1000 cycles), and low device‐to‐device variability. We are not aware of any other resistive switching memory exhibiting such characteristics, which may open the door for the development of advanced NVMs combining the advantages of filamentary and distributed resistive switching mechanisms.     

Bipolar switching characteristics of low-power Geo resistive memory

We reported an ultra low-power resistive random access memory (RRAM) combining a low-cost Ni electrode and covalent-bond GeO_x dielectric. This cost-effective Ni/GeO_x/TaN RRAM device has very small set power of 2 μW, ultra-low reset power of 130 pW, greater than 1 order of magnitude resistance window, and stable retention at 85 °C. The current flow at low-resistance state is governed by Poole-Frenkel conduction with electrons hopping via defect traps, which is quite different from the filament conduction in metal-oxide RRAM.     

Resistive switching characteristics of CMOS embedded HfO2-based 1T1R cells

This work addresses a 1T1R RRAM architecture, which allows for the precise and reliable control of the forming/set current by using an access transistor. The 1T1R devices were fabricated in a modified 0.25 μm CMOS technology. The memory cells show stable resistive switching in dc as well as pulse-induced mode with an endurance of 10³ and 10² cycles, respectively. The variation of pulse widths as a function of amplitudes in 1R devices confirmed the set process distribution over a wide range of pulse widths (300 ns-100 μA), whereas the reset process variation is confined (1-3 μs).     

Uniform bipolar organic memory using vapor phase polymerized poly (3,4-ethylenedioxythiophene)

Organic memory device has emerged as an excellent candidate for the next generation storage devices due to its high performance and low production cost. In this paper, we report the fabrication and electrical characterization of an organic memory device made of vapor-phase polymerized PEDOT thin films that are highly uniform and free of PSS and free of unreacted reactants. The PEDOT memory device exhibited a typical bipolar resistive switching with a high ON/OFF current ratio of at least 10³, which was maintained for more than 10³ dc sweeping cycles. The device performance was stable for more than 10⁵ s. Moreover, the device containing 64 cells has very high cell to cell uniformity as demonstrated by (1) at least 93% of the cells displaying the ON/OFF current ratio of at least 10³ and (2) the deviation of the set and reset voltages from the average values being less than 0.5 V and 0.4 V, respectively. The maximum current before switching in the reset process was found to increase linearly with increase in the compliance current applied during the set process.     

Facile modification of Cu source–drain (S/D) electrodes for high-performance,low-voltage n-channel organic thin film transistors (OTFTs) based on C60

Exploring suitable electrode materials with sufficiently low work function, ambient stability and low-cost is of great technological importance to the development of n-channel OTFTs. Here, we show that the work function of Cu can be effectively reduced from 4.65 eV to 4.28 eV through surface modification via simply spin-coating a thin layer of branched polyethylenimine (PEI). By exploiting a high-capacitance density gate dielectric (200 nF/cm²), low-voltage (3 V) C₆₀ TFTs with electron mobility (μ_e) of 3.2 cm²/V s are demonstrated with PEI modified Cu as source–drain (S/D) electrodes. In contrast, the device with Cu S/D electrodes possesses μ_e of only 1.0 cm²/V s. The improvement in electrical performance of the PEI modified device is attributed to the efficient electron injection at the Cu/C₆₀ interface which resulted from the reduction in work function of Cu. Moreover, upon PEI modification, the bias stability of the device can be obviously enhanced as compared to the unmodified one, and the resultant device exhibits an excellent thermal stability up to 200 °C without appreciable degradation in mobility. The facile modification of low-cost Cu as S/D electrodes for high-performance n-channel OTFTs as well as the low-voltage operation will pave the way for large scale manufacturing of organic electronics.     

Tandem small molecule organic photovoltaic cells with broad spectral response up to 1 μm and a high open-circuit voltage

We report a series-connected small molecule tandem photovoltaic cell utilizing two donors with complementary photovoltaic characteristics, lead phthalocyanine (PbPc) in the front subcell and boron subphthalocyanine chloride (SubPc) in the back subcell, to achieve both near infrared (NIR) response up to 1 μm and high open-circuit voltage (V_OC) of more than 1.5 V in the same device. We find that the C₆₀ layer thickness in the front subcell has a critical impact on the overall optical structure and photovoltaic performance of the tandem device. By combining transfer matrix calculations with subcell-selective spectral measurements, we are able to tune the optical field distribution inside the active layers and increase the photocurrent outputs from both subcells, leading to EQE > 30% over the wavelength range 400 nm < λ < 900 nm. This optimized tandem cell exhibits J_SC = (5.5 ± 0.1) mA/cm², fill factor = 0.54, V_OC = 1.53 V, and a power conversion efficiency of (4.5 ± 0.2)%.     

Multilevel characteristics for bipolar resistive random access memory based on hafnium doped SiO2 switching layer

We fabricated TiN/Hf:SiO₂/Pt memory cell with the small size of 1×1 um² by lithography and sputtering technology, which demonstrated excellent bipolar resistive switching (RS) characteristics. The device presents good endurance and outstanding uniformity. The coefficient of variation of V_set, V_reset, R_on and R_off were found to be 5.05%, 4.78%, 4.18%, and 15.78%, respectively. For the device with hafnium doped SiO₂ switching layer, multilevel storage capability can be successfully obtained by varying either the stop voltage or the compliance current in the SET process. In addition, the impact of forming current on the RS properties was studied. We found that the ratio of On/Off current for the device increased with the decrease of the forming current, which would be beneficial for the design of low power device. Possible RS mechanisms aiming to explain the impact of forming current on the RS characteristics and multilevel storage were also deduced.