镜像抑制的双调谐跟踪滤波器特性研究

本文是基于数字电视调谐芯片的前级系统设计,来讨论双调谐跟踪镜像抑制滤波器的设计.调谐器在电视接收系统中的作用其中包括选择并转换电视频道、滤除多种干扰.这种功能主要由前级系统来实现.双调谐滤波器不但有较好的频率选择特性,而且阻抗变换也方便.同时为了虑除镜像干扰,此带通滤波器还有镜像作用.本设计结合实际的工程,给出电路设计过程和电路的计算、仿真以及实际电路测试结果.通过本文,读者可以了解或者借鉴一下电路的设计思想.     

半实物仿真中红外干扰机的模拟设计

介绍了不同类型的红外干扰机,分析了其干扰机理,提出了模拟逼真度原则,在此基础上研究了红外干扰机的模拟方式,设计了干扰模拟发射器和干扰注入方案,最后进行了干扰模拟发射器的仿真分析.     

Onkyo（安桥）P-3000R

Onkyo（安桥）推出新品P-3000R解码前级，内ETDAC解码器，采用最新的动态互调失真减少电路（DIDRC）技术，能够减少动态噪音和失真，实现高保真音响效果；内部数码、模拟电路及电源系统都各自独立，可减少数码及模拟电路之间的干扰.     

模拟电路的抗扰度设计

本文围绕模拟电路的抗扰度设计,对抗干扰设计的问题,消除解调噪声问题的设计方法,其它模拟电路抗扰度设计技术,模拟器件的选择等方面进行了初步的分析和探索。     

北斗船用接收机电磁兼容电路设计与研究

随着我国北斗二代卫星导航系统的运行,北斗船载接收机的研究也取得了丰硕的成果.对船用接收机的性能要求也提出了更高的要求,尤其是电磁兼容性能.首先介绍了抗电磁干扰的接收机总体设计原理,分析了船上电磁干扰源以及如何对北斗接收机造成干扰;提出了船载北斗导航接收机在系统设计时的电磁干扰优化措施;从系统关键电路原理设计、PCB设计的源头上应用电磁兼容理论降低各种干扰;在电源端口处采用串接前级抑制干扰滤波元件抑制噪声对系统电源的干扰.通过分析导线阻抗、传输信号的反射干扰、线间干扰、辐射干扰等来指导PCB的设计,并给出了PCB设计样图.以上的各种举措可以提高北斗船载接收机的电磁兼容性能.     

红外触摸屏扰强光干扰的研究

红外触摸屏主要依靠红外光线工作,对环境光照因素的变化比较敏感,所以对红外触摸屏的抗强光干扰的研究是学者们关注的主要问题之一.论丈研究了具有锁相放大环节的红外屏接收电路,红外发射电路发射出红外光经过光电转换后进入锁相放大电路中,经锁相放大后能有效提取出有用信号,并滤除光干扰,实现抗强光干扰的目的.     

基于增益扩展现象的线性化技术在Doherty功放中的应用

在分析Doherty放大器特性基础上,研究了利用Doherty具有增益扩展特性的放大器线性化技术.深入分析了Doherty功放中辅助功放的栅压变化对增益扩展特性的影响,并讨论了据此将具有增益扩展特性的前级Doherty功放作为模拟射频预失真器与末级Doherty功放进行级联而构成的线性化功放.最后根据这一原理,采用一对MRF21010功放管所设计并优化的Doherty模拟预失真功率放大器与前级为平衡放大器、末级为相同Doherty功放的级联电路相对照,表明三阶互调可以改善15dB,效率提高2%.研究结果对高效率、高线性功放的设计具有实际意义.     

数模混合电路的PCB设计

高速PCB的设计中,数模混合电路的PCB设计中的干扰问题一直是一个难题。尤其模拟电路一般是信号的源头,能否正确接收和转换信号是PCB设计要考虑的重要因素。文章通过分析混合电路干扰产生的机理,结合设计实践,探讨了混合电路一般处理方法,并通过设计实例得到验证。     

模拟传感器的抗干扰措施研究

模拟传感器的应用非常广泛,各行各业可以见到模拟传感器的身影.但在模拟传感器的设计和使用中,都有一个如何使其测量精度达到最高的问题,而众多的干扰一直影响着传感器的测量精度,模拟传感器输出的一般都是小信号,都存在小信号放大、处理、整形以及抗干扰问题,这就要求设计制作者必须注意到模拟传感器干扰源以及干扰作用方式,设计出消除干扰的电路或预防干扰的措施,才能达到应用模拟传感器的最佳状态.     

红外焦平面失效现象仿真研究

在性能较差的红外焦平面器件中,其背景图像经常出现一些现象,比如"黑线"、"锯齿"、"滴落圆"等,其原因可能是红外焦平面器件有缺陷或其读出电路存在问题.本文针对红外焦平面可能出现的各种缺陷,将其等效为失效性模型,用EDA软件分别对采用DI和CTIA两种读出结构的红外焦平面进行失效性等效模拟分析.通过对3×3和10×10规模的红外焦平面输出信号进行模拟,分析了背景图像中失效现象产生的原因.红外焦平面失效现象模拟分析得出的结果,为红外焦平面读出电路结构的改进提供了参考依据.     

一种大间距短波线列红外探测器用读出电路的设计

介绍了一款大间距双波段短波线列红外探测器用读出电路的设计详情,电路采用CTIA输入方式,模拟通道采用11级TDI进行信号的时间延迟累加平均。文章主要介绍了电路输入级、列级信号处理电路的设计及仿真分析,给出了全电路的整体仿真结果,并在文章最后介绍了电路实际测试结果。     

Design of integrated BiCMOS operational amplifiers with low-probability EMI-induced-failures

Electromagnetic interference may cause failures in operational amplifiers. The probability of these failures can be reduced by properly designing the opamp, once the failure mechanism has been discovered. In this paper the design of some integrated BiCMOS operational amplifiers with a very low-probability of electromagnetic interference (EMI) induced failures is reported. In particular, it is shown that opamps exhibiting good general performances as well as low EMI-susceptibility can be obtained only if their response to a large square-wave input signal is symmetric and the influence of some parasitic capacitances in the input stage is compensated. Following these guide-lines, we found possible to design BiCMOS opamp structures exhibiting EMI susceptibility of only a few mV up to several hundred MHz when they are driven with an interfering input signal of some volts.     

基于帧差法和自适应阈值区域生长的红外运动目标检测

针对具有背景干扰、信噪比低的红外图像,提出了一种基于帧差法和自适应区域生长的红外运动目标检测方法.首先对红外图像进行了高帽变换,以抑制大面积背景的干扰,相邻帧图像间做帧差,初步提取目标区域;其次分析了红外目标的特性,针对其特性提出了一种基于灰度等级的自适应阈值分割方法;最后以帧差法检测的目标质心为种子点,以自适应阈值为分割准则,在预处理后的图像中进行区域生长,最终实现了红外运动目标的检测.结果表明,所提算法可抑制大面积背景的干扰,实现单个和多个红外运动目标的完整提取和检测.     

红外焦平面读出电路集成数字输出

为了实现红外焦平面数字化输出,设计了一种集成片上模数转换的焦平面读出电路,包括一个512512的读出电路单元阵列和列共享的逐次逼近寄存器型模数转换器(SAR ADC)。单元读出电路采用了直接注入(DI)结构作为输入级,输出的信号通过多路传输送到模数转换器。设计的逐次逼近型的模数转换器中的比较器采用的是由前置放大器、锁存器、自偏置差分放大器和输出驱动器组成的高速比较器,数模转换器(DAC)采用的是三段式的电荷按比例缩放和电压按比例缩放相结合的结构。在Cadence和Synopsys设计平台下对模拟和数字部分电路分别进行设计、仿真与版图设计。电路工艺采用GLOBALFOUNDRIES公司0.35 m CMOS 3.3 V工艺加工流片。测试结果显示SAR ADC有效位数为8.2位,转换频率超过150 k Samples/s,功耗低于300 W,满足焦平面100帧频以及低功耗的需求。     

Monolithic nullor-a universal active network element

The design of a monolithic integrated nullor is described. It is a universal active element with floating input and output ports and with large internal gain. The element consists of a differential input stage, a symmetrical level shift stage, and a differential output stage. In the latter stage the collectors of a long-tailed transistor pair function as a pair of connected vessels for the output currents at high common-mode output impedance. This gives the output port its floating character. The element is capable of conveying a potential from one input terminal to the other input terminal and a current from one input terminal to the other output terminal at an accurate unity gain. The total inaccuracy of these operations is in the order of 2/spl times/10/SUP 4/ at signal voltage levels of 1 V and 1 mA. The element has a bandwidth of 25 MHz and can handle maximum signal values of 10 V and 1 mA. The availability of such universal active elements makes it possible to minimize the number of active elements and passive precision elements in implementation of analog system functions.     

A High-Gain Acquisition System With Very Large Input Range

A signal acquisition system is presented for the recording of small signals in the presence of low-frequency interference. In a conventional design, high-pass filters precede the input stage to remove the impeding signals. However, filters limit the recording bandwidth, can lead to long settling time after disturbance, and potentially valuable information about the interfering signal is removed. Also, the required large components are impractical for a fully integrated solution. In this paper, a flexible, low-cost, filterless system is proposed and demonstrated, which extends the available input range to accommodate interference instead of rejecting it. An integrated system using digitally controlled floating batteries to compensate for interference at the amplifier input is presented. A digital postprocessing algorithm suitable for integration is proposed and evaluated. Measured results of the acquisition front-end realized in 0.35 mum CMOS technology confirm a more than sevenfold extension of the original input range and the usable dynamic range. The system is further verified using electrocardiography as a typical biomedical application.     

A Single-Chip ADM LSI CODEC

This paper describes the circuit design of an ADM (adaptive delta modulation) LSI CODEC with filters. The LSI chip is mounted in a 16-pin DIP and can operate with single low voltage supply. In order to realize a low power dissipation LSI IC, switched capacitor technology was used in the design of input/output filters and integrators, and C-array D/A converters and low voltage analog circuits were developed. An operational amplifier with a complementary differential input stage and a comparator with a capacitor-coupled input stage were employed to obtain a wide input voltage range with a low voltage supply. This CODEC achieves speech quality higher than that of 6-bit µ-law PCM CODEC at 32 kbits/s and power dissipation of below 30 mW.     

Design of a CMOS opamp input stage immune to EMI

In this paper the behaviour of a complementary nMOS–pMOS differential pair in the presence of RF interference superimposed on the input terminals is analysed. An intrinsic nonlinearity cancellation mechanism in this structure is demonstrated, and proper design criteria are presented to exploit this mechanism in order to achieve a very high immunity to RF interference. A high-immunity complementary differential pair has been employed as an input stage of a folded cascode operational amplifier and its improved behaviour in the presence of RF interference has been verified by computer simulations.     

ADC外围电路的设计

ADC外围电路的设计通常包括模拟电路、数字电路和电源电路的设计。为了满足ADC的需要,ADC外围电路的设计重点是输入放大信号,为了使其充分发挥整体性能,必须在ADC转换期间保持输入电压的稳定;为了消除模拟多路开关因阻抗不匹配和转换阶跃信号变化对ADC输入及采样阶段的影响,需在多路开关与ADC之间加接高输入阻抗的电压跟随器,并待阶跃变化稳定后,再让采样保持电路进入采样阶段;为了满足微控制器对时序的要求,必须选择恰当的接口形式。此外,采用良好的接地方式与电压去耦方法,可以避免模拟信号和数字信号受到噪声干扰,也可避免两种信号产生互相干扰。为了防止噪声对数字信号的影响,还使用了相应的隔离方式。     

Parallel asynchronous focal plane array processing

A new approach to focal plane processing based on silicon injection mode devices is suggested. These devices provide a natural basis for parallel asynchronous focal plane image preprocessing. The simplicity and novel properties of the devices would permit an independent analog processing channel to be dedicated to every pixel. A laminar architecture built from arrays of the devices would form a two-dimensional (2-D) array processor with a 2-D array of inputs located directly behind the focal plane detector array. A 2-D image data stream would propagate in neuronlike asynchronous pulse coded form through the laminar processor. No multiplexing, digitization or serial processing would occur in the preprocessing stage. High performance is expected because approximately linear pulse coding has already been observed for input currents ranging over six orders of magnitude down to one picoampere with noise referred to input of about 10 femtoamperes. Very low power requirements suggest utility in space and in conjunction with very large arrays. Multispectral processing is possible because of compatibility with the cryogenic environment of high performance infrared detectors.