The SINFET—A Schottky injection MOS-gated power transistor

A new MOS-gated power device, the Schottky injection FET (SINFET), is described in this paper. The device offers 6 times higher current handling capability than conventional n-channel power LDMOS transistors of comparable size and voltage capability and still maintains a comparable switching speed. The low on-resistance is obtained by conductivity modulation of the high-resistivity n- drift region using a Schottky injector. Since only a small number of minority carriers are injected, the speed of the device is not degraded substantially and high latchup resistance is achieved. Breakdown voltages and specific on-resistance observed on typical devices are 170 V and 0.01 Ω . cm², respectively. Gate-turn off times are of the order of 30 ns. Two-dimensional simulation and experimental results comparing the SIN-FET with the LDMOST and lateral insulated gate transistor (LIGT) are presented.     

High temperature characteristics of bipolar mode power JFET operation

The high-temperature operating characteristics of high-voltage JFET devices operated in the bipolar mode are evaluated. Good forward blocking capability with no degradation in blocking gain is observed at up to 200°C. The on-resistance and gate turnoff time of the devices was found to double from 25°C to 200°C, and the current gain was found to decrease by 30 percent. Despite the increase in gate drive requirements with increasing temperature, these devices should still be attractive for high-speed power switching applications because their on-resistance per unit area is at least 10 time lower than that of the power MOSFET.     

A DI/JI-compatible monolithic high-voltage multiplexer

A high-voltage multiplexer fabricated with both junction-isolated (JI) and dielectrically isolated (DI) D/CMOS process technologies is described in this paper. This eight-channel multiplexer is capable of switching a ± 50-V analog-signal range from a ± 60-V power supply. The switches exhibit less than 50 Ω of on-resistance and are capable of peak currents in excess of 0.5 A. An off-switch current model incorporating junction area and lifetime-dependent lateral DMOS drain-to-body and drain-to-substrate leakages is described. Elimination of the drain-to-substrate diode with dielectric isolation results in a factor of 15 reduction in leakage at 25°C and a factor of 10 improvement at 125°C, which agrees well with the model developed. Results show that the generation current from the space-charge region dominates device leakage at room temperature, while diffusion current from the neutral regions is predominant at elevated temperatures. In high-voltage testers, dielectrically isolated multiplexers offer the low leakage and high accuracy required by critical channels where less costly junction-isolated devices will not suffice.     

A 120-W Boost Converter Operation Using a High-Voltage GaN-HEMT

A boost converter with a 940-V/4.4 A GaN-HEMT as the main switching device was demonstrated to show the possibility of using high-voltage GaN-HEMTs in power electronic applications. The demonstrated circuit achieved an output power of 122 W and a power efficiency of 94.2% under a drain peak voltage as high as 350 V and a switching frequency of 1 MHz. The dual field-plate structure realized high-voltage switching operation with high power efficiency as dynamic on-resistance was suppressed by an increase of the current collapse phenomena.     

Progress in MOS-controlled bipolar devices and edge termination technologies

An overview of the recent developments in high-voltage power semiconductor MOS-controlled bipolar devices is presented. The Insulated Gate Bipolar Transistor (IGBT) technology is explored from its initial stage up to the latest state-of-the-art developments, in terms of cathode engineering, drift design and anode engineering to highlight the different approaches used for optimisation and the achieved trade-offs. Further, several MOS-gated thyristors, which are aimed to replace the IGBT, are analysed. Moreover, the present paper reviews the various approaches in the fabrication of edge termination used in power device MOS-controlled bipolar devices.     

Optimized design of a merged bipolar MOSFET device

Numerical techniques have been applied to predict the steady-state characteristics of lateral bipolar-MOSFET (BIMOS) power switching devices. The BIMOS has the same structure as a lateral double-diffused MOSFET (LDMOS), with the p-type channel region acting as the base of an n-p-n transistor. By merging MOSFET and bipolar transistors in a lateral configuration, a monolithic power-integrated circuit is realized which retains some of the desirable features of both types of transistors for switching applications. Specifically, the structure of a switching device with low on-resistance high voltage capability, fast switching speed, and high input impedance is derived which does not require significantly increased device fabrication complexity. A special junction isolation design was used to limit the parasitic effects involving the substrate. These parasitic effects can degrade the performance of the BIMOS by reducing the gain of the n-p-n transistor and introducing a large substrate current. An off-state model has been developed in order to study the field shaping effects which occur with the inclusion of the junction isolation. The design is optimized to obtain a high-breakdown-voltage low-on-resistance parasitic-free monolithic-power integrated circuit.     

Suppression of Dynamic On-Resistance Increase and Gate Charge Measurements in High-Voltage GaN-HEMTs With Optimized Field-Plate Structure

The dynamic on-resistance increase associated with the current collapse phenomena in high-voltage GaN high-electron-mobility transistors (HEMTs) has been suppressed by employing an optimized field-plate (FP) structure. The fabricated GaN-HEMTs of 600 V/4.7 A and 940 V/4.4 A for power-electronics applications employ a dual-FP structure consisting of a short-gate FP underneath a long-source FP. The measured on-resistance shows minimal increase during high-voltage switching due to increased electric-field uniformity between the gate and drain as a result of using the dual FP. The gate-drain charge Q _gd for the fabricated devices has also been measured to provide a basis for discussion of the ability of high-speed switching operation. Although Q _gd /A (A: active device area) was almost the same as that of the conventional Si-power MOSFETs, R _on A was dramatically reduced to about a seventh of the reported 600-V Si-MOSFET value. Therefore, R _on Q _gd for 600-V device was reduced to 0.32 OmeganC, which was approximately a sixth of that for the Si-power MOSFETs. The high-voltage GaN-HEMTs have significant advantages over silicon-power MOSFETs in terms of both the reduced on-resistance and the high-speed switching capability.     

A high-voltage optoelectronic GaAs static induction transistor

Experimental realization of an optically activated, high-voltage GaAs static induction transistor (SIT) is reported. In the forward blocking state, the breakdown voltage of the device was ~200 V, while in the conduction state, on-state current densities exceeding 150 A/cm² were obtained. In the floating-gate configurations (gate open), the specific on-resistance of the device was ~50 mΩ-cm². Optical modulation of the device was achieved using a compact semiconductor laser array as the triggering source. In this mode, a gate-coupled RC network was implemented, resulting in an average switching energy gain (load energy/optical energy) of ~30. This mode of operation is applicable to series-coupled devices for pulsed switching at higher power levels     

10 A, 2.4 kV Power DiMOSFETs in 4H-SiC

We report the characteristics of large area (3.3 × 3.3 mm ²) high-voltage 4H-SiC DiMOSFETs. The MOSFETs show a peak MOS channel mobility of 22 cm²/V·s and a threshold voltage of 8.5 V at room temperature. The DiMOSFETs exhibit an on-resistance of 4.2 mΩ·cm² at room temperature and 85 mΩ·cm² at 200°C. Stable avalanche characteristics at approximately 2.4 kV are observed. An on-current of 10 A is measured on a 0.103 cm² device. High switching speed is also demonstrated. This suggests that the devices are capable of high-voltage, high-frequency, low-loss switching applications     

The SINFET: a new high conductance, high switching speed MOS-gated transistor

A new MOS power semiconductor device with a very low on-resistance and a switching speed comparable to conventional n-channel power MOSFETs is described. The fabrication process is similar to that of an n-channel lateral DMOS transistor but with the conventional high-low `ohmic? drain contact replaced by a Schottky contact. In operation, the Schottky contact injects minority carriers to conductivity-modulate the n- drift region, thereby reducing the on-resistance by a factor of about ten compared with those of conventional n-channel power MOSFETs of comparable size and voltage capability. Furthermore, since only a small number of minority carriers are injected, the device speed is comparable to conventional n-channel power MOSFETs.     

SiC电力电子器件对电力系统的影响

宽禁带SiC材料被认为是高性能电力电子器件的理想材料,比较了Si和SiC材料的电力电子器件在击穿电场强度、稳定性和开关速度等方面的区别,着重分析了以SiC器件为功率开关的电力电子装置对电力系统中柔性交流输电系统(FACTS)、高压直流输电(HVDC)装置、新能源技术和微电网技术领域的影响。分析表明,SiC电力电子器件具有耐高压、耐高温、开关频率高、损耗小、动态性能优良等特点,在较高电压等级(高于3 kV)或对电力电子装置性能有更高要求的场合,具有良好的应用前景。     

Optimization of the tradeoff between switching speed of theinternal diode and on-resistance in gold- and platinum-implanted powermetal-oxide-semiconductor devices

Diffusion of platinum and gold has been used to reduce minority-carrier lifetime in power metal-oxide-semiconductor devices in order to improve the switching characteristics of the internal diode. Gold thin-film deposition and gold- or platinum-ion implantation techniques have been adopted to realize the prediffusion source. For a given reduction in lifetime, the concomitant increase in the on-resistance of the device, as determined by the forward characteristics, is smaller in gold-implanted than in gold-deposited devices; an even smaller increase in on-resistance is obtained by using platinum implantation. Therefore, ion implantation of platinum in power MOS devices fabrication provides a better tradeoff between static characteristics of the devices and switching speed of their internal diodes     

Physical phenomena affecting performance and reliability of 4H-SiC bipolar junction transistors

The silicon carbide bipolar junction transistor (BJT) is attractive for use in high-voltage switching applications offering high-voltage blocking characteristics, low switching losses, and is capable of operating at current densities exceeding 300 A/cm². However, performance reliability issues such as degradation of current gain and on-resistance currently prohibit commercial production of 4H-SiC BJTs. This paper examines the physical mechanisms responsible for this degradation as well as the impact that these physical phenomena have on device performance. Results were obtained through the examination of several types of N-P-N BJT structures using various fabrication methodologies. Electron-beam induced current (EBIC) and potassium hydroxide (KOH) etching were used to characterize defect content in the material, before and after device current stress, when possible. It was found that Shockley stacking faults (stress-induced structures) associated with the forward voltage drift phenomenon in SiC bipolar diodes, also play a major role in the reduction of gain and an increase of on-resistance of the BJTs. However, results from some devices suggest that additional processes at the device periphery (edge of the emitter) may also contribute to degradation in electrical performance. Hence, it is essential that the sources of electrical degradation, identified in this paper, be eliminated for SiC BJTs to be viable for commercial scale production.     

430-V 12.4-$hboxmOmegacdot hboxcm^2$Normally off 4H-SiC Lateral JFET

This letter reports the experimental demonstration of the first 4H-SiC normally off high-voltage lateral junction field-effect transistor. The design and fabrication of such a device have been investigated. The fabricated device has a vertical channel length of 1.8$muhboxm$created by tilted aluminum implantation on the sidewalls of deep trenches and a lateral drift-region length of 5$muhboxm$. Normally off operation$(V_ GS=hbox0 V)$with a blocking voltage$V_ br$of 430 V has been achieved with a specific on-resistance$R_ onhbox- sp$of 12.4$hboxmOmega cdot hboxcm^2$, which is the lowest specific on-resistance for 4H-SiC lateral power switches reported to date, resulting in a$V_ br^2/R_ onhbox- sp$value of 15$hboxMW/cm^2$. This is among the best$V_ br^2/R_ onhbox- sp$figure-of-merit reported to date for 4H-SiC lateral high-voltage devices.     

A 97.8% Efficient GaN HEMT Boost Converter With 300-W Output Power at 1 MHz

A 175-to-350 V hard-switched boost converter was constructed using a high-voltage GaN high-electron-mobility transistor grown on SiC substrate. The high speed and low on-resistance of the wide-band-gap device enabled extremely fast switching transients and low losses, resulting in a high conversion efficiency of 97.8% with 300-W output power at 1 MHz. The maximum efficiency was 98.0% at 214-W output power, well exceeding the state of the art of Si-based converters at similar frequencies.     

Recessed-gate structure approach toward normally off high-Voltage AlGaN/GaN HEMT for power electronics applications

A recessed-gate structure has been studied with a view to realizing normally off operation of high-voltage AlGaN/GaN high-electron mobility transistors (HEMTs) for power electronics applications. The recessed-gate structure is very attractive for realizing normally off high-voltage AlGaN/GaN HEMTs because the gate threshold voltage can be controlled by the etching depth of the recess without significant increase in on-resistance characteristics. With this structure the threshold voltage can be increased with the reduction of two-dimensional electron gas (2DEG) density only under the gate electrode without reduction of 2DEG density in the other channel regions such as the channel between drain and gate. The threshold-voltage increase was experimentally demonstrated. The threshold voltage of fabricated recessed-gate device increased to -0.14 V while the threshold voltage without the recessed-gate structure was about -4 V. The specific on-resistance of the device was maintained as low as 4 m/spl Omega//spl middot/cm/sup 2/ and the breakdown voltage was 435 V. The on-resistance and the breakdown voltage tradeoff characteristics were the same as those of normally on devices. From the viewpoint of device design, the on-resistance for the normally off device was modeled using the relationship between the AlGaN layer thickness under the gate electrode and the 2DEG density. It is found that the MIS gate structure and the recess etching without the offset region between recess edge and gate electrode will further improve the on-resistance. The simulation results show the possibility of the on-resistance below 1 m/spl Omega//spl middot/cm/sup 2/ for normally off AlGaN/GaN HEMTs operating at several hundred volts with threshold voltage up to +1 V.     

Silicon Carbide Power MOSFET Model and Parameter Extraction Sequence

A compact circuit simulator model is used to describe the performance of a 2-kV, 5-A 4-H silicon carbide (SiC) power DiMOSFET and to perform a detailed comparison with the performance of a widely used 400-V, 5-A Si power MOSFET. The model's channel current expressions are unique in that they include the channel regions at the corners of the square or hexagonal cells that turn on at lower gate voltages and the enhanced linear region transconductance due to diffusion in the nonuniformly doped channel. It is shown that the model accurately describes the static and dynamic performance of both the Si and SiC devices and that the diffusion-enhanced channel conductance is essential to describe the SiC DiMOSFET on-state characteristics. The detailed device comparisons reveal that both the on-state performance and switching performance at 25degC are similar between the 400-V Si and 2-kV SiC MOSFETs, with the exception that the SiC device requires twice the gate drive voltage. The main difference between the devices is that the SiC has a five times higher voltage rating without an increase in the specific on-resistance. At higher temperatures (above 100degC), the Si device has a severe reduction in conduction capability, whereas the SiC on-resistance is only minimally affected     

Performance of MCT's in a current-regulated AC/DC PDM converter

An AC/DC current-regulated pulse density modulated (PDM) power converter is presented. The MOS-controlled thyristor (MCT) is used in this power converter because of its promising advantages over existing power devices. A unique bidirectional switch configuration is used, which allows the MCT to switch easily at zero voltage. The converter performance is evaluated driving a 5 hp induction motor. MCT switching was performed satisfactorily, but the device fails before its ratings are reached. The MCT will be better than other devices when used in applications that require critical timing and high voltage blocking capability     

Process and device design of a 1000-V MOS IC

High-voltage MOS devices and logic N-MOS circuits have been integrated on the same chip by using a silicon-gate isoplanar process that is compatible with present N-MOS LSI technology. The electrical characteristics of high-voltage MOS devices are modeled and characterized in terms of channel length, drift-layer length, drift-layer ion dose, and extended source field-plate effect. The theoretical calculations of on-resistanee, saturation drain current, and pinchoff voltage agree well with the experimental results. Based on the experimental and theoretical results, the device structure and the process parameters are optimized to obtain maximum drain saturation current with a low on-resistance and a drain breakdown of 1000 V. The optimized high-voltage MOS device can perform with a saturation drain current as high as 84 mA with an on-resistance as low as 300 Ω within an area of 520 µm × 1320 µm while maintaining a drain breakdown of 1000 V.     

Demonstration of Low-Leakage-Current Low-On-Resistance 600-V 5.5-A GaN/AlGaN HEMT

This letter demonstrates a high-voltage, high-current, and low-leakage-current GaN/AlGaN power HEMT with HfO₂ as the gate dielectric and passivation layer. The device is measured up to 600 V, and the maximum on-state drain current is higher than 5.5 A. Performance of small devices with HfO₂ and Si₃N₄ dielectrics is compared. The electric strength of gate dielectrics is measured for both HfO₂ and Si₃N₄. Devices with HfO₂ show better uniformity and lower leakage current than Si₃N₄ passivated devices. The 5.5-A HfO₂ devices demonstrate very low gate (41 nA/mm) and drain (430 nA/mm) leakage-current density and low on-resistance (6.2 Omegamiddotmm or 2.5 mOmegamiddotcm²).